1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/hugetlb.h>
5 #include <asm/pgalloc.h>
7 #include <asm/fixmap.h>
10 #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK
11 phys_addr_t physical_mask __ro_after_init
= (1ULL << __PHYSICAL_MASK_SHIFT
) - 1;
12 EXPORT_SYMBOL(physical_mask
);
16 #define PGTABLE_HIGHMEM __GFP_HIGHMEM
18 #define PGTABLE_HIGHMEM 0
21 #ifndef CONFIG_PARAVIRT
23 void paravirt_tlb_remove_table(struct mmu_gather
*tlb
, void *table
)
25 tlb_remove_page(tlb
, table
);
29 gfp_t __userpte_alloc_gfp
= GFP_PGTABLE_USER
| PGTABLE_HIGHMEM
;
31 pgtable_t
pte_alloc_one(struct mm_struct
*mm
)
33 return __pte_alloc_one(mm
, __userpte_alloc_gfp
);
36 static int __init
setup_userpte(char *arg
)
42 * "userpte=nohigh" disables allocation of user pagetables in
45 if (strcmp(arg
, "nohigh") == 0)
46 __userpte_alloc_gfp
&= ~__GFP_HIGHMEM
;
51 early_param("userpte", setup_userpte
);
53 void ___pte_free_tlb(struct mmu_gather
*tlb
, struct page
*pte
)
55 pagetable_pte_dtor(page_ptdesc(pte
));
56 paravirt_release_pte(page_to_pfn(pte
));
57 paravirt_tlb_remove_table(tlb
, pte
);
60 #if CONFIG_PGTABLE_LEVELS > 2
61 void ___pmd_free_tlb(struct mmu_gather
*tlb
, pmd_t
*pmd
)
63 struct ptdesc
*ptdesc
= virt_to_ptdesc(pmd
);
64 paravirt_release_pmd(__pa(pmd
) >> PAGE_SHIFT
);
66 * NOTE! For PAE, any changes to the top page-directory-pointer-table
67 * entries need a full cr3 reload to flush.
70 tlb
->need_flush_all
= 1;
72 pagetable_pmd_dtor(ptdesc
);
73 paravirt_tlb_remove_table(tlb
, ptdesc_page(ptdesc
));
76 #if CONFIG_PGTABLE_LEVELS > 3
77 void ___pud_free_tlb(struct mmu_gather
*tlb
, pud_t
*pud
)
79 struct ptdesc
*ptdesc
= virt_to_ptdesc(pud
);
81 pagetable_pud_dtor(ptdesc
);
82 paravirt_release_pud(__pa(pud
) >> PAGE_SHIFT
);
83 paravirt_tlb_remove_table(tlb
, virt_to_page(pud
));
86 #if CONFIG_PGTABLE_LEVELS > 4
87 void ___p4d_free_tlb(struct mmu_gather
*tlb
, p4d_t
*p4d
)
89 paravirt_release_p4d(__pa(p4d
) >> PAGE_SHIFT
);
90 paravirt_tlb_remove_table(tlb
, virt_to_page(p4d
));
92 #endif /* CONFIG_PGTABLE_LEVELS > 4 */
93 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
94 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
96 static inline void pgd_list_add(pgd_t
*pgd
)
98 struct ptdesc
*ptdesc
= virt_to_ptdesc(pgd
);
100 list_add(&ptdesc
->pt_list
, &pgd_list
);
103 static inline void pgd_list_del(pgd_t
*pgd
)
105 struct ptdesc
*ptdesc
= virt_to_ptdesc(pgd
);
107 list_del(&ptdesc
->pt_list
);
110 #define UNSHARED_PTRS_PER_PGD \
111 (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
112 #define MAX_UNSHARED_PTRS_PER_PGD \
113 MAX_T(size_t, KERNEL_PGD_BOUNDARY, PTRS_PER_PGD)
116 static void pgd_set_mm(pgd_t
*pgd
, struct mm_struct
*mm
)
118 virt_to_ptdesc(pgd
)->pt_mm
= mm
;
121 struct mm_struct
*pgd_page_get_mm(struct page
*page
)
123 return page_ptdesc(page
)->pt_mm
;
126 static void pgd_ctor(struct mm_struct
*mm
, pgd_t
*pgd
)
128 /* If the pgd points to a shared pagetable level (either the
129 ptes in non-PAE, or shared PMD in PAE), then just copy the
130 references from swapper_pg_dir. */
131 if (CONFIG_PGTABLE_LEVELS
== 2 ||
132 (CONFIG_PGTABLE_LEVELS
== 3 && SHARED_KERNEL_PMD
) ||
133 CONFIG_PGTABLE_LEVELS
>= 4) {
134 clone_pgd_range(pgd
+ KERNEL_PGD_BOUNDARY
,
135 swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
139 /* list required to sync kernel mapping updates */
140 if (!SHARED_KERNEL_PMD
) {
146 static void pgd_dtor(pgd_t
*pgd
)
148 if (SHARED_KERNEL_PMD
)
151 spin_lock(&pgd_lock
);
153 spin_unlock(&pgd_lock
);
157 * List of all pgd's needed for non-PAE so it can invalidate entries
158 * in both cached and uncached pgd's; not needed for PAE since the
159 * kernel pmd is shared. If PAE were not to share the pmd a similar
160 * tactic would be needed. This is essentially codepath-based locking
161 * against pageattr.c; it is the unique case in which a valid change
162 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
163 * vmalloc faults work because attached pagetables are never freed.
167 #ifdef CONFIG_X86_PAE
169 * In PAE mode, we need to do a cr3 reload (=tlb flush) when
170 * updating the top-level pagetable entries to guarantee the
171 * processor notices the update. Since this is expensive, and
172 * all 4 top-level entries are used almost immediately in a
173 * new process's life, we just pre-populate them here.
175 * Also, if we're in a paravirt environment where the kernel pmd is
176 * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
177 * and initialize the kernel pmds here.
179 #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
180 #define MAX_PREALLOCATED_PMDS MAX_UNSHARED_PTRS_PER_PGD
183 * We allocate separate PMDs for the kernel part of the user page-table
184 * when PTI is enabled. We need them to map the per-process LDT into the
185 * user-space page-table.
187 #define PREALLOCATED_USER_PMDS (boot_cpu_has(X86_FEATURE_PTI) ? \
189 #define MAX_PREALLOCATED_USER_PMDS KERNEL_PGD_PTRS
191 void pud_populate(struct mm_struct
*mm
, pud_t
*pudp
, pmd_t
*pmd
)
193 paravirt_alloc_pmd(mm
, __pa(pmd
) >> PAGE_SHIFT
);
195 /* Note: almost everything apart from _PAGE_PRESENT is
196 reserved at the pmd (PDPT) level. */
197 set_pud(pudp
, __pud(__pa(pmd
) | _PAGE_PRESENT
));
200 * According to Intel App note "TLBs, Paging-Structure Caches,
201 * and Their Invalidation", April 2007, document 317080-001,
202 * section 8.1: in PAE mode we explicitly have to flush the
203 * TLB via cr3 if the top-level pgd is changed...
207 #else /* !CONFIG_X86_PAE */
209 /* No need to prepopulate any pagetable entries in non-PAE modes. */
210 #define PREALLOCATED_PMDS 0
211 #define MAX_PREALLOCATED_PMDS 0
212 #define PREALLOCATED_USER_PMDS 0
213 #define MAX_PREALLOCATED_USER_PMDS 0
214 #endif /* CONFIG_X86_PAE */
216 static void free_pmds(struct mm_struct
*mm
, pmd_t
*pmds
[], int count
)
219 struct ptdesc
*ptdesc
;
221 for (i
= 0; i
< count
; i
++)
223 ptdesc
= virt_to_ptdesc(pmds
[i
]);
225 pagetable_pmd_dtor(ptdesc
);
226 pagetable_free(ptdesc
);
231 static int preallocate_pmds(struct mm_struct
*mm
, pmd_t
*pmds
[], int count
)
235 gfp_t gfp
= GFP_PGTABLE_USER
;
238 gfp
&= ~__GFP_ACCOUNT
;
239 gfp
&= ~__GFP_HIGHMEM
;
241 for (i
= 0; i
< count
; i
++) {
243 struct ptdesc
*ptdesc
= pagetable_alloc(gfp
, 0);
247 if (ptdesc
&& !pagetable_pmd_ctor(ptdesc
)) {
248 pagetable_free(ptdesc
);
254 pmd
= ptdesc_address(ptdesc
);
261 free_pmds(mm
, pmds
, count
);
269 * Mop up any pmd pages which may still be attached to the pgd.
270 * Normally they will be freed by munmap/exit_mmap, but any pmd we
271 * preallocate which never got a corresponding vma will need to be
274 static void mop_up_one_pmd(struct mm_struct
*mm
, pgd_t
*pgdp
)
278 if (pgd_val(pgd
) != 0) {
279 pmd_t
*pmd
= (pmd_t
*)pgd_page_vaddr(pgd
);
283 paravirt_release_pmd(pgd_val(pgd
) >> PAGE_SHIFT
);
289 static void pgd_mop_up_pmds(struct mm_struct
*mm
, pgd_t
*pgdp
)
293 for (i
= 0; i
< PREALLOCATED_PMDS
; i
++)
294 mop_up_one_pmd(mm
, &pgdp
[i
]);
296 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
298 if (!boot_cpu_has(X86_FEATURE_PTI
))
301 pgdp
= kernel_to_user_pgdp(pgdp
);
303 for (i
= 0; i
< PREALLOCATED_USER_PMDS
; i
++)
304 mop_up_one_pmd(mm
, &pgdp
[i
+ KERNEL_PGD_BOUNDARY
]);
308 static void pgd_prepopulate_pmd(struct mm_struct
*mm
, pgd_t
*pgd
, pmd_t
*pmds
[])
314 p4d
= p4d_offset(pgd
, 0);
315 pud
= pud_offset(p4d
, 0);
317 for (i
= 0; i
< PREALLOCATED_PMDS
; i
++, pud
++) {
318 pmd_t
*pmd
= pmds
[i
];
320 if (i
>= KERNEL_PGD_BOUNDARY
)
321 memcpy(pmd
, (pmd_t
*)pgd_page_vaddr(swapper_pg_dir
[i
]),
322 sizeof(pmd_t
) * PTRS_PER_PMD
);
324 pud_populate(mm
, pud
, pmd
);
328 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
329 static void pgd_prepopulate_user_pmd(struct mm_struct
*mm
,
330 pgd_t
*k_pgd
, pmd_t
*pmds
[])
332 pgd_t
*s_pgd
= kernel_to_user_pgdp(swapper_pg_dir
);
333 pgd_t
*u_pgd
= kernel_to_user_pgdp(k_pgd
);
338 u_p4d
= p4d_offset(u_pgd
, 0);
339 u_pud
= pud_offset(u_p4d
, 0);
341 s_pgd
+= KERNEL_PGD_BOUNDARY
;
342 u_pud
+= KERNEL_PGD_BOUNDARY
;
344 for (i
= 0; i
< PREALLOCATED_USER_PMDS
; i
++, u_pud
++, s_pgd
++) {
345 pmd_t
*pmd
= pmds
[i
];
347 memcpy(pmd
, (pmd_t
*)pgd_page_vaddr(*s_pgd
),
348 sizeof(pmd_t
) * PTRS_PER_PMD
);
350 pud_populate(mm
, u_pud
, pmd
);
355 static void pgd_prepopulate_user_pmd(struct mm_struct
*mm
,
356 pgd_t
*k_pgd
, pmd_t
*pmds
[])
361 * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
362 * assumes that pgd should be in one page.
364 * But kernel with PAE paging that is not running as a Xen domain
365 * only needs to allocate 32 bytes for pgd instead of one page.
367 #ifdef CONFIG_X86_PAE
369 #include <linux/slab.h>
371 #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
374 static struct kmem_cache
*pgd_cache
;
376 void __init
pgtable_cache_init(void)
379 * When PAE kernel is running as a Xen domain, it does not use
380 * shared kernel pmd. And this requires a whole page for pgd.
382 if (!SHARED_KERNEL_PMD
)
386 * when PAE kernel is not running as a Xen domain, it uses
387 * shared kernel pmd. Shared kernel pmd does not require a whole
388 * page for pgd. We are able to just allocate a 32-byte for pgd.
389 * During boot time, we create a 32-byte slab for pgd table allocation.
391 pgd_cache
= kmem_cache_create("pgd_cache", PGD_SIZE
, PGD_ALIGN
,
395 static inline pgd_t
*_pgd_alloc(void)
398 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
399 * We allocate one page for pgd.
401 if (!SHARED_KERNEL_PMD
)
402 return (pgd_t
*)__get_free_pages(GFP_PGTABLE_USER
,
403 PGD_ALLOCATION_ORDER
);
406 * Now PAE kernel is not running as a Xen domain. We can allocate
407 * a 32-byte slab for pgd to save memory space.
409 return kmem_cache_alloc(pgd_cache
, GFP_PGTABLE_USER
);
412 static inline void _pgd_free(pgd_t
*pgd
)
414 if (!SHARED_KERNEL_PMD
)
415 free_pages((unsigned long)pgd
, PGD_ALLOCATION_ORDER
);
417 kmem_cache_free(pgd_cache
, pgd
);
421 static inline pgd_t
*_pgd_alloc(void)
423 return (pgd_t
*)__get_free_pages(GFP_PGTABLE_USER
,
424 PGD_ALLOCATION_ORDER
);
427 static inline void _pgd_free(pgd_t
*pgd
)
429 free_pages((unsigned long)pgd
, PGD_ALLOCATION_ORDER
);
431 #endif /* CONFIG_X86_PAE */
433 pgd_t
*pgd_alloc(struct mm_struct
*mm
)
436 pmd_t
*u_pmds
[MAX_PREALLOCATED_USER_PMDS
];
437 pmd_t
*pmds
[MAX_PREALLOCATED_PMDS
];
446 if (sizeof(pmds
) != 0 &&
447 preallocate_pmds(mm
, pmds
, PREALLOCATED_PMDS
) != 0)
450 if (sizeof(u_pmds
) != 0 &&
451 preallocate_pmds(mm
, u_pmds
, PREALLOCATED_USER_PMDS
) != 0)
454 if (paravirt_pgd_alloc(mm
) != 0)
455 goto out_free_user_pmds
;
458 * Make sure that pre-populating the pmds is atomic with
459 * respect to anything walking the pgd_list, so that they
460 * never see a partially populated pgd.
462 spin_lock(&pgd_lock
);
465 if (sizeof(pmds
) != 0)
466 pgd_prepopulate_pmd(mm
, pgd
, pmds
);
468 if (sizeof(u_pmds
) != 0)
469 pgd_prepopulate_user_pmd(mm
, pgd
, u_pmds
);
471 spin_unlock(&pgd_lock
);
476 if (sizeof(u_pmds
) != 0)
477 free_pmds(mm
, u_pmds
, PREALLOCATED_USER_PMDS
);
479 if (sizeof(pmds
) != 0)
480 free_pmds(mm
, pmds
, PREALLOCATED_PMDS
);
487 void pgd_free(struct mm_struct
*mm
, pgd_t
*pgd
)
489 pgd_mop_up_pmds(mm
, pgd
);
491 paravirt_pgd_free(mm
, pgd
);
496 * Used to set accessed or dirty bits in the page table entries
497 * on other architectures. On x86, the accessed and dirty bits
498 * are tracked by hardware. However, do_wp_page calls this function
499 * to also make the pte writeable at the same time the dirty bit is
500 * set. In that case we do actually need to write the PTE.
502 int ptep_set_access_flags(struct vm_area_struct
*vma
,
503 unsigned long address
, pte_t
*ptep
,
504 pte_t entry
, int dirty
)
506 int changed
= !pte_same(*ptep
, entry
);
508 if (changed
&& dirty
)
509 set_pte(ptep
, entry
);
514 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
515 int pmdp_set_access_flags(struct vm_area_struct
*vma
,
516 unsigned long address
, pmd_t
*pmdp
,
517 pmd_t entry
, int dirty
)
519 int changed
= !pmd_same(*pmdp
, entry
);
521 VM_BUG_ON(address
& ~HPAGE_PMD_MASK
);
523 if (changed
&& dirty
) {
524 set_pmd(pmdp
, entry
);
526 * We had a write-protection fault here and changed the pmd
527 * to to more permissive. No need to flush the TLB for that,
528 * #PF is architecturally guaranteed to do that and in the
529 * worst-case we'll generate a spurious fault.
536 int pudp_set_access_flags(struct vm_area_struct
*vma
, unsigned long address
,
537 pud_t
*pudp
, pud_t entry
, int dirty
)
539 int changed
= !pud_same(*pudp
, entry
);
541 VM_BUG_ON(address
& ~HPAGE_PUD_MASK
);
543 if (changed
&& dirty
) {
544 set_pud(pudp
, entry
);
546 * We had a write-protection fault here and changed the pud
547 * to to more permissive. No need to flush the TLB for that,
548 * #PF is architecturally guaranteed to do that and in the
549 * worst-case we'll generate a spurious fault.
557 int ptep_test_and_clear_young(struct vm_area_struct
*vma
,
558 unsigned long addr
, pte_t
*ptep
)
562 if (pte_young(*ptep
))
563 ret
= test_and_clear_bit(_PAGE_BIT_ACCESSED
,
564 (unsigned long *) &ptep
->pte
);
569 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
570 int pmdp_test_and_clear_young(struct vm_area_struct
*vma
,
571 unsigned long addr
, pmd_t
*pmdp
)
575 if (pmd_young(*pmdp
))
576 ret
= test_and_clear_bit(_PAGE_BIT_ACCESSED
,
577 (unsigned long *)pmdp
);
583 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
584 int pudp_test_and_clear_young(struct vm_area_struct
*vma
,
585 unsigned long addr
, pud_t
*pudp
)
589 if (pud_young(*pudp
))
590 ret
= test_and_clear_bit(_PAGE_BIT_ACCESSED
,
591 (unsigned long *)pudp
);
597 int ptep_clear_flush_young(struct vm_area_struct
*vma
,
598 unsigned long address
, pte_t
*ptep
)
601 * On x86 CPUs, clearing the accessed bit without a TLB flush
602 * doesn't cause data corruption. [ It could cause incorrect
603 * page aging and the (mistaken) reclaim of hot pages, but the
604 * chance of that should be relatively low. ]
606 * So as a performance optimization don't flush the TLB when
607 * clearing the accessed bit, it will eventually be flushed by
608 * a context switch or a VM operation anyway. [ In the rare
609 * event of it not getting flushed for a long time the delay
610 * shouldn't really matter because there's no real memory
611 * pressure for swapout to react to. ]
613 return ptep_test_and_clear_young(vma
, address
, ptep
);
616 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
617 int pmdp_clear_flush_young(struct vm_area_struct
*vma
,
618 unsigned long address
, pmd_t
*pmdp
)
622 VM_BUG_ON(address
& ~HPAGE_PMD_MASK
);
624 young
= pmdp_test_and_clear_young(vma
, address
, pmdp
);
626 flush_tlb_range(vma
, address
, address
+ HPAGE_PMD_SIZE
);
631 pmd_t
pmdp_invalidate_ad(struct vm_area_struct
*vma
, unsigned long address
,
634 VM_WARN_ON_ONCE(!pmd_present(*pmdp
));
637 * No flush is necessary. Once an invalid PTE is established, the PTE's
638 * access and dirty bits cannot be updated.
640 return pmdp_establish(vma
, address
, pmdp
, pmd_mkinvalid(*pmdp
));
644 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
645 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
646 pud_t
pudp_invalidate(struct vm_area_struct
*vma
, unsigned long address
,
649 VM_WARN_ON_ONCE(!pud_present(*pudp
));
650 pud_t old
= pudp_establish(vma
, address
, pudp
, pud_mkinvalid(*pudp
));
651 flush_pud_tlb_range(vma
, address
, address
+ HPAGE_PUD_SIZE
);
657 * reserve_top_address - reserves a hole in the top of kernel address space
658 * @reserve - size of hole to reserve
660 * Can be used to relocate the fixmap area and poke a hole in the top
661 * of kernel address space to make room for a hypervisor.
663 void __init
reserve_top_address(unsigned long reserve
)
666 BUG_ON(fixmaps_set
> 0);
667 __FIXADDR_TOP
= round_down(-reserve
, 1 << PMD_SHIFT
) - PAGE_SIZE
;
668 printk(KERN_INFO
"Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
669 -reserve
, __FIXADDR_TOP
+ PAGE_SIZE
);
675 void __native_set_fixmap(enum fixed_addresses idx
, pte_t pte
)
677 unsigned long address
= __fix_to_virt(idx
);
681 * Ensure that the static initial page tables are covering the
684 BUILD_BUG_ON(__end_of_permanent_fixed_addresses
>
685 (FIXMAP_PMD_NUM
* PTRS_PER_PTE
));
688 if (idx
>= __end_of_fixed_addresses
) {
692 set_pte_vaddr(address
, pte
);
696 void native_set_fixmap(unsigned /* enum fixed_addresses */ idx
,
697 phys_addr_t phys
, pgprot_t flags
)
699 /* Sanitize 'prot' against any unsupported bits: */
700 pgprot_val(flags
) &= __default_kernel_pte_mask
;
702 __native_set_fixmap(idx
, pfn_pte(phys
>> PAGE_SHIFT
, flags
));
705 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
706 #ifdef CONFIG_X86_5LEVEL
708 * p4d_set_huge - setup kernel P4D mapping
710 * No 512GB pages yet -- always return 0
712 int p4d_set_huge(p4d_t
*p4d
, phys_addr_t addr
, pgprot_t prot
)
718 * p4d_clear_huge - clear kernel P4D mapping when it is set
720 * No 512GB pages yet -- always return 0
722 void p4d_clear_huge(p4d_t
*p4d
)
728 * pud_set_huge - setup kernel PUD mapping
730 * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
731 * function sets up a huge page only if the complete range has the same MTRR
734 * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
735 * page mapping attempt fails.
737 * Returns 1 on success and 0 on failure.
739 int pud_set_huge(pud_t
*pud
, phys_addr_t addr
, pgprot_t prot
)
743 mtrr_type_lookup(addr
, addr
+ PUD_SIZE
, &uniform
);
747 /* Bail out if we are we on a populated non-leaf entry: */
748 if (pud_present(*pud
) && !pud_leaf(*pud
))
751 set_pte((pte_t
*)pud
, pfn_pte(
752 (u64
)addr
>> PAGE_SHIFT
,
753 __pgprot(protval_4k_2_large(pgprot_val(prot
)) | _PAGE_PSE
)));
759 * pmd_set_huge - setup kernel PMD mapping
761 * See text over pud_set_huge() above.
763 * Returns 1 on success and 0 on failure.
765 int pmd_set_huge(pmd_t
*pmd
, phys_addr_t addr
, pgprot_t prot
)
769 mtrr_type_lookup(addr
, addr
+ PMD_SIZE
, &uniform
);
771 pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
772 __func__
, addr
, addr
+ PMD_SIZE
);
776 /* Bail out if we are we on a populated non-leaf entry: */
777 if (pmd_present(*pmd
) && !pmd_leaf(*pmd
))
780 set_pte((pte_t
*)pmd
, pfn_pte(
781 (u64
)addr
>> PAGE_SHIFT
,
782 __pgprot(protval_4k_2_large(pgprot_val(prot
)) | _PAGE_PSE
)));
788 * pud_clear_huge - clear kernel PUD mapping when it is set
790 * Returns 1 on success and 0 on failure (no PUD map is found).
792 int pud_clear_huge(pud_t
*pud
)
794 if (pud_leaf(*pud
)) {
803 * pmd_clear_huge - clear kernel PMD mapping when it is set
805 * Returns 1 on success and 0 on failure (no PMD map is found).
807 int pmd_clear_huge(pmd_t
*pmd
)
809 if (pmd_leaf(*pmd
)) {
819 * pud_free_pmd_page - Clear pud entry and free pmd page.
820 * @pud: Pointer to a PUD.
821 * @addr: Virtual address associated with pud.
823 * Context: The pud range has been unmapped and TLB purged.
824 * Return: 1 if clearing the entry succeeded. 0 otherwise.
826 * NOTE: Callers must allow a single page allocation.
828 int pud_free_pmd_page(pud_t
*pud
, unsigned long addr
)
834 pmd
= pud_pgtable(*pud
);
835 pmd_sv
= (pmd_t
*)__get_free_page(GFP_KERNEL
);
839 for (i
= 0; i
< PTRS_PER_PMD
; i
++) {
841 if (!pmd_none(pmd
[i
]))
847 /* INVLPG to clear all paging-structure caches */
848 flush_tlb_kernel_range(addr
, addr
+ PAGE_SIZE
-1);
850 for (i
= 0; i
< PTRS_PER_PMD
; i
++) {
851 if (!pmd_none(pmd_sv
[i
])) {
852 pte
= (pte_t
*)pmd_page_vaddr(pmd_sv
[i
]);
853 free_page((unsigned long)pte
);
857 free_page((unsigned long)pmd_sv
);
859 pagetable_pmd_dtor(virt_to_ptdesc(pmd
));
860 free_page((unsigned long)pmd
);
866 * pmd_free_pte_page - Clear pmd entry and free pte page.
867 * @pmd: Pointer to a PMD.
868 * @addr: Virtual address associated with pmd.
870 * Context: The pmd range has been unmapped and TLB purged.
871 * Return: 1 if clearing the entry succeeded. 0 otherwise.
873 int pmd_free_pte_page(pmd_t
*pmd
, unsigned long addr
)
877 pte
= (pte_t
*)pmd_page_vaddr(*pmd
);
880 /* INVLPG to clear all paging-structure caches */
881 flush_tlb_kernel_range(addr
, addr
+ PAGE_SIZE
-1);
883 free_page((unsigned long)pte
);
888 #else /* !CONFIG_X86_64 */
891 * Disable free page handling on x86-PAE. This assures that ioremap()
892 * does not update sync'd pmd entries. See vmalloc_sync_one().
894 int pmd_free_pte_page(pmd_t
*pmd
, unsigned long addr
)
896 return pmd_none(*pmd
);
899 #endif /* CONFIG_X86_64 */
900 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
902 pte_t
pte_mkwrite(pte_t pte
, struct vm_area_struct
*vma
)
904 if (vma
->vm_flags
& VM_SHADOW_STACK
)
905 return pte_mkwrite_shstk(pte
);
907 pte
= pte_mkwrite_novma(pte
);
909 return pte_clear_saveddirty(pte
);
912 pmd_t
pmd_mkwrite(pmd_t pmd
, struct vm_area_struct
*vma
)
914 if (vma
->vm_flags
& VM_SHADOW_STACK
)
915 return pmd_mkwrite_shstk(pmd
);
917 pmd
= pmd_mkwrite_novma(pmd
);
919 return pmd_clear_saveddirty(pmd
);
922 void arch_check_zapped_pte(struct vm_area_struct
*vma
, pte_t pte
)
925 * Hardware before shadow stack can (rarely) set Dirty=1
926 * on a Write=0 PTE. So the below condition
927 * only indicates a software bug when shadow stack is
928 * supported by the HW. This checking is covered in
931 VM_WARN_ON_ONCE(!(vma
->vm_flags
& VM_SHADOW_STACK
) &&
935 void arch_check_zapped_pmd(struct vm_area_struct
*vma
, pmd_t pmd
)
937 /* See note in arch_check_zapped_pte() */
938 VM_WARN_ON_ONCE(!(vma
->vm_flags
& VM_SHADOW_STACK
) &&
942 void arch_check_zapped_pud(struct vm_area_struct
*vma
, pud_t pud
)
944 /* See note in arch_check_zapped_pte() */
945 VM_WARN_ON_ONCE(!(vma
->vm_flags
& VM_SHADOW_STACK
) && pud_shstk(pud
));