drivers/iio/adc/ad7606.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * AD7606 SPI ADC driver
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  */
   7
   8 #include <linux/delay.h>
   9 #include <linux/device.h>
  10 #include <linux/err.h>
  11 #include <linux/gpio/consumer.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/property.h>
  16 #include <linux/pwm.h>
  17 #include <linux/regulator/consumer.h>
  18 #include <linux/sched.h>
  19 #include <linux/slab.h>
  20 #include <linux/sysfs.h>
  21 #include <linux/units.h>
  22 #include <linux/util_macros.h>
  23
  24 #include <linux/iio/backend.h>
  25 #include <linux/iio/buffer.h>
  26 #include <linux/iio/iio.h>
  27 #include <linux/iio/sysfs.h>
  28 #include <linux/iio/trigger.h>
  29 #include <linux/iio/triggered_buffer.h>
  30 #include <linux/iio/trigger_consumer.h>
  31
  32 #include "ad7606.h"
  33
  34 /*
  35  * Scales are computed as 5000/32768 and 10000/32768 respectively,
  36  * so that when applied to the raw values they provide mV values.
  37  * The scale arrays are kept as IIO_VAL_INT_PLUS_MICRO, so index
  38  * X is the integer part and X + 1 is the fractional part.
  39  */
  40 static const unsigned int ad7606_16bit_hw_scale_avail[2][2] = {
  41         { 0, 152588 }, { 0, 305176 }
  42 };
  43
  44 static const unsigned int ad7606_18bit_hw_scale_avail[2][2] = {
  45         { 0, 38147 }, { 0, 76294 }
  46 };
  47
  48 static const unsigned int ad7606c_16bit_single_ended_unipolar_scale_avail[3][2] = {
  49         { 0, 76294 }, { 0, 152588 }, { 0, 190735 }
  50 };
  51
  52 static const unsigned int ad7606c_16bit_single_ended_bipolar_scale_avail[5][2] = {
  53         { 0, 76294 }, { 0, 152588 }, { 0, 190735 }, { 0, 305176 }, { 0, 381470 }
  54 };
  55
  56 static const unsigned int ad7606c_16bit_differential_bipolar_scale_avail[4][2] = {
  57         { 0, 152588 }, { 0, 305176 }, { 0, 381470 }, { 0, 610352 }
  58 };
  59
  60 static const unsigned int ad7606c_18bit_single_ended_unipolar_scale_avail[3][2] = {
  61         { 0, 19073 }, { 0, 38147 }, { 0, 47684 }
  62 };
  63
  64 static const unsigned int ad7606c_18bit_single_ended_bipolar_scale_avail[5][2] = {
  65         { 0, 19073 }, { 0, 38147 }, { 0, 47684 }, { 0, 76294 }, { 0, 95367 }
  66 };
  67
  68 static const unsigned int ad7606c_18bit_differential_bipolar_scale_avail[4][2] = {
  69         { 0, 38147 }, { 0, 76294 }, { 0, 95367 }, { 0, 152588 }
  70 };
  71
  72 static const unsigned int ad7606_16bit_sw_scale_avail[3][2] = {
  73         { 0, 76293 }, { 0, 152588 }, { 0, 305176 }
  74 };
  75
  76 static const unsigned int ad7607_hw_scale_avail[2][2] = {
  77         { 0, 610352 }, { 1, 220703 }
  78 };
  79
  80 static const unsigned int ad7609_hw_scale_avail[2][2] = {
  81         { 0, 152588 }, { 0, 305176 }
  82 };
  83
  84 static const unsigned int ad7606_oversampling_avail[7] = {
  85         1, 2, 4, 8, 16, 32, 64,
  86 };
  87
  88 static const unsigned int ad7616_oversampling_avail[8] = {
  89         1, 2, 4, 8, 16, 32, 64, 128,
  90 };
  91
  92 static const struct iio_chan_spec ad7605_channels[] = {
  93         IIO_CHAN_SOFT_TIMESTAMP(4),
  94         AD7605_CHANNEL(0),
  95         AD7605_CHANNEL(1),
  96         AD7605_CHANNEL(2),
  97         AD7605_CHANNEL(3),
  98 };
  99
 100 static const struct iio_chan_spec ad7606_channels_16bit[] = {
 101         IIO_CHAN_SOFT_TIMESTAMP(8),
 102         AD7606_CHANNEL(0, 16),
 103         AD7606_CHANNEL(1, 16),
 104         AD7606_CHANNEL(2, 16),
 105         AD7606_CHANNEL(3, 16),
 106         AD7606_CHANNEL(4, 16),
 107         AD7606_CHANNEL(5, 16),
 108         AD7606_CHANNEL(6, 16),
 109         AD7606_CHANNEL(7, 16),
 110 };
 111
 112 static const struct iio_chan_spec ad7606_channels_18bit[] = {
 113         IIO_CHAN_SOFT_TIMESTAMP(8),
 114         AD7606_CHANNEL(0, 18),
 115         AD7606_CHANNEL(1, 18),
 116         AD7606_CHANNEL(2, 18),
 117         AD7606_CHANNEL(3, 18),
 118         AD7606_CHANNEL(4, 18),
 119         AD7606_CHANNEL(5, 18),
 120         AD7606_CHANNEL(6, 18),
 121         AD7606_CHANNEL(7, 18),
 122 };
 123
 124 static const struct iio_chan_spec ad7607_channels[] = {
 125         IIO_CHAN_SOFT_TIMESTAMP(8),
 126         AD7606_CHANNEL(0, 14),
 127         AD7606_CHANNEL(1, 14),
 128         AD7606_CHANNEL(2, 14),
 129         AD7606_CHANNEL(3, 14),
 130         AD7606_CHANNEL(4, 14),
 131         AD7606_CHANNEL(5, 14),
 132         AD7606_CHANNEL(6, 14),
 133         AD7606_CHANNEL(7, 14),
 134 };
 135
 136 static const struct iio_chan_spec ad7608_channels[] = {
 137         IIO_CHAN_SOFT_TIMESTAMP(8),
 138         AD7606_CHANNEL(0, 18),
 139         AD7606_CHANNEL(1, 18),
 140         AD7606_CHANNEL(2, 18),
 141         AD7606_CHANNEL(3, 18),
 142         AD7606_CHANNEL(4, 18),
 143         AD7606_CHANNEL(5, 18),
 144         AD7606_CHANNEL(6, 18),
 145         AD7606_CHANNEL(7, 18),
 146 };
 147
 148 /*
 149  * The current assumption that this driver makes for AD7616, is that it's
 150  * working in Hardware Mode with Serial, Burst and Sequencer modes activated.
 151  * To activate them, following pins must be pulled high:
 152  *      -SER/PAR
 153  *      -SEQEN
 154  * And following pins must be pulled low:
 155  *      -WR/BURST
 156  *      -DB4/SER1W
 157  */
 158 static const struct iio_chan_spec ad7616_channels[] = {
 159         IIO_CHAN_SOFT_TIMESTAMP(16),
 160         AD7606_CHANNEL(0, 16),
 161         AD7606_CHANNEL(1, 16),
 162         AD7606_CHANNEL(2, 16),
 163         AD7606_CHANNEL(3, 16),
 164         AD7606_CHANNEL(4, 16),
 165         AD7606_CHANNEL(5, 16),
 166         AD7606_CHANNEL(6, 16),
 167         AD7606_CHANNEL(7, 16),
 168         AD7606_CHANNEL(8, 16),
 169         AD7606_CHANNEL(9, 16),
 170         AD7606_CHANNEL(10, 16),
 171         AD7606_CHANNEL(11, 16),
 172         AD7606_CHANNEL(12, 16),
 173         AD7606_CHANNEL(13, 16),
 174         AD7606_CHANNEL(14, 16),
 175         AD7606_CHANNEL(15, 16),
 176 };
 177
 178 static int ad7606c_18bit_chan_scale_setup(struct ad7606_state *st,
 179                                           struct iio_chan_spec *chan, int ch);
 180 static int ad7606c_16bit_chan_scale_setup(struct ad7606_state *st,
 181                                           struct iio_chan_spec *chan, int ch);
 182 static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st,
 183                                          struct iio_chan_spec *chan, int ch);
 184 static int ad7607_chan_scale_setup(struct ad7606_state *st,
 185                                    struct iio_chan_spec *chan, int ch);
 186 static int ad7608_chan_scale_setup(struct ad7606_state *st,
 187                                    struct iio_chan_spec *chan, int ch);
 188 static int ad7609_chan_scale_setup(struct ad7606_state *st,
 189                                    struct iio_chan_spec *chan, int ch);
 190
 191 const struct ad7606_chip_info ad7605_4_info = {
 192         .channels = ad7605_channels,
 193         .name = "ad7605-4",
 194         .num_adc_channels = 4,
 195         .num_channels = 5,
 196         .scale_setup_cb = ad7606_16bit_chan_scale_setup,
 197 };
 198 EXPORT_SYMBOL_NS_GPL(ad7605_4_info, "IIO_AD7606");
 199
 200 const struct ad7606_chip_info ad7606_8_info = {
 201         .channels = ad7606_channels_16bit,
 202         .name = "ad7606-8",
 203         .num_adc_channels = 8,
 204         .num_channels = 9,
 205         .oversampling_avail = ad7606_oversampling_avail,
 206         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 207         .scale_setup_cb = ad7606_16bit_chan_scale_setup,
 208 };
 209 EXPORT_SYMBOL_NS_GPL(ad7606_8_info, "IIO_AD7606");
 210
 211 const struct ad7606_chip_info ad7606_6_info = {
 212         .channels = ad7606_channels_16bit,
 213         .name = "ad7606-6",
 214         .num_adc_channels = 6,
 215         .num_channels = 7,
 216         .oversampling_avail = ad7606_oversampling_avail,
 217         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 218         .scale_setup_cb = ad7606_16bit_chan_scale_setup,
 219 };
 220 EXPORT_SYMBOL_NS_GPL(ad7606_6_info, "IIO_AD7606");
 221
 222 const struct ad7606_chip_info ad7606_4_info = {
 223         .channels = ad7606_channels_16bit,
 224         .name = "ad7606-4",
 225         .num_adc_channels = 4,
 226         .num_channels = 5,
 227         .oversampling_avail = ad7606_oversampling_avail,
 228         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 229         .scale_setup_cb = ad7606_16bit_chan_scale_setup,
 230 };
 231 EXPORT_SYMBOL_NS_GPL(ad7606_4_info, "IIO_AD7606");
 232
 233 const struct ad7606_chip_info ad7606b_info = {
 234         .channels = ad7606_channels_16bit,
 235         .max_samplerate = 800 * KILO,
 236         .name = "ad7606b",
 237         .num_adc_channels = 8,
 238         .num_channels = 9,
 239         .oversampling_avail = ad7606_oversampling_avail,
 240         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 241         .scale_setup_cb = ad7606_16bit_chan_scale_setup,
 242 };
 243 EXPORT_SYMBOL_NS_GPL(ad7606b_info, "IIO_AD7606");
 244
 245 const struct ad7606_chip_info ad7606c_16_info = {
 246         .channels = ad7606_channels_16bit,
 247         .name = "ad7606c16",
 248         .num_adc_channels = 8,
 249         .num_channels = 9,
 250         .oversampling_avail = ad7606_oversampling_avail,
 251         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 252         .scale_setup_cb = ad7606c_16bit_chan_scale_setup,
 253 };
 254 EXPORT_SYMBOL_NS_GPL(ad7606c_16_info, "IIO_AD7606");
 255
 256 const struct ad7606_chip_info ad7607_info = {
 257         .channels = ad7607_channels,
 258         .name = "ad7607",
 259         .num_adc_channels = 8,
 260         .num_channels = 9,
 261         .oversampling_avail = ad7606_oversampling_avail,
 262         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 263         .scale_setup_cb = ad7607_chan_scale_setup,
 264 };
 265 EXPORT_SYMBOL_NS_GPL(ad7607_info, "IIO_AD7606");
 266
 267 const struct ad7606_chip_info ad7608_info = {
 268         .channels = ad7608_channels,
 269         .name = "ad7608",
 270         .num_adc_channels = 8,
 271         .num_channels = 9,
 272         .oversampling_avail = ad7606_oversampling_avail,
 273         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 274         .scale_setup_cb = ad7608_chan_scale_setup,
 275 };
 276 EXPORT_SYMBOL_NS_GPL(ad7608_info, "IIO_AD7606");
 277
 278 const struct ad7606_chip_info ad7609_info = {
 279         .channels = ad7608_channels,
 280         .name = "ad7609",
 281         .num_adc_channels = 8,
 282         .num_channels = 9,
 283         .oversampling_avail = ad7606_oversampling_avail,
 284         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 285         .scale_setup_cb = ad7609_chan_scale_setup,
 286 };
 287 EXPORT_SYMBOL_NS_GPL(ad7609_info, "IIO_AD7606");
 288
 289 const struct ad7606_chip_info ad7606c_18_info = {
 290         .channels = ad7606_channels_18bit,
 291         .name = "ad7606c18",
 292         .num_adc_channels = 8,
 293         .num_channels = 9,
 294         .oversampling_avail = ad7606_oversampling_avail,
 295         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
 296         .scale_setup_cb = ad7606c_18bit_chan_scale_setup,
 297 };
 298 EXPORT_SYMBOL_NS_GPL(ad7606c_18_info, "IIO_AD7606");
 299
 300 const struct ad7606_chip_info ad7616_info = {
 301         .channels = ad7616_channels,
 302         .init_delay_ms = 15,
 303         .name = "ad7616",
 304         .num_adc_channels = 16,
 305         .num_channels = 17,
 306         .oversampling_avail = ad7616_oversampling_avail,
 307         .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
 308         .os_req_reset = true,
 309         .scale_setup_cb = ad7606_16bit_chan_scale_setup,
 310 };
 311 EXPORT_SYMBOL_NS_GPL(ad7616_info, "IIO_AD7606");
 312
 313 int ad7606_reset(struct ad7606_state *st)
 314 {
 315         if (st->gpio_reset) {
 316                 gpiod_set_value(st->gpio_reset, 1);
 317                 ndelay(100); /* t_reset >= 100ns */
 318                 gpiod_set_value(st->gpio_reset, 0);
 319                 return 0;
 320         }
 321
 322         return -ENODEV;
 323 }
 324 EXPORT_SYMBOL_NS_GPL(ad7606_reset, "IIO_AD7606");
 325
 326 static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st,
 327                                          struct iio_chan_spec *chan, int ch)
 328 {
 329         struct ad7606_chan_scale *cs = &st->chan_scales[ch];
 330
 331         if (!st->sw_mode_en) {
 332                 /* tied to logic low, analog input range is +/- 5V */
 333                 cs->range = 0;
 334                 cs->scale_avail = ad7606_16bit_hw_scale_avail;
 335                 cs->num_scales = ARRAY_SIZE(ad7606_16bit_hw_scale_avail);
 336                 return 0;
 337         }
 338
 339         /* Scale of 0.076293 is only available in sw mode */
 340         /* After reset, in software mode, ±10 V is set by default */
 341         cs->range = 2;
 342         cs->scale_avail = ad7606_16bit_sw_scale_avail;
 343         cs->num_scales = ARRAY_SIZE(ad7606_16bit_sw_scale_avail);
 344
 345         return 0;
 346 }
 347
 348 static int ad7606_get_chan_config(struct ad7606_state *st, int ch,
 349                                   bool *bipolar, bool *differential)
 350 {
 351         unsigned int num_channels = st->chip_info->num_channels - 1;
 352         struct device *dev = st->dev;
 353         int ret;
 354
 355         *bipolar = false;
 356         *differential = false;
 357
 358         device_for_each_child_node_scoped(dev, child) {
 359                 u32 pins[2];
 360                 int reg;
 361
 362                 ret = fwnode_property_read_u32(child, "reg", &reg);
 363                 if (ret)
 364                         continue;
 365
 366                 /* channel number (here) is from 1 to num_channels */
 367                 if (reg == 0 || reg > num_channels) {
 368                         dev_warn(dev,
 369                                  "Invalid channel number (ignoring): %d\n", reg);
 370                         continue;
 371                 }
 372
 373                 if (reg != (ch + 1))
 374                         continue;
 375
 376                 *bipolar = fwnode_property_read_bool(child, "bipolar");
 377
 378                 ret = fwnode_property_read_u32_array(child, "diff-channels",
 379                                                      pins, ARRAY_SIZE(pins));
 380                 /* Channel is differential, if pins are the same as 'reg' */
 381                 if (ret == 0 && (pins[0] != reg || pins[1] != reg)) {
 382                         dev_err(dev,
 383                                 "Differential pins must be the same as 'reg'");
 384                         return -EINVAL;
 385                 }
 386
 387                 *differential = (ret == 0);
 388
 389                 if (*differential && !*bipolar) {
 390                         dev_err(dev,
 391                                 "'bipolar' must be added for diff channel %d\n",
 392                                 reg);
 393                         return -EINVAL;
 394                 }
 395
 396                 return 0;
 397         }
 398
 399         return 0;
 400 }
 401
 402 static int ad7606c_18bit_chan_scale_setup(struct ad7606_state *st,
 403                                           struct iio_chan_spec *chan, int ch)
 404 {
 405         struct ad7606_chan_scale *cs = &st->chan_scales[ch];
 406         bool bipolar, differential;
 407         int ret;
 408
 409         if (!st->sw_mode_en) {
 410                 cs->range = 0;
 411                 cs->scale_avail = ad7606_18bit_hw_scale_avail;
 412                 cs->num_scales = ARRAY_SIZE(ad7606_18bit_hw_scale_avail);
 413                 return 0;
 414         }
 415
 416         ret = ad7606_get_chan_config(st, ch, &bipolar, &differential);
 417         if (ret)
 418                 return ret;
 419
 420         if (differential) {
 421                 cs->scale_avail = ad7606c_18bit_differential_bipolar_scale_avail;
 422                 cs->num_scales =
 423                         ARRAY_SIZE(ad7606c_18bit_differential_bipolar_scale_avail);
 424                 /* Bipolar differential ranges start at 8 (b1000) */
 425                 cs->reg_offset = 8;
 426                 cs->range = 1;
 427                 chan->differential = 1;
 428                 chan->channel2 = chan->channel;
 429
 430                 return 0;
 431         }
 432
 433         chan->differential = 0;
 434
 435         if (bipolar) {
 436                 cs->scale_avail = ad7606c_18bit_single_ended_bipolar_scale_avail;
 437                 cs->num_scales =
 438                         ARRAY_SIZE(ad7606c_18bit_single_ended_bipolar_scale_avail);
 439                 /* Bipolar single-ended ranges start at 0 (b0000) */
 440                 cs->reg_offset = 0;
 441                 cs->range = 3;
 442                 chan->scan_type.sign = 's';
 443
 444                 return 0;
 445         }
 446
 447         cs->scale_avail = ad7606c_18bit_single_ended_unipolar_scale_avail;
 448         cs->num_scales =
 449                 ARRAY_SIZE(ad7606c_18bit_single_ended_unipolar_scale_avail);
 450         /* Unipolar single-ended ranges start at 5 (b0101) */
 451         cs->reg_offset = 5;
 452         cs->range = 1;
 453         chan->scan_type.sign = 'u';
 454
 455         return 0;
 456 }
 457
 458 static int ad7606c_16bit_chan_scale_setup(struct ad7606_state *st,
 459                                           struct iio_chan_spec *chan, int ch)
 460 {
 461         struct ad7606_chan_scale *cs = &st->chan_scales[ch];
 462         bool bipolar, differential;
 463         int ret;
 464
 465         if (!st->sw_mode_en) {
 466                 cs->range = 0;
 467                 cs->scale_avail = ad7606_16bit_hw_scale_avail;
 468                 cs->num_scales = ARRAY_SIZE(ad7606_16bit_hw_scale_avail);
 469                 return 0;
 470         }
 471
 472         ret = ad7606_get_chan_config(st, ch, &bipolar, &differential);
 473         if (ret)
 474                 return ret;
 475
 476         if (differential) {
 477                 cs->scale_avail = ad7606c_16bit_differential_bipolar_scale_avail;
 478                 cs->num_scales =
 479                         ARRAY_SIZE(ad7606c_16bit_differential_bipolar_scale_avail);
 480                 /* Bipolar differential ranges start at 8 (b1000) */
 481                 cs->reg_offset = 8;
 482                 cs->range = 1;
 483                 chan->differential = 1;
 484                 chan->channel2 = chan->channel;
 485                 chan->scan_type.sign = 's';
 486
 487                 return 0;
 488         }
 489
 490         chan->differential = 0;
 491
 492         if (bipolar) {
 493                 cs->scale_avail = ad7606c_16bit_single_ended_bipolar_scale_avail;
 494                 cs->num_scales =
 495                         ARRAY_SIZE(ad7606c_16bit_single_ended_bipolar_scale_avail);
 496                 /* Bipolar single-ended ranges start at 0 (b0000) */
 497                 cs->reg_offset = 0;
 498                 cs->range = 3;
 499                 chan->scan_type.sign = 's';
 500
 501                 return 0;
 502         }
 503
 504         cs->scale_avail = ad7606c_16bit_single_ended_unipolar_scale_avail;
 505         cs->num_scales =
 506                 ARRAY_SIZE(ad7606c_16bit_single_ended_unipolar_scale_avail);
 507         /* Unipolar single-ended ranges start at 5 (b0101) */
 508         cs->reg_offset = 5;
 509         cs->range = 1;
 510         chan->scan_type.sign = 'u';
 511
 512         return 0;
 513 }
 514
 515 static int ad7607_chan_scale_setup(struct ad7606_state *st,
 516                                    struct iio_chan_spec *chan, int ch)
 517 {
 518         struct ad7606_chan_scale *cs = &st->chan_scales[ch];
 519
 520         cs->range = 0;
 521         cs->scale_avail = ad7607_hw_scale_avail;
 522         cs->num_scales = ARRAY_SIZE(ad7607_hw_scale_avail);
 523         return 0;
 524 }
 525
 526 static int ad7608_chan_scale_setup(struct ad7606_state *st,
 527                                    struct iio_chan_spec *chan, int ch)
 528 {
 529         struct ad7606_chan_scale *cs = &st->chan_scales[ch];
 530
 531         cs->range = 0;
 532         cs->scale_avail = ad7606_18bit_hw_scale_avail;
 533         cs->num_scales = ARRAY_SIZE(ad7606_18bit_hw_scale_avail);
 534         return 0;
 535 }
 536
 537 static int ad7609_chan_scale_setup(struct ad7606_state *st,
 538                                    struct iio_chan_spec *chan, int ch)
 539 {
 540         struct ad7606_chan_scale *cs = &st->chan_scales[ch];
 541
 542         cs->range = 0;
 543         cs->scale_avail = ad7609_hw_scale_avail;
 544         cs->num_scales = ARRAY_SIZE(ad7609_hw_scale_avail);
 545         return 0;
 546 }
 547
 548 static int ad7606_reg_access(struct iio_dev *indio_dev,
 549                              unsigned int reg,
 550                              unsigned int writeval,
 551                              unsigned int *readval)
 552 {
 553         struct ad7606_state *st = iio_priv(indio_dev);
 554         int ret;
 555
 556         guard(mutex)(&st->lock);
 557
 558         if (readval) {
 559                 ret = st->bops->reg_read(st, reg);
 560                 if (ret < 0)
 561                         return ret;
 562                 *readval = ret;
 563                 return 0;
 564         } else {
 565                 return st->bops->reg_write(st, reg, writeval);
 566         }
 567 }
 568
 569 static int ad7606_pwm_set_high(struct ad7606_state *st)
 570 {
 571         struct pwm_state cnvst_pwm_state;
 572         int ret;
 573
 574         pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
 575         cnvst_pwm_state.enabled = true;
 576         cnvst_pwm_state.duty_cycle = cnvst_pwm_state.period;
 577
 578         ret = pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state);
 579
 580         return ret;
 581 }
 582
 583 static int ad7606_pwm_set_low(struct ad7606_state *st)
 584 {
 585         struct pwm_state cnvst_pwm_state;
 586         int ret;
 587
 588         pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
 589         cnvst_pwm_state.enabled = true;
 590         cnvst_pwm_state.duty_cycle = 0;
 591
 592         ret = pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state);
 593
 594         return ret;
 595 }
 596
 597 static int ad7606_pwm_set_swing(struct ad7606_state *st)
 598 {
 599         struct pwm_state cnvst_pwm_state;
 600
 601         pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
 602         cnvst_pwm_state.enabled = true;
 603         cnvst_pwm_state.duty_cycle = cnvst_pwm_state.period / 2;
 604
 605         return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state);
 606 }
 607
 608 static bool ad7606_pwm_is_swinging(struct ad7606_state *st)
 609 {
 610         struct pwm_state cnvst_pwm_state;
 611
 612         pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
 613
 614         return cnvst_pwm_state.duty_cycle != cnvst_pwm_state.period &&
 615                cnvst_pwm_state.duty_cycle != 0;
 616 }
 617
 618 static int ad7606_set_sampling_freq(struct ad7606_state *st, unsigned long freq)
 619 {
 620         struct pwm_state cnvst_pwm_state;
 621         bool is_swinging = ad7606_pwm_is_swinging(st);
 622         bool is_high;
 623
 624         if (freq == 0)
 625                 return -EINVAL;
 626
 627         /* Retrieve the previous state. */
 628         pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
 629         is_high = cnvst_pwm_state.duty_cycle == cnvst_pwm_state.period;
 630
 631         cnvst_pwm_state.period = DIV_ROUND_UP_ULL(NSEC_PER_SEC, freq);
 632         cnvst_pwm_state.polarity = PWM_POLARITY_NORMAL;
 633         if (is_high)
 634                 cnvst_pwm_state.duty_cycle = cnvst_pwm_state.period;
 635         else if (is_swinging)
 636                 cnvst_pwm_state.duty_cycle = cnvst_pwm_state.period / 2;
 637         else
 638                 cnvst_pwm_state.duty_cycle = 0;
 639
 640         return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state);
 641 }
 642
 643 static int ad7606_read_samples(struct ad7606_state *st)
 644 {
 645         unsigned int num = st->chip_info->num_adc_channels;
 646
 647         return st->bops->read_block(st->dev, num, &st->data);
 648 }
 649
 650 static irqreturn_t ad7606_trigger_handler(int irq, void *p)
 651 {
 652         struct iio_poll_func *pf = p;
 653         struct iio_dev *indio_dev = pf->indio_dev;
 654         struct ad7606_state *st = iio_priv(indio_dev);
 655         int ret;
 656
 657         guard(mutex)(&st->lock);
 658
 659         ret = ad7606_read_samples(st);
 660         if (ret)
 661                 goto error_ret;
 662
 663         iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
 664                                            iio_get_time_ns(indio_dev));
 665 error_ret:
 666         iio_trigger_notify_done(indio_dev->trig);
 667         /* The rising edge of the CONVST signal starts a new conversion. */
 668         gpiod_set_value(st->gpio_convst, 1);
 669
 670         return IRQ_HANDLED;
 671 }
 672
 673 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch,
 674                               int *val)
 675 {
 676         struct ad7606_state *st = iio_priv(indio_dev);
 677         unsigned int realbits = st->chip_info->channels[1].scan_type.realbits;
 678         const struct iio_chan_spec *chan;
 679         int ret;
 680
 681         if (st->gpio_convst) {
 682                 gpiod_set_value(st->gpio_convst, 1);
 683         } else {
 684                 ret = ad7606_pwm_set_high(st);
 685                 if (ret < 0)
 686                         return ret;
 687         }
 688
 689         /*
 690          * If no backend, wait for the interruption on busy pin, otherwise just add
 691          * a delay to leave time for the data to be available. For now, the latter
 692          * will not happen because IIO_CHAN_INFO_RAW is not supported for the backend.
 693          * TODO: Add support for reading a single value when the backend is used.
 694          */
 695         if (!st->back) {
 696                 ret = wait_for_completion_timeout(&st->completion,
 697                                                   msecs_to_jiffies(1000));
 698                 if (!ret) {
 699                         ret = -ETIMEDOUT;
 700                         goto error_ret;
 701                 }
 702         } else {
 703                 fsleep(1);
 704         }
 705
 706         ret = ad7606_read_samples(st);
 707         if (ret)
 708                 goto error_ret;
 709
 710         chan = &indio_dev->channels[ch + 1];
 711         if (chan->scan_type.sign == 'u') {
 712                 if (realbits > 16)
 713                         *val = st->data.buf32[ch];
 714                 else
 715                         *val = st->data.buf16[ch];
 716         } else {
 717                 if (realbits > 16)
 718                         *val = sign_extend32(st->data.buf32[ch], realbits - 1);
 719                 else
 720                         *val = sign_extend32(st->data.buf16[ch], realbits - 1);
 721         }
 722
 723 error_ret:
 724         if (!st->gpio_convst) {
 725                 ret = ad7606_pwm_set_low(st);
 726                 if (ret < 0)
 727                         return ret;
 728         }
 729         gpiod_set_value(st->gpio_convst, 0);
 730
 731         return ret;
 732 }
 733
 734 static int ad7606_read_raw(struct iio_dev *indio_dev,
 735                            struct iio_chan_spec const *chan,
 736                            int *val,
 737                            int *val2,
 738                            long m)
 739 {
 740         int ret, ch = 0;
 741         struct ad7606_state *st = iio_priv(indio_dev);
 742         struct ad7606_chan_scale *cs;
 743         struct pwm_state cnvst_pwm_state;
 744
 745         switch (m) {
 746         case IIO_CHAN_INFO_RAW:
 747                 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
 748                         ret = ad7606_scan_direct(indio_dev, chan->address, val);
 749                         if (ret < 0)
 750                                 return ret;
 751                         return IIO_VAL_INT;
 752                 }
 753                 unreachable();
 754         case IIO_CHAN_INFO_SCALE:
 755                 if (st->sw_mode_en)
 756                         ch = chan->address;
 757                 cs = &st->chan_scales[ch];
 758                 *val = cs->scale_avail[cs->range][0];
 759                 *val2 = cs->scale_avail[cs->range][1];
 760                 return IIO_VAL_INT_PLUS_MICRO;
 761         case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 762                 *val = st->oversampling;
 763                 return IIO_VAL_INT;
 764         case IIO_CHAN_INFO_SAMP_FREQ:
 765                 /*
 766                  * TODO: return the real frequency intead of the requested one once
 767                  * pwm_get_state_hw comes upstream.
 768                  */
 769                 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
 770                 *val = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, cnvst_pwm_state.period);
 771                 return IIO_VAL_INT;
 772         }
 773         return -EINVAL;
 774 }
 775
 776 static ssize_t in_voltage_scale_available_show(struct device *dev,
 777                                                struct device_attribute *attr,
 778                                                char *buf)
 779 {
 780         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 781         struct ad7606_state *st = iio_priv(indio_dev);
 782         struct ad7606_chan_scale *cs = &st->chan_scales[0];
 783         const unsigned int (*vals)[2] = cs->scale_avail;
 784         unsigned int i;
 785         size_t len = 0;
 786
 787         for (i = 0; i < cs->num_scales; i++)
 788                 len += scnprintf(buf + len, PAGE_SIZE - len, "%u.%06u ",
 789                                  vals[i][0], vals[i][1]);
 790         buf[len - 1] = '\n';
 791
 792         return len;
 793 }
 794
 795 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
 796
 797 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
 798 {
 799         struct ad7606_state *st = iio_priv(indio_dev);
 800
 801         gpiod_set_value(st->gpio_range, val);
 802
 803         return 0;
 804 }
 805
 806 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
 807 {
 808         struct ad7606_state *st = iio_priv(indio_dev);
 809         DECLARE_BITMAP(values, 3);
 810
 811         values[0] = val & GENMASK(2, 0);
 812
 813         gpiod_set_array_value(st->gpio_os->ndescs, st->gpio_os->desc,
 814                               st->gpio_os->info, values);
 815
 816         /* AD7616 requires a reset to update value */
 817         if (st->chip_info->os_req_reset)
 818                 ad7606_reset(st);
 819
 820         return 0;
 821 }
 822
 823 static int ad7606_write_raw(struct iio_dev *indio_dev,
 824                             struct iio_chan_spec const *chan,
 825                             int val,
 826                             int val2,
 827                             long mask)
 828 {
 829         struct ad7606_state *st = iio_priv(indio_dev);
 830         unsigned int scale_avail_uv[AD760X_MAX_SCALES];
 831         struct ad7606_chan_scale *cs;
 832         int i, ret, ch = 0;
 833
 834         guard(mutex)(&st->lock);
 835
 836         switch (mask) {
 837         case IIO_CHAN_INFO_SCALE:
 838                 if (st->sw_mode_en)
 839                         ch = chan->address;
 840                 cs = &st->chan_scales[ch];
 841                 for (i = 0; i < cs->num_scales; i++) {
 842                         scale_avail_uv[i] = cs->scale_avail[i][0] * MICRO +
 843                                             cs->scale_avail[i][1];
 844                 }
 845                 val = (val * MICRO) + val2;
 846                 i = find_closest(val, scale_avail_uv, cs->num_scales);
 847                 ret = st->write_scale(indio_dev, ch, i + cs->reg_offset);
 848                 if (ret < 0)
 849                         return ret;
 850                 cs->range = i;
 851
 852                 return 0;
 853         case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 854                 if (val2)
 855                         return -EINVAL;
 856                 i = find_closest(val, st->oversampling_avail,
 857                                  st->num_os_ratios);
 858                 ret = st->write_os(indio_dev, i);
 859                 if (ret < 0)
 860                         return ret;
 861                 st->oversampling = st->oversampling_avail[i];
 862
 863                 return 0;
 864         case IIO_CHAN_INFO_SAMP_FREQ:
 865                 if (val < 0 && val2 != 0)
 866                         return -EINVAL;
 867                 return ad7606_set_sampling_freq(st, val);
 868         default:
 869                 return -EINVAL;
 870         }
 871 }
 872
 873 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
 874                                                struct device_attribute *attr,
 875                                                char *buf)
 876 {
 877         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 878         struct ad7606_state *st = iio_priv(indio_dev);
 879         const unsigned int *vals = st->oversampling_avail;
 880         unsigned int i;
 881         size_t len = 0;
 882
 883         for (i = 0; i < st->num_os_ratios; i++)
 884                 len += scnprintf(buf + len, PAGE_SIZE - len, "%u ", vals[i]);
 885         buf[len - 1] = '\n';
 886
 887         return len;
 888 }
 889
 890 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
 891                        ad7606_oversampling_ratio_avail, NULL, 0);
 892
 893 static struct attribute *ad7606_attributes_os_and_range[] = {
 894         &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
 895         &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
 896         NULL,
 897 };
 898
 899 static const struct attribute_group ad7606_attribute_group_os_and_range = {
 900         .attrs = ad7606_attributes_os_and_range,
 901 };
 902
 903 static struct attribute *ad7606_attributes_os[] = {
 904         &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
 905         NULL,
 906 };
 907
 908 static const struct attribute_group ad7606_attribute_group_os = {
 909         .attrs = ad7606_attributes_os,
 910 };
 911
 912 static struct attribute *ad7606_attributes_range[] = {
 913         &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
 914         NULL,
 915 };
 916
 917 static const struct attribute_group ad7606_attribute_group_range = {
 918         .attrs = ad7606_attributes_range,
 919 };
 920
 921 static int ad7606_request_gpios(struct ad7606_state *st)
 922 {
 923         struct device *dev = st->dev;
 924
 925         st->gpio_convst = devm_gpiod_get_optional(dev, "adi,conversion-start",
 926                                                   GPIOD_OUT_LOW);
 927
 928         if (IS_ERR(st->gpio_convst))
 929                 return PTR_ERR(st->gpio_convst);
 930
 931         st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
 932         if (IS_ERR(st->gpio_reset))
 933                 return PTR_ERR(st->gpio_reset);
 934
 935         st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
 936                                                  GPIOD_OUT_LOW);
 937         if (IS_ERR(st->gpio_range))
 938                 return PTR_ERR(st->gpio_range);
 939
 940         st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
 941                                                    GPIOD_OUT_LOW);
 942         if (IS_ERR(st->gpio_standby))
 943                 return PTR_ERR(st->gpio_standby);
 944
 945         st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
 946                                                     GPIOD_IN);
 947         if (IS_ERR(st->gpio_frstdata))
 948                 return PTR_ERR(st->gpio_frstdata);
 949
 950         if (!st->chip_info->oversampling_num)
 951                 return 0;
 952
 953         st->gpio_os = devm_gpiod_get_array_optional(dev,
 954                                                     "adi,oversampling-ratio",
 955                                                     GPIOD_OUT_LOW);
 956         return PTR_ERR_OR_ZERO(st->gpio_os);
 957 }
 958
 959 /*
 960  * The BUSY signal indicates when conversions are in progress, so when a rising
 961  * edge of CONVST is applied, BUSY goes logic high and transitions low at the
 962  * end of the entire conversion process. The falling edge of the BUSY signal
 963  * triggers this interrupt.
 964  */
 965 static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
 966 {
 967         struct iio_dev *indio_dev = dev_id;
 968         struct ad7606_state *st = iio_priv(indio_dev);
 969         int ret;
 970
 971         if (iio_buffer_enabled(indio_dev)) {
 972                 if (st->gpio_convst) {
 973                         gpiod_set_value(st->gpio_convst, 0);
 974                 } else {
 975                         ret = ad7606_pwm_set_low(st);
 976                         if (ret < 0) {
 977                                 dev_err(st->dev, "PWM set low failed");
 978                                 goto done;
 979                         }
 980                 }
 981                 iio_trigger_poll_nested(st->trig);
 982         } else {
 983                 complete(&st->completion);
 984         }
 985
 986 done:
 987         return IRQ_HANDLED;
 988 };
 989
 990 static int ad7606_validate_trigger(struct iio_dev *indio_dev,
 991                                    struct iio_trigger *trig)
 992 {
 993         struct ad7606_state *st = iio_priv(indio_dev);
 994
 995         if (st->trig != trig)
 996                 return -EINVAL;
 997
 998         return 0;
 999 }
1000
1001 static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
1002 {
1003         struct ad7606_state *st = iio_priv(indio_dev);
1004
1005         gpiod_set_value(st->gpio_convst, 1);
1006
1007         return 0;
1008 }
1009
1010 static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
1011 {
1012         struct ad7606_state *st = iio_priv(indio_dev);
1013
1014         gpiod_set_value(st->gpio_convst, 0);
1015
1016         return 0;
1017 }
1018
1019 static int ad7606_read_avail(struct iio_dev *indio_dev,
1020                              struct iio_chan_spec const *chan,
1021                              const int **vals, int *type, int *length,
1022                              long info)
1023 {
1024         struct ad7606_state *st = iio_priv(indio_dev);
1025         struct ad7606_chan_scale *cs;
1026         unsigned int ch = 0;
1027
1028         switch (info) {
1029         case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
1030                 *vals = st->oversampling_avail;
1031                 *length = st->num_os_ratios;
1032                 *type = IIO_VAL_INT;
1033
1034                 return IIO_AVAIL_LIST;
1035
1036         case IIO_CHAN_INFO_SCALE:
1037                 if (st->sw_mode_en)
1038                         ch = chan->address;
1039
1040                 cs = &st->chan_scales[ch];
1041                 *vals = (int *)cs->scale_avail;
1042                 *length = cs->num_scales;
1043                 *type = IIO_VAL_INT_PLUS_MICRO;
1044
1045                 return IIO_AVAIL_LIST;
1046         }
1047         return -EINVAL;
1048 }
1049
1050 static int ad7606_backend_buffer_postenable(struct iio_dev *indio_dev)
1051 {
1052         struct ad7606_state *st = iio_priv(indio_dev);
1053
1054         return ad7606_pwm_set_swing(st);
1055 }
1056
1057 static int ad7606_backend_buffer_predisable(struct iio_dev *indio_dev)
1058 {
1059         struct ad7606_state *st = iio_priv(indio_dev);
1060
1061         return ad7606_pwm_set_low(st);
1062 }
1063
1064 static int ad7606_update_scan_mode(struct iio_dev *indio_dev,
1065                                    const unsigned long *scan_mask)
1066 {
1067         struct ad7606_state *st = iio_priv(indio_dev);
1068
1069         /*
1070          * The update scan mode is only for iio backend compatible drivers.
1071          * If the specific update_scan_mode is not defined in the bus ops,
1072          * just do nothing and return 0.
1073          */
1074         if (!st->bops->update_scan_mode)
1075                 return 0;
1076
1077         return st->bops->update_scan_mode(indio_dev, scan_mask);
1078 }
1079
1080 static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
1081         .postenable = &ad7606_buffer_postenable,
1082         .predisable = &ad7606_buffer_predisable,
1083 };
1084
1085 static const struct iio_buffer_setup_ops ad7606_backend_buffer_ops = {
1086         .postenable = &ad7606_backend_buffer_postenable,
1087         .predisable = &ad7606_backend_buffer_predisable,
1088 };
1089
1090 static const struct iio_info ad7606_info_no_os_or_range = {
1091         .read_raw = &ad7606_read_raw,
1092         .validate_trigger = &ad7606_validate_trigger,
1093         .update_scan_mode = &ad7606_update_scan_mode,
1094 };
1095
1096 static const struct iio_info ad7606_info_os_and_range = {
1097         .read_raw = &ad7606_read_raw,
1098         .write_raw = &ad7606_write_raw,
1099         .attrs = &ad7606_attribute_group_os_and_range,
1100         .validate_trigger = &ad7606_validate_trigger,
1101         .update_scan_mode = &ad7606_update_scan_mode,
1102 };
1103
1104 static const struct iio_info ad7606_info_sw_mode = {
1105         .read_raw = &ad7606_read_raw,
1106         .write_raw = &ad7606_write_raw,
1107         .read_avail = &ad7606_read_avail,
1108         .debugfs_reg_access = &ad7606_reg_access,
1109         .validate_trigger = &ad7606_validate_trigger,
1110         .update_scan_mode = &ad7606_update_scan_mode,
1111 };
1112
1113 static const struct iio_info ad7606_info_os = {
1114         .read_raw = &ad7606_read_raw,
1115         .write_raw = &ad7606_write_raw,
1116         .attrs = &ad7606_attribute_group_os,
1117         .validate_trigger = &ad7606_validate_trigger,
1118         .update_scan_mode = &ad7606_update_scan_mode,
1119 };
1120
1121 static const struct iio_info ad7606_info_range = {
1122         .read_raw = &ad7606_read_raw,
1123         .write_raw = &ad7606_write_raw,
1124         .attrs = &ad7606_attribute_group_range,
1125         .validate_trigger = &ad7606_validate_trigger,
1126         .update_scan_mode = &ad7606_update_scan_mode,
1127 };
1128
1129 static const struct iio_trigger_ops ad7606_trigger_ops = {
1130         .validate_device = iio_trigger_validate_own_device,
1131 };
1132
1133 static int ad7606_sw_mode_setup(struct iio_dev *indio_dev)
1134 {
1135         struct ad7606_state *st = iio_priv(indio_dev);
1136
1137         st->sw_mode_en = st->bops->sw_mode_config &&
1138                          device_property_present(st->dev, "adi,sw-mode");
1139         if (!st->sw_mode_en)
1140                 return 0;
1141
1142         indio_dev->info = &ad7606_info_sw_mode;
1143
1144         return st->bops->sw_mode_config(indio_dev);
1145 }
1146
1147 static int ad7606_chan_scales_setup(struct iio_dev *indio_dev)
1148 {
1149         unsigned int num_channels = indio_dev->num_channels - 1;
1150         struct ad7606_state *st = iio_priv(indio_dev);
1151         struct iio_chan_spec *chans;
1152         size_t size;
1153         int ch, ret;
1154
1155         /* Clone IIO channels, since some may be differential */
1156         size = indio_dev->num_channels * sizeof(*indio_dev->channels);
1157         chans = devm_kzalloc(st->dev, size, GFP_KERNEL);
1158         if (!chans)
1159                 return -ENOMEM;
1160
1161         memcpy(chans, indio_dev->channels, size);
1162         indio_dev->channels = chans;
1163
1164         for (ch = 0; ch < num_channels; ch++) {
1165                 ret = st->chip_info->scale_setup_cb(st, &chans[ch + 1], ch);
1166                 if (ret)
1167                         return ret;
1168         }
1169
1170         return 0;
1171 }
1172
1173 static void ad7606_pwm_disable(void *data)
1174 {
1175         pwm_disable(data);
1176 }
1177
1178 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
1179                  const struct ad7606_chip_info *chip_info,
1180                  const struct ad7606_bus_ops *bops)
1181 {
1182         struct ad7606_state *st;
1183         int ret;
1184         struct iio_dev *indio_dev;
1185
1186         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1187         if (!indio_dev)
1188                 return -ENOMEM;
1189
1190         st = iio_priv(indio_dev);
1191         dev_set_drvdata(dev, indio_dev);
1192
1193         st->dev = dev;
1194         mutex_init(&st->lock);
1195         st->bops = bops;
1196         st->base_address = base_address;
1197         st->oversampling = 1;
1198
1199         ret = devm_regulator_get_enable(dev, "avcc");
1200         if (ret)
1201                 return dev_err_probe(dev, ret,
1202                                      "Failed to enable specified AVcc supply\n");
1203
1204         st->chip_info = chip_info;
1205
1206         if (st->chip_info->oversampling_num) {
1207                 st->oversampling_avail = st->chip_info->oversampling_avail;
1208                 st->num_os_ratios = st->chip_info->oversampling_num;
1209         }
1210
1211         ret = ad7606_request_gpios(st);
1212         if (ret)
1213                 return ret;
1214
1215         if (st->gpio_os) {
1216                 if (st->gpio_range)
1217                         indio_dev->info = &ad7606_info_os_and_range;
1218                 else
1219                         indio_dev->info = &ad7606_info_os;
1220         } else {
1221                 if (st->gpio_range)
1222                         indio_dev->info = &ad7606_info_range;
1223                 else
1224                         indio_dev->info = &ad7606_info_no_os_or_range;
1225         }
1226         indio_dev->modes = INDIO_DIRECT_MODE;
1227         indio_dev->name = chip_info->name;
1228         indio_dev->channels = st->chip_info->channels;
1229         indio_dev->num_channels = st->chip_info->num_channels;
1230
1231         ret = ad7606_reset(st);
1232         if (ret)
1233                 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
1234
1235         /* AD7616 requires al least 15ms to reconfigure after a reset */
1236         if (st->chip_info->init_delay_ms) {
1237                 if (msleep_interruptible(st->chip_info->init_delay_ms))
1238                         return -ERESTARTSYS;
1239         }
1240
1241         st->write_scale = ad7606_write_scale_hw;
1242         st->write_os = ad7606_write_os_hw;
1243
1244         ret = ad7606_sw_mode_setup(indio_dev);
1245         if (ret)
1246                 return ret;
1247
1248         ret = ad7606_chan_scales_setup(indio_dev);
1249         if (ret)
1250                 return ret;
1251
1252         /* If convst pin is not defined, setup PWM. */
1253         if (!st->gpio_convst) {
1254                 st->cnvst_pwm = devm_pwm_get(dev, NULL);
1255                 if (IS_ERR(st->cnvst_pwm))
1256                         return PTR_ERR(st->cnvst_pwm);
1257
1258                 /* The PWM is initialized at 1MHz to have a fast enough GPIO emulation. */
1259                 ret = ad7606_set_sampling_freq(st, 1 * MEGA);
1260                 if (ret)
1261                         return ret;
1262
1263                 ret = ad7606_pwm_set_low(st);
1264                 if (ret)
1265                         return ret;
1266
1267                 /*
1268                  * PWM is not disabled when sampling stops, but instead its duty cycle is set
1269                  * to 0% to be sure we have a "low" state. After we unload the driver, let's
1270                  * disable the PWM.
1271                  */
1272                 ret = devm_add_action_or_reset(dev, ad7606_pwm_disable,
1273                                                st->cnvst_pwm);
1274                 if (ret)
1275                         return ret;
1276         }
1277
1278         if (st->bops->iio_backend_config) {
1279                 /*
1280                  * If there is a backend, the PWM should not overpass the maximum sampling
1281                  * frequency the chip supports.
1282                  */
1283                 ret = ad7606_set_sampling_freq(st,
1284                                                chip_info->max_samplerate ? : 2 * KILO);
1285                 if (ret)
1286                         return ret;
1287
1288                 ret = st->bops->iio_backend_config(dev, indio_dev);
1289                 if (ret)
1290                         return ret;
1291
1292                 indio_dev->setup_ops = &ad7606_backend_buffer_ops;
1293         } else {
1294
1295                 /* Reserve the PWM use only for backend (force gpio_convst definition) */
1296                 if (!st->gpio_convst)
1297                         return dev_err_probe(dev, -EINVAL,
1298                                              "No backend, connect convst to a GPIO");
1299
1300                 init_completion(&st->completion);
1301                 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
1302                                                   indio_dev->name,
1303                                                   iio_device_id(indio_dev));
1304                 if (!st->trig)
1305                         return -ENOMEM;
1306
1307                 st->trig->ops = &ad7606_trigger_ops;
1308                 iio_trigger_set_drvdata(st->trig, indio_dev);
1309                 ret = devm_iio_trigger_register(dev, st->trig);
1310                 if (ret)
1311                         return ret;
1312
1313                 indio_dev->trig = iio_trigger_get(st->trig);
1314
1315                 ret = devm_request_threaded_irq(dev, irq, NULL, &ad7606_interrupt,
1316                                                 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
1317                                                 chip_info->name, indio_dev);
1318                 if (ret)
1319                         return ret;
1320
1321                 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
1322                                                       &iio_pollfunc_store_time,
1323                                                       &ad7606_trigger_handler,
1324                                                       &ad7606_buffer_ops);
1325                 if (ret)
1326                         return ret;
1327         }
1328
1329         return devm_iio_device_register(dev, indio_dev);
1330 }
1331 EXPORT_SYMBOL_NS_GPL(ad7606_probe, "IIO_AD7606");
1332
1333 #ifdef CONFIG_PM_SLEEP
1334
1335 static int ad7606_suspend(struct device *dev)
1336 {
1337         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1338         struct ad7606_state *st = iio_priv(indio_dev);
1339
1340         if (st->gpio_standby) {
1341                 gpiod_set_value(st->gpio_range, 1);
1342                 gpiod_set_value(st->gpio_standby, 1);
1343         }
1344
1345         return 0;
1346 }
1347
1348 static int ad7606_resume(struct device *dev)
1349 {
1350         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1351         struct ad7606_state *st = iio_priv(indio_dev);
1352
1353         if (st->gpio_standby) {
1354                 gpiod_set_value(st->gpio_range, st->chan_scales[0].range);
1355                 gpiod_set_value(st->gpio_standby, 1);
1356                 ad7606_reset(st);
1357         }
1358
1359         return 0;
1360 }
1361
1362 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
1363 EXPORT_SYMBOL_NS_GPL(ad7606_pm_ops, "IIO_AD7606");
1364
1365 #endif
1366
1367 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
1368 MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
1369 MODULE_LICENSE("GPL v2");