drivers/iio/adc/axp20x_adc.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /* ADC driver for AXP20X and AXP22X PMICs
   3  *
   4  * Copyright (c) 2016 Free Electrons NextThing Co.
   5  *      Quentin Schulz <quentin.schulz@free-electrons.com>
   6  */
   7
   8 #include <linux/unaligned.h>
   9 #include <linux/bitfield.h>
  10 #include <linux/completion.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/io.h>
  13 #include <linux/module.h>
  14 #include <linux/mod_devicetable.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/property.h>
  18 #include <linux/regmap.h>
  19 #include <linux/thermal.h>
  20
  21 #include <linux/iio/iio.h>
  22 #include <linux/iio/driver.h>
  23 #include <linux/iio/machine.h>
  24 #include <linux/mfd/axp20x.h>
  25
  26 #define AXP192_ADC_EN1_MASK                     GENMASK(7, 0)
  27 #define AXP192_ADC_EN2_MASK                     (GENMASK(3, 0) | BIT(7))
  28
  29 #define AXP20X_ADC_EN1_MASK                     GENMASK(7, 0)
  30 #define AXP20X_ADC_EN2_MASK                     (GENMASK(3, 2) | BIT(7))
  31
  32 #define AXP22X_ADC_EN1_MASK                     (GENMASK(7, 5) | BIT(0))
  33
  34 #define AXP717_ADC_EN1_MASK                     GENMASK(7, 0)
  35
  36 #define AXP192_GPIO30_IN_RANGE_GPIO0            BIT(0)
  37 #define AXP192_GPIO30_IN_RANGE_GPIO1            BIT(1)
  38 #define AXP192_GPIO30_IN_RANGE_GPIO2            BIT(2)
  39 #define AXP192_GPIO30_IN_RANGE_GPIO3            BIT(3)
  40
  41 #define AXP20X_GPIO10_IN_RANGE_GPIO0            BIT(0)
  42 #define AXP20X_GPIO10_IN_RANGE_GPIO1            BIT(1)
  43
  44 #define AXP20X_ADC_RATE_MASK                    GENMASK(7, 6)
  45 #define AXP20X_ADC_RATE_HZ(x)                   ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK)
  46
  47 #define AXP22X_ADC_RATE_HZ(x)                   ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK)
  48
  49 #define AXP717_ADC_DATA_TS                      0x00
  50 #define AXP717_ADC_DATA_TEMP                    0x01
  51 #define AXP717_ADC_DATA_VMID                    0x02
  52 #define AXP717_ADC_DATA_BKUP_BATT               0x03
  53
  54 #define AXP717_ADC_DATA_MASK                    GENMASK(13, 0)
  55
  56 #define AXP813_V_I_ADC_RATE_MASK                GENMASK(5, 4)
  57 #define AXP813_ADC_RATE_MASK                    (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK)
  58 #define AXP813_TS_GPIO0_ADC_RATE_HZ(x)          AXP20X_ADC_RATE_HZ(x)
  59 #define AXP813_V_I_ADC_RATE_HZ(x)               ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK)
  60 #define AXP813_ADC_RATE_HZ(x)                   (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x))
  61
  62 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg)        \
  63         {                                                       \
  64                 .type = _type,                                  \
  65                 .indexed = 1,                                   \
  66                 .channel = _channel,                            \
  67                 .address = _reg,                                \
  68                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |  \
  69                                       BIT(IIO_CHAN_INFO_SCALE), \
  70                 .datasheet_name = _name,                        \
  71         }
  72
  73 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \
  74         {                                                       \
  75                 .type = _type,                                  \
  76                 .indexed = 1,                                   \
  77                 .channel = _channel,                            \
  78                 .address = _reg,                                \
  79                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |  \
  80                                       BIT(IIO_CHAN_INFO_SCALE) |\
  81                                       BIT(IIO_CHAN_INFO_OFFSET),\
  82                 .datasheet_name = _name,                        \
  83         }
  84
  85 struct axp_data;
  86
  87 struct axp20x_adc_iio {
  88         struct regmap           *regmap;
  89         const struct axp_data   *data;
  90 };
  91
  92 enum axp192_adc_channel_v {
  93         AXP192_ACIN_V = 0,
  94         AXP192_VBUS_V,
  95         AXP192_TS_IN,
  96         AXP192_GPIO0_V,
  97         AXP192_GPIO1_V,
  98         AXP192_GPIO2_V,
  99         AXP192_GPIO3_V,
 100         AXP192_IPSOUT_V,
 101         AXP192_BATT_V,
 102 };
 103
 104 enum axp192_adc_channel_i {
 105         AXP192_ACIN_I = 0,
 106         AXP192_VBUS_I,
 107         AXP192_BATT_CHRG_I,
 108         AXP192_BATT_DISCHRG_I,
 109 };
 110
 111 enum axp20x_adc_channel_v {
 112         AXP20X_ACIN_V = 0,
 113         AXP20X_VBUS_V,
 114         AXP20X_TS_IN,
 115         AXP20X_GPIO0_V,
 116         AXP20X_GPIO1_V,
 117         AXP20X_IPSOUT_V,
 118         AXP20X_BATT_V,
 119 };
 120
 121 enum axp20x_adc_channel_i {
 122         AXP20X_ACIN_I = 0,
 123         AXP20X_VBUS_I,
 124         AXP20X_BATT_CHRG_I,
 125         AXP20X_BATT_DISCHRG_I,
 126 };
 127
 128 enum axp22x_adc_channel_v {
 129         AXP22X_TS_IN = 0,
 130         AXP22X_BATT_V,
 131 };
 132
 133 enum axp22x_adc_channel_i {
 134         AXP22X_BATT_CHRG_I = 1,
 135         AXP22X_BATT_DISCHRG_I,
 136 };
 137
 138 enum axp717_adc_channel_v {
 139         AXP717_BATT_V = 0,
 140         AXP717_TS_IN,
 141         AXP717_VBUS_V,
 142         AXP717_VSYS_V,
 143         AXP717_DIE_TEMP_V,
 144         AXP717_VMID_V = 6,
 145         AXP717_BKUP_BATT_V,
 146 };
 147
 148 enum axp717_adc_channel_i {
 149         AXP717_BATT_CHRG_I = 5,
 150 };
 151
 152 enum axp813_adc_channel_v {
 153         AXP813_TS_IN = 0,
 154         AXP813_GPIO0_V,
 155         AXP813_BATT_V,
 156 };
 157
 158 static const struct iio_map axp20x_maps[] = {
 159         IIO_MAP("vbus_v", "axp20x-usb-power-supply", "vbus_v"),
 160         IIO_MAP("vbus_i", "axp20x-usb-power-supply", "vbus_i"),
 161         IIO_MAP("acin_v", "axp20x-ac-power-supply", "acin_v"),
 162         IIO_MAP("acin_i", "axp20x-ac-power-supply", "acin_i"),
 163         IIO_MAP("batt_v", "axp20x-battery-power-supply", "batt_v"),
 164         IIO_MAP("batt_chrg_i", "axp20x-battery-power-supply", "batt_chrg_i"),
 165         IIO_MAP("batt_dischrg_i", "axp20x-battery-power-supply", "batt_dischrg_i"),
 166         { /* sentinel */ }
 167 };
 168
 169 static const struct iio_map axp22x_maps[] = {
 170         IIO_MAP("batt_v", "axp20x-battery-power-supply", "batt_v"),
 171         IIO_MAP("batt_chrg_i", "axp20x-battery-power-supply", "batt_chrg_i"),
 172         IIO_MAP("batt_dischrg_i", "axp20x-battery-power-supply", "batt_dischrg_i"),
 173         { /* sentinel */ }
 174 };
 175
 176 static struct iio_map axp717_maps[] = {
 177         {
 178                 .consumer_dev_name = "axp20x-usb-power-supply",
 179                 .consumer_channel = "vbus_v",
 180                 .adc_channel_label = "vbus_v",
 181         }, {
 182                 .consumer_dev_name = "axp20x-battery-power-supply",
 183                 .consumer_channel = "batt_v",
 184                 .adc_channel_label = "batt_v",
 185         }, {
 186                 .consumer_dev_name = "axp20x-battery-power-supply",
 187                 .consumer_channel = "batt_chrg_i",
 188                 .adc_channel_label = "batt_chrg_i",
 189         },
 190 };
 191
 192 /*
 193  * Channels are mapped by physical system. Their channels share the same index.
 194  * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw.
 195  * The only exception is for the battery. batt_v will be in_voltage6_raw and
 196  * charge current in_current6_raw and discharge current will be in_current7_raw.
 197  */
 198 static const struct iio_chan_spec axp192_adc_channels[] = {
 199         AXP20X_ADC_CHANNEL(AXP192_ACIN_V, "acin_v", IIO_VOLTAGE,
 200                            AXP20X_ACIN_V_ADC_H),
 201         AXP20X_ADC_CHANNEL(AXP192_ACIN_I, "acin_i", IIO_CURRENT,
 202                            AXP20X_ACIN_I_ADC_H),
 203         AXP20X_ADC_CHANNEL(AXP192_VBUS_V, "vbus_v", IIO_VOLTAGE,
 204                            AXP20X_VBUS_V_ADC_H),
 205         AXP20X_ADC_CHANNEL(AXP192_VBUS_I, "vbus_i", IIO_CURRENT,
 206                            AXP20X_VBUS_I_ADC_H),
 207         {
 208                 .type = IIO_TEMP,
 209                 .address = AXP20X_TEMP_ADC_H,
 210                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 211                                       BIT(IIO_CHAN_INFO_SCALE) |
 212                                       BIT(IIO_CHAN_INFO_OFFSET),
 213                 .datasheet_name = "pmic_temp",
 214         },
 215         AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
 216                                   AXP20X_GPIO0_V_ADC_H),
 217         AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
 218                                   AXP20X_GPIO1_V_ADC_H),
 219         AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO2_V, "gpio2_v", IIO_VOLTAGE,
 220                                   AXP192_GPIO2_V_ADC_H),
 221         AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO3_V, "gpio3_v", IIO_VOLTAGE,
 222                                   AXP192_GPIO3_V_ADC_H),
 223         AXP20X_ADC_CHANNEL(AXP192_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
 224                            AXP20X_IPSOUT_V_HIGH_H),
 225         AXP20X_ADC_CHANNEL(AXP192_BATT_V, "batt_v", IIO_VOLTAGE,
 226                            AXP20X_BATT_V_H),
 227         AXP20X_ADC_CHANNEL(AXP192_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
 228                            AXP20X_BATT_CHRG_I_H),
 229         AXP20X_ADC_CHANNEL(AXP192_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
 230                            AXP20X_BATT_DISCHRG_I_H),
 231         AXP20X_ADC_CHANNEL(AXP192_TS_IN, "ts_v", IIO_VOLTAGE,
 232                            AXP20X_TS_IN_H),
 233 };
 234
 235 static const struct iio_chan_spec axp20x_adc_channels[] = {
 236         AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE,
 237                            AXP20X_ACIN_V_ADC_H),
 238         AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT,
 239                            AXP20X_ACIN_I_ADC_H),
 240         AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE,
 241                            AXP20X_VBUS_V_ADC_H),
 242         AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT,
 243                            AXP20X_VBUS_I_ADC_H),
 244         {
 245                 .type = IIO_TEMP,
 246                 .address = AXP20X_TEMP_ADC_H,
 247                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 248                                       BIT(IIO_CHAN_INFO_SCALE) |
 249                                       BIT(IIO_CHAN_INFO_OFFSET),
 250                 .datasheet_name = "pmic_temp",
 251         },
 252         AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
 253                                   AXP20X_GPIO0_V_ADC_H),
 254         AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
 255                                   AXP20X_GPIO1_V_ADC_H),
 256         AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
 257                            AXP20X_IPSOUT_V_HIGH_H),
 258         AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE,
 259                            AXP20X_BATT_V_H),
 260         AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
 261                            AXP20X_BATT_CHRG_I_H),
 262         AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
 263                            AXP20X_BATT_DISCHRG_I_H),
 264         AXP20X_ADC_CHANNEL(AXP20X_TS_IN, "ts_v", IIO_VOLTAGE,
 265                            AXP20X_TS_IN_H),
 266 };
 267
 268 static const struct iio_chan_spec axp22x_adc_channels[] = {
 269         {
 270                 .type = IIO_TEMP,
 271                 .address = AXP22X_PMIC_TEMP_H,
 272                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 273                                       BIT(IIO_CHAN_INFO_SCALE) |
 274                                       BIT(IIO_CHAN_INFO_OFFSET),
 275                 .datasheet_name = "pmic_temp",
 276         },
 277         AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE,
 278                            AXP20X_BATT_V_H),
 279         AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
 280                            AXP20X_BATT_CHRG_I_H),
 281         AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
 282                            AXP20X_BATT_DISCHRG_I_H),
 283         AXP20X_ADC_CHANNEL(AXP22X_TS_IN, "ts_v", IIO_VOLTAGE,
 284                            AXP22X_TS_ADC_H),
 285 };
 286
 287 /*
 288  * Scale and offset is unknown for temp, ts, batt_chrg_i, vmid_v, and
 289  * bkup_batt_v channels. Leaving scale and offset undefined for now.
 290  */
 291 static const struct iio_chan_spec axp717_adc_channels[] = {
 292         AXP20X_ADC_CHANNEL(AXP717_BATT_V, "batt_v", IIO_VOLTAGE,
 293                            AXP717_BATT_V_H),
 294         AXP20X_ADC_CHANNEL(AXP717_TS_IN, "ts_v", IIO_VOLTAGE,
 295                            AXP717_ADC_DATA_H),
 296         AXP20X_ADC_CHANNEL(AXP717_VBUS_V, "vbus_v", IIO_VOLTAGE,
 297                            AXP717_VBUS_V_H),
 298         AXP20X_ADC_CHANNEL(AXP717_VSYS_V, "vsys_v", IIO_VOLTAGE,
 299                            AXP717_VSYS_V_H),
 300         AXP20X_ADC_CHANNEL(AXP717_DIE_TEMP_V, "pmic_temp", IIO_TEMP,
 301                            AXP717_ADC_DATA_H),
 302         AXP20X_ADC_CHANNEL(AXP717_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
 303                            AXP717_BATT_CHRG_I_H),
 304         AXP20X_ADC_CHANNEL(AXP717_VMID_V, "vmid_v", IIO_VOLTAGE,
 305                            AXP717_ADC_DATA_H),
 306         AXP20X_ADC_CHANNEL(AXP717_BKUP_BATT_V, "bkup_batt_v", IIO_VOLTAGE,
 307                            AXP717_ADC_DATA_H),
 308 };
 309
 310 static const struct iio_chan_spec axp813_adc_channels[] = {
 311         {
 312                 .type = IIO_TEMP,
 313                 .address = AXP22X_PMIC_TEMP_H,
 314                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 315                                       BIT(IIO_CHAN_INFO_SCALE) |
 316                                       BIT(IIO_CHAN_INFO_OFFSET),
 317                 .datasheet_name = "pmic_temp",
 318         },
 319         AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
 320                            AXP288_GP_ADC_H),
 321         AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE,
 322                            AXP20X_BATT_V_H),
 323         AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
 324                            AXP20X_BATT_CHRG_I_H),
 325         AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
 326                            AXP20X_BATT_DISCHRG_I_H),
 327         AXP20X_ADC_CHANNEL(AXP813_TS_IN, "ts_v", IIO_VOLTAGE,
 328                            AXP288_TS_ADC_H),
 329 };
 330
 331 static int axp192_adc_raw(struct iio_dev *indio_dev,
 332                           struct iio_chan_spec const *chan, int *val)
 333 {
 334         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 335         int ret, size;
 336
 337         if (chan->type == IIO_CURRENT &&
 338             (chan->channel == AXP192_BATT_CHRG_I ||
 339              chan->channel == AXP192_BATT_DISCHRG_I))
 340                 size = 13;
 341         else
 342                 size = 12;
 343
 344         ret = axp20x_read_variable_width(info->regmap, chan->address, size);
 345         if (ret < 0)
 346                 return ret;
 347
 348         *val = ret;
 349         return IIO_VAL_INT;
 350 }
 351
 352 static int axp20x_adc_raw(struct iio_dev *indio_dev,
 353                           struct iio_chan_spec const *chan, int *val)
 354 {
 355         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 356         int ret, size;
 357
 358         /*
 359          * N.B.:  Unlike the Chinese datasheets tell, the charging current is
 360          * stored on 12 bits, not 13 bits. Only discharging current is on 13
 361          * bits.
 362          */
 363         if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I)
 364                 size = 13;
 365         else
 366                 size = 12;
 367
 368         ret = axp20x_read_variable_width(info->regmap, chan->address, size);
 369         if (ret < 0)
 370                 return ret;
 371
 372         *val = ret;
 373         return IIO_VAL_INT;
 374 }
 375
 376 static int axp22x_adc_raw(struct iio_dev *indio_dev,
 377                           struct iio_chan_spec const *chan, int *val)
 378 {
 379         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 380         int ret;
 381
 382         ret = axp20x_read_variable_width(info->regmap, chan->address, 12);
 383         if (ret < 0)
 384                 return ret;
 385
 386         *val = ret;
 387         return IIO_VAL_INT;
 388 }
 389
 390 static int axp717_adc_raw(struct iio_dev *indio_dev,
 391                           struct iio_chan_spec const *chan, int *val)
 392 {
 393         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 394         u8 bulk_reg[2];
 395         int ret;
 396
 397         /*
 398          * A generic "ADC data" channel is used for TS, tdie, vmid,
 399          * and vbackup. This channel must both first be enabled and
 400          * also selected before it can be read.
 401          */
 402         switch (chan->channel) {
 403         case AXP717_TS_IN:
 404                 regmap_write(info->regmap, AXP717_ADC_DATA_SEL,
 405                              AXP717_ADC_DATA_TS);
 406                 break;
 407         case AXP717_DIE_TEMP_V:
 408                 regmap_write(info->regmap, AXP717_ADC_DATA_SEL,
 409                              AXP717_ADC_DATA_TEMP);
 410                 break;
 411         case AXP717_VMID_V:
 412                 regmap_write(info->regmap, AXP717_ADC_DATA_SEL,
 413                              AXP717_ADC_DATA_VMID);
 414                 break;
 415         case AXP717_BKUP_BATT_V:
 416                 regmap_write(info->regmap, AXP717_ADC_DATA_SEL,
 417                              AXP717_ADC_DATA_BKUP_BATT);
 418                 break;
 419         default:
 420                 break;
 421         }
 422
 423         /*
 424          * All channels are 14 bits, with the first 2 bits on the high
 425          * register reserved and the remaining bits as the ADC value.
 426          */
 427         ret = regmap_bulk_read(info->regmap, chan->address, bulk_reg, 2);
 428         if (ret < 0)
 429                 return ret;
 430
 431         *val = FIELD_GET(AXP717_ADC_DATA_MASK, get_unaligned_be16(bulk_reg));
 432         return IIO_VAL_INT;
 433 }
 434
 435 static int axp813_adc_raw(struct iio_dev *indio_dev,
 436                           struct iio_chan_spec const *chan, int *val)
 437 {
 438         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 439         int ret;
 440
 441         ret = axp20x_read_variable_width(info->regmap, chan->address, 12);
 442         if (ret < 0)
 443                 return ret;
 444
 445         *val = ret;
 446         return IIO_VAL_INT;
 447 }
 448
 449 static int axp192_adc_scale_voltage(int channel, int *val, int *val2)
 450 {
 451         switch (channel) {
 452         case AXP192_ACIN_V:
 453         case AXP192_VBUS_V:
 454                 *val = 1;
 455                 *val2 = 700000;
 456                 return IIO_VAL_INT_PLUS_MICRO;
 457
 458         case AXP192_GPIO0_V:
 459         case AXP192_GPIO1_V:
 460         case AXP192_GPIO2_V:
 461         case AXP192_GPIO3_V:
 462                 *val = 0;
 463                 *val2 = 500000;
 464                 return IIO_VAL_INT_PLUS_MICRO;
 465
 466         case AXP192_BATT_V:
 467                 *val = 1;
 468                 *val2 = 100000;
 469                 return IIO_VAL_INT_PLUS_MICRO;
 470
 471         case AXP192_IPSOUT_V:
 472                 *val = 1;
 473                 *val2 = 400000;
 474                 return IIO_VAL_INT_PLUS_MICRO;
 475
 476         case AXP192_TS_IN:
 477                 /* 0.8 mV per LSB */
 478                 *val = 0;
 479                 *val2 = 800000;
 480                 return IIO_VAL_INT_PLUS_MICRO;
 481
 482         default:
 483                 return -EINVAL;
 484         }
 485 }
 486
 487 static int axp20x_adc_scale_voltage(int channel, int *val, int *val2)
 488 {
 489         switch (channel) {
 490         case AXP20X_ACIN_V:
 491         case AXP20X_VBUS_V:
 492                 *val = 1;
 493                 *val2 = 700000;
 494                 return IIO_VAL_INT_PLUS_MICRO;
 495
 496         case AXP20X_GPIO0_V:
 497         case AXP20X_GPIO1_V:
 498                 *val = 0;
 499                 *val2 = 500000;
 500                 return IIO_VAL_INT_PLUS_MICRO;
 501
 502         case AXP20X_BATT_V:
 503                 *val = 1;
 504                 *val2 = 100000;
 505                 return IIO_VAL_INT_PLUS_MICRO;
 506
 507         case AXP20X_IPSOUT_V:
 508                 *val = 1;
 509                 *val2 = 400000;
 510                 return IIO_VAL_INT_PLUS_MICRO;
 511
 512         case AXP20X_TS_IN:
 513                 /* 0.8 mV per LSB */
 514                 *val = 0;
 515                 *val2 = 800000;
 516                 return IIO_VAL_INT_PLUS_MICRO;
 517
 518         default:
 519                 return -EINVAL;
 520         }
 521 }
 522
 523 static int axp22x_adc_scale_voltage(int channel, int *val, int *val2)
 524 {
 525         switch (channel) {
 526         case AXP22X_BATT_V:
 527                 /* 1.1 mV per LSB */
 528                 *val = 1;
 529                 *val2 = 100000;
 530                 return IIO_VAL_INT_PLUS_MICRO;
 531
 532         case AXP22X_TS_IN:
 533                 /* 0.8 mV per LSB */
 534                 *val = 0;
 535                 *val2 = 800000;
 536                 return IIO_VAL_INT_PLUS_MICRO;
 537
 538         default:
 539                 return -EINVAL;
 540         }
 541 }
 542 static int axp813_adc_scale_voltage(int channel, int *val, int *val2)
 543 {
 544         switch (channel) {
 545         case AXP813_GPIO0_V:
 546                 *val = 0;
 547                 *val2 = 800000;
 548                 return IIO_VAL_INT_PLUS_MICRO;
 549
 550         case AXP813_BATT_V:
 551                 *val = 1;
 552                 *val2 = 100000;
 553                 return IIO_VAL_INT_PLUS_MICRO;
 554
 555         case AXP813_TS_IN:
 556                 /* 0.8 mV per LSB */
 557                 *val = 0;
 558                 *val2 = 800000;
 559                 return IIO_VAL_INT_PLUS_MICRO;
 560
 561         default:
 562                 return -EINVAL;
 563         }
 564 }
 565
 566 static int axp20x_adc_scale_current(int channel, int *val, int *val2)
 567 {
 568         switch (channel) {
 569         case AXP20X_ACIN_I:
 570                 *val = 0;
 571                 *val2 = 625000;
 572                 return IIO_VAL_INT_PLUS_MICRO;
 573
 574         case AXP20X_VBUS_I:
 575                 *val = 0;
 576                 *val2 = 375000;
 577                 return IIO_VAL_INT_PLUS_MICRO;
 578
 579         case AXP20X_BATT_DISCHRG_I:
 580         case AXP20X_BATT_CHRG_I:
 581                 *val = 0;
 582                 *val2 = 500000;
 583                 return IIO_VAL_INT_PLUS_MICRO;
 584
 585         default:
 586                 return -EINVAL;
 587         }
 588 }
 589
 590 static int axp192_adc_scale(struct iio_chan_spec const *chan, int *val,
 591                             int *val2)
 592 {
 593         switch (chan->type) {
 594         case IIO_VOLTAGE:
 595                 return axp192_adc_scale_voltage(chan->channel, val, val2);
 596
 597         case IIO_CURRENT:
 598                 /*
 599                  * AXP192 current channels are identical to the AXP20x,
 600                  * therefore we can re-use the scaling function.
 601                  */
 602                 return axp20x_adc_scale_current(chan->channel, val, val2);
 603
 604         case IIO_TEMP:
 605                 *val = 100;
 606                 return IIO_VAL_INT;
 607
 608         default:
 609                 return -EINVAL;
 610         }
 611 }
 612
 613 static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val,
 614                             int *val2)
 615 {
 616         switch (chan->type) {
 617         case IIO_VOLTAGE:
 618                 return axp20x_adc_scale_voltage(chan->channel, val, val2);
 619
 620         case IIO_CURRENT:
 621                 return axp20x_adc_scale_current(chan->channel, val, val2);
 622
 623         case IIO_TEMP:
 624                 *val = 100;
 625                 return IIO_VAL_INT;
 626
 627         default:
 628                 return -EINVAL;
 629         }
 630 }
 631
 632 static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val,
 633                             int *val2)
 634 {
 635         switch (chan->type) {
 636         case IIO_VOLTAGE:
 637                 return axp22x_adc_scale_voltage(chan->channel, val, val2);
 638
 639         case IIO_CURRENT:
 640                 *val = 1;
 641                 return IIO_VAL_INT;
 642
 643         case IIO_TEMP:
 644                 *val = 100;
 645                 return IIO_VAL_INT;
 646
 647         default:
 648                 return -EINVAL;
 649         }
 650 }
 651
 652 static int axp717_adc_scale(struct iio_chan_spec const *chan, int *val,
 653                             int *val2)
 654 {
 655         switch (chan->type) {
 656         case IIO_VOLTAGE:
 657                 *val = 1;
 658                 return IIO_VAL_INT;
 659
 660         case IIO_CURRENT:
 661                 *val = 1;
 662                 return IIO_VAL_INT;
 663
 664         case IIO_TEMP:
 665                 *val = 100;
 666                 return IIO_VAL_INT;
 667
 668         default:
 669                 return -EINVAL;
 670         }
 671 }
 672
 673 static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val,
 674                             int *val2)
 675 {
 676         switch (chan->type) {
 677         case IIO_VOLTAGE:
 678                 return axp813_adc_scale_voltage(chan->channel, val, val2);
 679
 680         case IIO_CURRENT:
 681                 *val = 1;
 682                 return IIO_VAL_INT;
 683
 684         case IIO_TEMP:
 685                 *val = 100;
 686                 return IIO_VAL_INT;
 687
 688         default:
 689                 return -EINVAL;
 690         }
 691 }
 692
 693 static int axp192_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
 694                                      int *val)
 695 {
 696         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 697         unsigned int regval;
 698         int ret;
 699
 700         ret = regmap_read(info->regmap, AXP192_GPIO30_IN_RANGE, &regval);
 701         if (ret < 0)
 702                 return ret;
 703
 704         switch (channel) {
 705         case AXP192_GPIO0_V:
 706                 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO0, regval);
 707                 break;
 708
 709         case AXP192_GPIO1_V:
 710                 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO1, regval);
 711                 break;
 712
 713         case AXP192_GPIO2_V:
 714                 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO2, regval);
 715                 break;
 716
 717         case AXP192_GPIO3_V:
 718                 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO3, regval);
 719                 break;
 720
 721         default:
 722                 return -EINVAL;
 723         }
 724
 725         *val = regval ? 700000 : 0;
 726         return IIO_VAL_INT;
 727 }
 728
 729 static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
 730                                      int *val)
 731 {
 732         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 733         unsigned int regval;
 734         int ret;
 735
 736         ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, &regval);
 737         if (ret < 0)
 738                 return ret;
 739
 740         switch (channel) {
 741         case AXP20X_GPIO0_V:
 742                 regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO0, regval);
 743                 break;
 744
 745         case AXP20X_GPIO1_V:
 746                 regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO1, regval);
 747                 break;
 748
 749         default:
 750                 return -EINVAL;
 751         }
 752
 753         *val = regval ? 700000 : 0;
 754         return IIO_VAL_INT;
 755 }
 756
 757 static int axp192_adc_offset(struct iio_dev *indio_dev,
 758                              struct iio_chan_spec const *chan, int *val)
 759 {
 760         switch (chan->type) {
 761         case IIO_VOLTAGE:
 762                 return axp192_adc_offset_voltage(indio_dev, chan->channel, val);
 763
 764         case IIO_TEMP:
 765                 *val = -1447;
 766                 return IIO_VAL_INT;
 767
 768         default:
 769                 return -EINVAL;
 770         }
 771 }
 772
 773 static int axp20x_adc_offset(struct iio_dev *indio_dev,
 774                              struct iio_chan_spec const *chan, int *val)
 775 {
 776         switch (chan->type) {
 777         case IIO_VOLTAGE:
 778                 return axp20x_adc_offset_voltage(indio_dev, chan->channel, val);
 779
 780         case IIO_TEMP:
 781                 *val = -1447;
 782                 return IIO_VAL_INT;
 783
 784         default:
 785                 return -EINVAL;
 786         }
 787 }
 788
 789 static int axp192_read_raw(struct iio_dev *indio_dev,
 790                            struct iio_chan_spec const *chan, int *val,
 791                            int *val2, long mask)
 792 {
 793         switch (mask) {
 794         case IIO_CHAN_INFO_OFFSET:
 795                 return axp192_adc_offset(indio_dev, chan, val);
 796
 797         case IIO_CHAN_INFO_SCALE:
 798                 return axp192_adc_scale(chan, val, val2);
 799
 800         case IIO_CHAN_INFO_RAW:
 801                 return axp192_adc_raw(indio_dev, chan, val);
 802
 803         default:
 804                 return -EINVAL;
 805         }
 806 }
 807
 808 static int axp20x_read_raw(struct iio_dev *indio_dev,
 809                            struct iio_chan_spec const *chan, int *val,
 810                            int *val2, long mask)
 811 {
 812         switch (mask) {
 813         case IIO_CHAN_INFO_OFFSET:
 814                 return axp20x_adc_offset(indio_dev, chan, val);
 815
 816         case IIO_CHAN_INFO_SCALE:
 817                 return axp20x_adc_scale(chan, val, val2);
 818
 819         case IIO_CHAN_INFO_RAW:
 820                 return axp20x_adc_raw(indio_dev, chan, val);
 821
 822         default:
 823                 return -EINVAL;
 824         }
 825 }
 826
 827 static int axp22x_read_raw(struct iio_dev *indio_dev,
 828                            struct iio_chan_spec const *chan, int *val,
 829                            int *val2, long mask)
 830 {
 831         switch (mask) {
 832         case IIO_CHAN_INFO_OFFSET:
 833                 /* For PMIC temp only */
 834                 *val = -2677;
 835                 return IIO_VAL_INT;
 836
 837         case IIO_CHAN_INFO_SCALE:
 838                 return axp22x_adc_scale(chan, val, val2);
 839
 840         case IIO_CHAN_INFO_RAW:
 841                 return axp22x_adc_raw(indio_dev, chan, val);
 842
 843         default:
 844                 return -EINVAL;
 845         }
 846 }
 847
 848 static int axp717_read_raw(struct iio_dev *indio_dev,
 849                            struct iio_chan_spec const *chan, int *val,
 850                            int *val2, long mask)
 851 {
 852         switch (mask) {
 853         case IIO_CHAN_INFO_SCALE:
 854                 return axp717_adc_scale(chan, val, val2);
 855
 856         case IIO_CHAN_INFO_RAW:
 857                 return axp717_adc_raw(indio_dev, chan, val);
 858
 859         default:
 860                 return -EINVAL;
 861         }
 862 }
 863
 864 static int axp813_read_raw(struct iio_dev *indio_dev,
 865                            struct iio_chan_spec const *chan, int *val,
 866                            int *val2, long mask)
 867 {
 868         switch (mask) {
 869         case IIO_CHAN_INFO_OFFSET:
 870                 *val = -2667;
 871                 return IIO_VAL_INT;
 872
 873         case IIO_CHAN_INFO_SCALE:
 874                 return axp813_adc_scale(chan, val, val2);
 875
 876         case IIO_CHAN_INFO_RAW:
 877                 return axp813_adc_raw(indio_dev, chan, val);
 878
 879         default:
 880                 return -EINVAL;
 881         }
 882 }
 883
 884 static int axp192_write_raw(struct iio_dev *indio_dev,
 885                             struct iio_chan_spec const *chan, int val, int val2,
 886                             long mask)
 887 {
 888         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 889         unsigned int regmask, regval;
 890
 891         /*
 892          * The AXP192 PMIC allows the user to choose between 0V and 0.7V offsets
 893          * for (independently) GPIO0-3 when in ADC mode.
 894          */
 895         if (mask != IIO_CHAN_INFO_OFFSET)
 896                 return -EINVAL;
 897
 898         if (val != 0 && val != 700000)
 899                 return -EINVAL;
 900
 901         switch (chan->channel) {
 902         case AXP192_GPIO0_V:
 903                 regmask = AXP192_GPIO30_IN_RANGE_GPIO0;
 904                 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO0, !!val);
 905                 break;
 906
 907         case AXP192_GPIO1_V:
 908                 regmask = AXP192_GPIO30_IN_RANGE_GPIO1;
 909                 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO1, !!val);
 910                 break;
 911
 912         case AXP192_GPIO2_V:
 913                 regmask = AXP192_GPIO30_IN_RANGE_GPIO2;
 914                 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO2, !!val);
 915                 break;
 916
 917         case AXP192_GPIO3_V:
 918                 regmask = AXP192_GPIO30_IN_RANGE_GPIO3;
 919                 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO3, !!val);
 920                 break;
 921
 922         default:
 923                 return -EINVAL;
 924         }
 925
 926         return regmap_update_bits(info->regmap, AXP192_GPIO30_IN_RANGE, regmask, regval);
 927 }
 928
 929 static int axp20x_write_raw(struct iio_dev *indio_dev,
 930                             struct iio_chan_spec const *chan, int val, int val2,
 931                             long mask)
 932 {
 933         struct axp20x_adc_iio *info = iio_priv(indio_dev);
 934         unsigned int regmask, regval;
 935
 936         /*
 937          * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets
 938          * for (independently) GPIO0 and GPIO1 when in ADC mode.
 939          */
 940         if (mask != IIO_CHAN_INFO_OFFSET)
 941                 return -EINVAL;
 942
 943         if (val != 0 && val != 700000)
 944                 return -EINVAL;
 945
 946         switch (chan->channel) {
 947         case AXP20X_GPIO0_V:
 948                 regmask = AXP20X_GPIO10_IN_RANGE_GPIO0;
 949                 regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO0, !!val);
 950                 break;
 951
 952         case AXP20X_GPIO1_V:
 953                 regmask = AXP20X_GPIO10_IN_RANGE_GPIO1;
 954                 regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO1, !!val);
 955                 break;
 956
 957         default:
 958                 return -EINVAL;
 959         }
 960
 961         return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, regmask, regval);
 962 }
 963
 964 static const struct iio_info axp192_adc_iio_info = {
 965         .read_raw = axp192_read_raw,
 966         .write_raw = axp192_write_raw,
 967 };
 968
 969 static const struct iio_info axp20x_adc_iio_info = {
 970         .read_raw = axp20x_read_raw,
 971         .write_raw = axp20x_write_raw,
 972 };
 973
 974 static const struct iio_info axp22x_adc_iio_info = {
 975         .read_raw = axp22x_read_raw,
 976 };
 977
 978 static const struct iio_info axp717_adc_iio_info = {
 979         .read_raw = axp717_read_raw,
 980 };
 981
 982 static const struct iio_info axp813_adc_iio_info = {
 983         .read_raw = axp813_read_raw,
 984 };
 985
 986 static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate)
 987 {
 988         return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
 989                                   AXP20X_ADC_RATE_MASK,
 990                                   AXP20X_ADC_RATE_HZ(rate));
 991 }
 992
 993 static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate)
 994 {
 995         return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
 996                                   AXP20X_ADC_RATE_MASK,
 997                                   AXP22X_ADC_RATE_HZ(rate));
 998 }
 999
1000 static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate)
1001 {
1002         return regmap_update_bits(info->regmap, AXP813_ADC_RATE,
1003                                  AXP813_ADC_RATE_MASK,
1004                                  AXP813_ADC_RATE_HZ(rate));
1005 }
1006
1007 struct axp_data {
1008         const struct iio_info           *iio_info;
1009         int                             num_channels;
1010         struct iio_chan_spec const      *channels;
1011         unsigned long                   adc_en1;
1012         unsigned long                   adc_en1_mask;
1013         unsigned long                   adc_en2;
1014         unsigned long                   adc_en2_mask;
1015         int                             (*adc_rate)(struct axp20x_adc_iio *info,
1016                                                     int rate);
1017         const struct iio_map            *maps;
1018 };
1019
1020 static const struct axp_data axp192_data = {
1021         .iio_info = &axp192_adc_iio_info,
1022         .num_channels = ARRAY_SIZE(axp192_adc_channels),
1023         .channels = axp192_adc_channels,
1024         .adc_en1_mask = AXP192_ADC_EN1_MASK,
1025         .adc_en2_mask = AXP192_ADC_EN2_MASK,
1026         .adc_rate = axp20x_adc_rate,
1027         .maps = axp20x_maps,
1028 };
1029
1030 static const struct axp_data axp20x_data = {
1031         .iio_info = &axp20x_adc_iio_info,
1032         .num_channels = ARRAY_SIZE(axp20x_adc_channels),
1033         .channels = axp20x_adc_channels,
1034         .adc_en1 = AXP20X_ADC_EN1,
1035         .adc_en1_mask = AXP20X_ADC_EN1_MASK,
1036         .adc_en2 = AXP20X_ADC_EN2,
1037         .adc_en2_mask = AXP20X_ADC_EN2_MASK,
1038         .adc_rate = axp20x_adc_rate,
1039         .maps = axp20x_maps,
1040 };
1041
1042 static const struct axp_data axp22x_data = {
1043         .iio_info = &axp22x_adc_iio_info,
1044         .num_channels = ARRAY_SIZE(axp22x_adc_channels),
1045         .channels = axp22x_adc_channels,
1046         .adc_en1 = AXP20X_ADC_EN1,
1047         .adc_en1_mask = AXP22X_ADC_EN1_MASK,
1048         .adc_rate = axp22x_adc_rate,
1049         .maps = axp22x_maps,
1050 };
1051
1052 static const struct axp_data axp717_data = {
1053         .iio_info = &axp717_adc_iio_info,
1054         .num_channels = ARRAY_SIZE(axp717_adc_channels),
1055         .channels = axp717_adc_channels,
1056         .adc_en1 = AXP717_ADC_CH_EN_CONTROL,
1057         .adc_en1_mask = AXP717_ADC_EN1_MASK,
1058         .maps = axp717_maps,
1059 };
1060
1061 static const struct axp_data axp813_data = {
1062         .iio_info = &axp813_adc_iio_info,
1063         .num_channels = ARRAY_SIZE(axp813_adc_channels),
1064         .channels = axp813_adc_channels,
1065         .adc_en1 = AXP20X_ADC_EN1,
1066         .adc_en1_mask = AXP22X_ADC_EN1_MASK,
1067         .adc_rate = axp813_adc_rate,
1068         .maps = axp22x_maps,
1069 };
1070
1071 static const struct of_device_id axp20x_adc_of_match[] = {
1072         { .compatible = "x-powers,axp192-adc", .data = (void *)&axp192_data, },
1073         { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, },
1074         { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, },
1075         { .compatible = "x-powers,axp717-adc", .data = (void *)&axp717_data, },
1076         { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, },
1077         { /* sentinel */ }
1078 };
1079 MODULE_DEVICE_TABLE(of, axp20x_adc_of_match);
1080
1081 static const struct platform_device_id axp20x_adc_id_match[] = {
1082         { .name = "axp192-adc", .driver_data = (kernel_ulong_t)&axp192_data, },
1083         { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, },
1084         { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, },
1085         { .name = "axp717-adc", .driver_data = (kernel_ulong_t)&axp717_data, },
1086         { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, },
1087         { /* sentinel */ },
1088 };
1089 MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match);
1090
1091 static int axp20x_probe(struct platform_device *pdev)
1092 {
1093         struct axp20x_adc_iio *info;
1094         struct iio_dev *indio_dev;
1095         struct axp20x_dev *axp20x_dev;
1096         int ret;
1097
1098         axp20x_dev = dev_get_drvdata(pdev->dev.parent);
1099
1100         indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
1101         if (!indio_dev)
1102                 return -ENOMEM;
1103
1104         info = iio_priv(indio_dev);
1105         platform_set_drvdata(pdev, indio_dev);
1106
1107         info->regmap = axp20x_dev->regmap;
1108         indio_dev->modes = INDIO_DIRECT_MODE;
1109
1110         if (!dev_fwnode(&pdev->dev)) {
1111                 const struct platform_device_id *id;
1112
1113                 id = platform_get_device_id(pdev);
1114                 info->data = (const struct axp_data *)id->driver_data;
1115         } else {
1116                 struct device *dev = &pdev->dev;
1117
1118                 info->data = device_get_match_data(dev);
1119         }
1120
1121         indio_dev->name = platform_get_device_id(pdev)->name;
1122         indio_dev->info = info->data->iio_info;
1123         indio_dev->num_channels = info->data->num_channels;
1124         indio_dev->channels = info->data->channels;
1125
1126         /* Enable the ADCs on IP */
1127         regmap_write(info->regmap, info->data->adc_en1,
1128                      info->data->adc_en1_mask);
1129
1130         if (info->data->adc_en2_mask)
1131                 regmap_set_bits(info->regmap, info->data->adc_en2,
1132                                 info->data->adc_en2_mask);
1133
1134         /* Configure ADCs rate */
1135         if (info->data->adc_rate)
1136                 info->data->adc_rate(info, 100);
1137
1138         ret = iio_map_array_register(indio_dev, info->data->maps);
1139         if (ret < 0) {
1140                 dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret);
1141                 goto fail_map;
1142         }
1143
1144         ret = iio_device_register(indio_dev);
1145         if (ret < 0) {
1146                 dev_err(&pdev->dev, "could not register the device\n");
1147                 goto fail_register;
1148         }
1149
1150         return 0;
1151
1152 fail_register:
1153         iio_map_array_unregister(indio_dev);
1154
1155 fail_map:
1156         regmap_write(info->regmap, info->data->adc_en1, 0);
1157
1158         if (info->data->adc_en2_mask)
1159                 regmap_write(info->regmap, info->data->adc_en2, 0);
1160
1161         return ret;
1162 }
1163
1164 static void axp20x_remove(struct platform_device *pdev)
1165 {
1166         struct iio_dev *indio_dev = platform_get_drvdata(pdev);
1167         struct axp20x_adc_iio *info = iio_priv(indio_dev);
1168
1169         iio_device_unregister(indio_dev);
1170         iio_map_array_unregister(indio_dev);
1171
1172         regmap_write(info->regmap, info->data->adc_en1, 0);
1173
1174         if (info->data->adc_en2_mask)
1175                 regmap_write(info->regmap, info->data->adc_en2, 0);
1176 }
1177
1178 static struct platform_driver axp20x_adc_driver = {
1179         .driver = {
1180                 .name = "axp20x-adc",
1181                 .of_match_table = axp20x_adc_of_match,
1182         },
1183         .id_table = axp20x_adc_id_match,
1184         .probe = axp20x_probe,
1185         .remove = axp20x_remove,
1186 };
1187
1188 module_platform_driver(axp20x_adc_driver);
1189
1190 MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs");
1191 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
1192 MODULE_LICENSE("GPL");