drivers/iio/adc/sun4i-gpadc-iio.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
   3  *
   4  * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
   5  *
   6  * The Allwinner SoCs all have an ADC that can also act as a touchscreen
   7  * controller and a thermal sensor.
   8  * The thermal sensor works only when the ADC acts as a touchscreen controller
   9  * and is configured to throw an interrupt every fixed periods of time (let say
  10  * every X seconds).
  11  * One would be tempted to disable the IP on the hardware side rather than
  12  * disabling interrupts to save some power but that resets the internal clock of
  13  * the IP, resulting in having to wait X seconds every time we want to read the
  14  * value of the thermal sensor.
  15  * This is also the reason of using autosuspend in pm_runtime. If there was no
  16  * autosuspend, the thermal sensor would need X seconds after every
  17  * pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
  18  * thermal sensor to be requested again in a certain time span before it gets
  19  * shutdown for not being used.
  20  */
  21
  22 #include <linux/completion.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/io.h>
  25 #include <linux/module.h>
  26 #include <linux/of.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/pm_runtime.h>
  29 #include <linux/regmap.h>
  30 #include <linux/thermal.h>
  31 #include <linux/delay.h>
  32
  33 #include <linux/iio/iio.h>
  34 #include <linux/iio/driver.h>
  35 #include <linux/iio/machine.h>
  36 #include <linux/mfd/sun4i-gpadc.h>
  37
  38 static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
  39 {
  40         return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  41 }
  42
  43 static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
  44 {
  45         return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  46 }
  47
  48 struct gpadc_data {
  49         int             temp_offset;
  50         int             temp_scale;
  51         unsigned int    tp_mode_en;
  52         unsigned int    tp_adc_select;
  53         unsigned int    (*adc_chan_select)(unsigned int chan);
  54         unsigned int    adc_chan_mask;
  55 };
  56
  57 static const struct gpadc_data sun4i_gpadc_data = {
  58         .temp_offset = -1932,
  59         .temp_scale = 133,
  60         .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  61         .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  62         .adc_chan_select = &sun4i_gpadc_chan_select,
  63         .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  64 };
  65
  66 static const struct gpadc_data sun5i_gpadc_data = {
  67         .temp_offset = -1447,
  68         .temp_scale = 100,
  69         .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  70         .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  71         .adc_chan_select = &sun4i_gpadc_chan_select,
  72         .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  73 };
  74
  75 static const struct gpadc_data sun6i_gpadc_data = {
  76         .temp_offset = -1623,
  77         .temp_scale = 167,
  78         .tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
  79         .tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
  80         .adc_chan_select = &sun6i_gpadc_chan_select,
  81         .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
  82 };
  83
  84 static const struct gpadc_data sun8i_a33_gpadc_data = {
  85         .temp_offset = -1662,
  86         .temp_scale = 162,
  87         .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
  88 };
  89
  90 struct sun4i_gpadc_iio {
  91         struct iio_dev                  *indio_dev;
  92         struct completion               completion;
  93         int                             temp_data;
  94         u32                             adc_data;
  95         struct regmap                   *regmap;
  96         unsigned int                    fifo_data_irq;
  97         atomic_t                        ignore_fifo_data_irq;
  98         unsigned int                    temp_data_irq;
  99         atomic_t                        ignore_temp_data_irq;
 100         const struct gpadc_data         *data;
 101         bool                            no_irq;
 102         /* prevents concurrent reads of temperature and ADC */
 103         struct mutex                    mutex;
 104         struct thermal_zone_device      *tzd;
 105         struct device                   *sensor_device;
 106 };
 107
 108 #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) {              \
 109         .type = IIO_VOLTAGE,                                    \
 110         .indexed = 1,                                           \
 111         .channel = _channel,                                    \
 112         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),           \
 113         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
 114         .datasheet_name = _name,                                \
 115 }
 116
 117 static const struct iio_map sun4i_gpadc_hwmon_maps[] = {
 118         IIO_MAP("temp_adc", "iio_hwmon.0", NULL),
 119         { /* sentinel */ },
 120 };
 121
 122 static const struct iio_chan_spec sun4i_gpadc_channels[] = {
 123         SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
 124         SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
 125         SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
 126         SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
 127         {
 128                 .type = IIO_TEMP,
 129                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 130                                       BIT(IIO_CHAN_INFO_SCALE) |
 131                                       BIT(IIO_CHAN_INFO_OFFSET),
 132                 .datasheet_name = "temp_adc",
 133         },
 134 };
 135
 136 static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
 137         SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
 138         SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
 139         SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
 140         SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
 141 };
 142
 143 static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
 144         {
 145                 .type = IIO_TEMP,
 146                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 147                                       BIT(IIO_CHAN_INFO_SCALE) |
 148                                       BIT(IIO_CHAN_INFO_OFFSET),
 149                 .datasheet_name = "temp_adc",
 150         },
 151 };
 152
 153 static const struct regmap_config sun4i_gpadc_regmap_config = {
 154         .reg_bits = 32,
 155         .val_bits = 32,
 156         .reg_stride = 4,
 157         .fast_io = true,
 158 };
 159
 160 static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
 161                                  unsigned int irq)
 162 {
 163         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 164         int ret;
 165         u32 reg;
 166
 167         pm_runtime_get_sync(indio_dev->dev.parent);
 168
 169         reinit_completion(&info->completion);
 170
 171         ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
 172                            SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
 173                            SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
 174         if (ret)
 175                 return ret;
 176
 177         ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, &reg);
 178         if (ret)
 179                 return ret;
 180
 181         if (irq == info->fifo_data_irq) {
 182                 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
 183                                    info->data->tp_mode_en |
 184                                    info->data->tp_adc_select |
 185                                    info->data->adc_chan_select(channel));
 186                 /*
 187                  * When the IP changes channel, it needs a bit of time to get
 188                  * correct values.
 189                  */
 190                 if ((reg & info->data->adc_chan_mask) !=
 191                          info->data->adc_chan_select(channel))
 192                         mdelay(10);
 193
 194         } else {
 195                 /*
 196                  * The temperature sensor returns valid data only when the ADC
 197                  * operates in touchscreen mode.
 198                  */
 199                 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
 200                                    info->data->tp_mode_en);
 201         }
 202
 203         if (ret)
 204                 return ret;
 205
 206         /*
 207          * When the IP changes mode between ADC or touchscreen, it
 208          * needs a bit of time to get correct values.
 209          */
 210         if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
 211                 mdelay(100);
 212
 213         return 0;
 214 }
 215
 216 static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
 217                             unsigned int irq)
 218 {
 219         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 220         int ret;
 221
 222         mutex_lock(&info->mutex);
 223
 224         ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
 225         if (ret)
 226                 goto err;
 227
 228         enable_irq(irq);
 229
 230         /*
 231          * The temperature sensor throws an interruption periodically (currently
 232          * set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
 233          * makes sure an interruption occurs in normal conditions. If it doesn't
 234          * occur, then there is a timeout.
 235          */
 236         if (!wait_for_completion_timeout(&info->completion,
 237                                          msecs_to_jiffies(1000))) {
 238                 ret = -ETIMEDOUT;
 239                 goto err;
 240         }
 241
 242         if (irq == info->fifo_data_irq)
 243                 *val = info->adc_data;
 244         else
 245                 *val = info->temp_data;
 246
 247         ret = 0;
 248         pm_runtime_mark_last_busy(indio_dev->dev.parent);
 249
 250 err:
 251         pm_runtime_put_autosuspend(indio_dev->dev.parent);
 252         disable_irq(irq);
 253         mutex_unlock(&info->mutex);
 254
 255         return ret;
 256 }
 257
 258 static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
 259                                 int *val)
 260 {
 261         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 262
 263         return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
 264 }
 265
 266 static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
 267 {
 268         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 269
 270         if (info->no_irq) {
 271                 pm_runtime_get_sync(indio_dev->dev.parent);
 272
 273                 regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
 274
 275                 pm_runtime_mark_last_busy(indio_dev->dev.parent);
 276                 pm_runtime_put_autosuspend(indio_dev->dev.parent);
 277
 278                 return 0;
 279         }
 280
 281         return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
 282 }
 283
 284 static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
 285 {
 286         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 287
 288         *val = info->data->temp_offset;
 289
 290         return 0;
 291 }
 292
 293 static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
 294 {
 295         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 296
 297         *val = info->data->temp_scale;
 298
 299         return 0;
 300 }
 301
 302 static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
 303                                 struct iio_chan_spec const *chan, int *val,
 304                                 int *val2, long mask)
 305 {
 306         int ret;
 307
 308         switch (mask) {
 309         case IIO_CHAN_INFO_OFFSET:
 310                 ret = sun4i_gpadc_temp_offset(indio_dev, val);
 311                 if (ret)
 312                         return ret;
 313
 314                 return IIO_VAL_INT;
 315         case IIO_CHAN_INFO_RAW:
 316                 if (chan->type == IIO_VOLTAGE)
 317                         ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
 318                                                    val);
 319                 else
 320                         ret = sun4i_gpadc_temp_read(indio_dev, val);
 321
 322                 if (ret)
 323                         return ret;
 324
 325                 return IIO_VAL_INT;
 326         case IIO_CHAN_INFO_SCALE:
 327                 if (chan->type == IIO_VOLTAGE) {
 328                         /* 3000mV / 4096 * raw */
 329                         *val = 0;
 330                         *val2 = 732421875;
 331                         return IIO_VAL_INT_PLUS_NANO;
 332                 }
 333
 334                 ret = sun4i_gpadc_temp_scale(indio_dev, val);
 335                 if (ret)
 336                         return ret;
 337
 338                 return IIO_VAL_INT;
 339         default:
 340                 return -EINVAL;
 341         }
 342
 343         return -EINVAL;
 344 }
 345
 346 static const struct iio_info sun4i_gpadc_iio_info = {
 347         .read_raw = sun4i_gpadc_read_raw,
 348 };
 349
 350 static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
 351 {
 352         struct sun4i_gpadc_iio *info = dev_id;
 353
 354         if (atomic_read(&info->ignore_temp_data_irq))
 355                 goto out;
 356
 357         if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
 358                 complete(&info->completion);
 359
 360 out:
 361         return IRQ_HANDLED;
 362 }
 363
 364 static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
 365 {
 366         struct sun4i_gpadc_iio *info = dev_id;
 367
 368         if (atomic_read(&info->ignore_fifo_data_irq))
 369                 goto out;
 370
 371         if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
 372                 complete(&info->completion);
 373
 374 out:
 375         return IRQ_HANDLED;
 376 }
 377
 378 static int sun4i_gpadc_runtime_suspend(struct device *dev)
 379 {
 380         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
 381
 382         /* Disable the ADC on IP */
 383         regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
 384         /* Disable temperature sensor on IP */
 385         regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
 386
 387         return 0;
 388 }
 389
 390 static int sun4i_gpadc_runtime_resume(struct device *dev)
 391 {
 392         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
 393
 394         /* clkin = 6MHz */
 395         regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
 396                      SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
 397                      SUN4I_GPADC_CTRL0_FS_DIV(7) |
 398                      SUN4I_GPADC_CTRL0_T_ACQ(63));
 399         regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
 400         regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
 401                      SUN4I_GPADC_CTRL3_FILTER_EN |
 402                      SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
 403         /* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
 404         regmap_write(info->regmap, SUN4I_GPADC_TPR,
 405                      SUN4I_GPADC_TPR_TEMP_ENABLE |
 406                      SUN4I_GPADC_TPR_TEMP_PERIOD(800));
 407
 408         return 0;
 409 }
 410
 411 static int sun4i_gpadc_get_temp(struct thermal_zone_device *tz, int *temp)
 412 {
 413         struct sun4i_gpadc_iio *info = thermal_zone_device_priv(tz);
 414         int val, scale, offset;
 415
 416         if (sun4i_gpadc_temp_read(info->indio_dev, &val))
 417                 return -ETIMEDOUT;
 418
 419         sun4i_gpadc_temp_scale(info->indio_dev, &scale);
 420         sun4i_gpadc_temp_offset(info->indio_dev, &offset);
 421
 422         *temp = (val + offset) * scale;
 423
 424         return 0;
 425 }
 426
 427 static const struct thermal_zone_device_ops sun4i_ts_tz_ops = {
 428         .get_temp = &sun4i_gpadc_get_temp,
 429 };
 430
 431 static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
 432         .runtime_suspend = &sun4i_gpadc_runtime_suspend,
 433         .runtime_resume = &sun4i_gpadc_runtime_resume,
 434 };
 435
 436 static int sun4i_irq_init(struct platform_device *pdev, const char *name,
 437                           irq_handler_t handler, const char *devname,
 438                           unsigned int *irq, atomic_t *atomic)
 439 {
 440         int ret;
 441         struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
 442         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
 443
 444         /*
 445          * Once the interrupt is activated, the IP continuously performs
 446          * conversions thus throws interrupts. The interrupt is activated right
 447          * after being requested but we want to control when these interrupts
 448          * occur thus we disable it right after being requested. However, an
 449          * interrupt might occur between these two instructions and we have to
 450          * make sure that does not happen, by using atomic flags. We set the
 451          * flag before requesting the interrupt and unset it right after
 452          * disabling the interrupt. When an interrupt occurs between these two
 453          * instructions, reading the atomic flag will tell us to ignore the
 454          * interrupt.
 455          */
 456         atomic_set(atomic, 1);
 457
 458         ret = platform_get_irq_byname(pdev, name);
 459         if (ret < 0)
 460                 return ret;
 461
 462         ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
 463         if (ret < 0) {
 464                 dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
 465                 return ret;
 466         }
 467
 468         *irq = ret;
 469         ret = devm_request_any_context_irq(&pdev->dev, *irq, handler,
 470                                            IRQF_NO_AUTOEN,
 471                                            devname, info);
 472         if (ret < 0) {
 473                 dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
 474                         name, ret);
 475                 return ret;
 476         }
 477
 478         atomic_set(atomic, 0);
 479
 480         return 0;
 481 }
 482
 483 static const struct of_device_id sun4i_gpadc_of_id[] = {
 484         {
 485                 .compatible = "allwinner,sun8i-a33-ths",
 486                 .data = &sun8i_a33_gpadc_data,
 487         },
 488         { /* sentinel */ }
 489 };
 490
 491 static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
 492                                 struct iio_dev *indio_dev)
 493 {
 494         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 495         void __iomem *base;
 496         int ret;
 497
 498         info->data = of_device_get_match_data(&pdev->dev);
 499         if (!info->data)
 500                 return -ENODEV;
 501
 502         info->no_irq = true;
 503         indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
 504         indio_dev->channels = sun8i_a33_gpadc_channels;
 505
 506         base = devm_platform_ioremap_resource(pdev, 0);
 507         if (IS_ERR(base))
 508                 return PTR_ERR(base);
 509
 510         info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
 511                                              &sun4i_gpadc_regmap_config);
 512         if (IS_ERR(info->regmap)) {
 513                 ret = PTR_ERR(info->regmap);
 514                 dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
 515                 return ret;
 516         }
 517
 518         if (IS_ENABLED(CONFIG_THERMAL_OF))
 519                 info->sensor_device = &pdev->dev;
 520
 521         return 0;
 522 }
 523
 524 static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
 525                                  struct iio_dev *indio_dev)
 526 {
 527         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 528         struct sun4i_gpadc_dev *sun4i_gpadc_dev =
 529                 dev_get_drvdata(pdev->dev.parent);
 530         int ret;
 531
 532         info->no_irq = false;
 533         info->regmap = sun4i_gpadc_dev->regmap;
 534
 535         indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
 536         indio_dev->channels = sun4i_gpadc_channels;
 537
 538         info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
 539
 540         /*
 541          * Since the controller needs to be in touchscreen mode for its thermal
 542          * sensor to operate properly, and that switching between the two modes
 543          * needs a delay, always registering in the thermal framework will
 544          * significantly slow down the conversion rate of the ADCs.
 545          *
 546          * Therefore, instead of depending on THERMAL_OF in Kconfig, we only
 547          * register the sensor if that option is enabled, eventually leaving
 548          * that choice to the user.
 549          */
 550
 551         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 552                 /*
 553                  * This driver is a child of an MFD which has a node in the DT
 554                  * but not its children, because of DT backward compatibility
 555                  * for A10, A13 and A31 SoCs. Therefore, the resulting devices
 556                  * of this driver do not have an of_node variable.
 557                  * However, its parent (the MFD driver) has an of_node variable
 558                  * and since devm_thermal_zone_of_sensor_register uses its first
 559                  * argument to match the phandle defined in the node of the
 560                  * thermal driver with the of_node of the device passed as first
 561                  * argument and the third argument to call ops from
 562                  * thermal_zone_of_device_ops, the solution is to use the parent
 563                  * device as first argument to match the phandle with its
 564                  * of_node, and the device from this driver as third argument to
 565                  * return the temperature.
 566                  */
 567                 info->sensor_device = pdev->dev.parent;
 568         } else {
 569                 indio_dev->num_channels =
 570                         ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
 571                 indio_dev->channels = sun4i_gpadc_channels_no_temp;
 572         }
 573
 574         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 575                 ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
 576                                      sun4i_gpadc_temp_data_irq_handler,
 577                                      "temp_data", &info->temp_data_irq,
 578                                      &info->ignore_temp_data_irq);
 579                 if (ret < 0)
 580                         return ret;
 581         }
 582
 583         ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
 584                              sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
 585                              &info->fifo_data_irq, &info->ignore_fifo_data_irq);
 586         if (ret < 0)
 587                 return ret;
 588
 589         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 590                 ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
 591                 if (ret < 0) {
 592                         dev_err(&pdev->dev,
 593                                 "failed to register iio map array\n");
 594                         return ret;
 595                 }
 596         }
 597
 598         return 0;
 599 }
 600
 601 static int sun4i_gpadc_probe(struct platform_device *pdev)
 602 {
 603         struct sun4i_gpadc_iio *info;
 604         struct iio_dev *indio_dev;
 605         int ret;
 606
 607         indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
 608         if (!indio_dev)
 609                 return -ENOMEM;
 610
 611         info = iio_priv(indio_dev);
 612         platform_set_drvdata(pdev, indio_dev);
 613
 614         mutex_init(&info->mutex);
 615         info->indio_dev = indio_dev;
 616         init_completion(&info->completion);
 617         indio_dev->name = dev_name(&pdev->dev);
 618         indio_dev->info = &sun4i_gpadc_iio_info;
 619         indio_dev->modes = INDIO_DIRECT_MODE;
 620
 621         if (pdev->dev.of_node)
 622                 ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
 623         else
 624                 ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
 625
 626         if (ret)
 627                 return ret;
 628
 629         pm_runtime_set_autosuspend_delay(&pdev->dev,
 630                                          SUN4I_GPADC_AUTOSUSPEND_DELAY);
 631         pm_runtime_use_autosuspend(&pdev->dev);
 632         pm_runtime_set_suspended(&pdev->dev);
 633         pm_runtime_enable(&pdev->dev);
 634
 635         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 636                 info->tzd = devm_thermal_of_zone_register(info->sensor_device,
 637                                                           0, info,
 638                                                           &sun4i_ts_tz_ops);
 639                 /*
 640                  * Do not fail driver probing when failing to register in
 641                  * thermal because no thermal DT node is found.
 642                  */
 643                 if (IS_ERR(info->tzd) && PTR_ERR(info->tzd) != -ENODEV) {
 644                         dev_err(&pdev->dev,
 645                                 "could not register thermal sensor: %ld\n",
 646                                 PTR_ERR(info->tzd));
 647                         return PTR_ERR(info->tzd);
 648                 }
 649         }
 650
 651         ret = devm_iio_device_register(&pdev->dev, indio_dev);
 652         if (ret < 0) {
 653                 dev_err(&pdev->dev, "could not register the device\n");
 654                 goto err_map;
 655         }
 656
 657         return 0;
 658
 659 err_map:
 660         if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
 661                 iio_map_array_unregister(indio_dev);
 662
 663         pm_runtime_put(&pdev->dev);
 664         pm_runtime_disable(&pdev->dev);
 665
 666         return ret;
 667 }
 668
 669 static void sun4i_gpadc_remove(struct platform_device *pdev)
 670 {
 671         struct iio_dev *indio_dev = platform_get_drvdata(pdev);
 672         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 673
 674         pm_runtime_put(&pdev->dev);
 675         pm_runtime_disable(&pdev->dev);
 676
 677         if (!IS_ENABLED(CONFIG_THERMAL_OF))
 678                 return;
 679
 680         if (!info->no_irq)
 681                 iio_map_array_unregister(indio_dev);
 682 }
 683
 684 static const struct platform_device_id sun4i_gpadc_id[] = {
 685         { "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
 686         { "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
 687         { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
 688         { /* sentinel */ },
 689 };
 690 MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id);
 691
 692 static struct platform_driver sun4i_gpadc_driver = {
 693         .driver = {
 694                 .name = "sun4i-gpadc-iio",
 695                 .of_match_table = sun4i_gpadc_of_id,
 696                 .pm = &sun4i_gpadc_pm_ops,
 697         },
 698         .id_table = sun4i_gpadc_id,
 699         .probe = sun4i_gpadc_probe,
 700         .remove = sun4i_gpadc_remove,
 701 };
 702 MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id);
 703
 704 module_platform_driver(sun4i_gpadc_driver);
 705
 706 MODULE_DESCRIPTION("ADC driver for sunxi platforms");
 707 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
 708 MODULE_LICENSE("GPL v2");