1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for ISSI IS31FL32xx family of I2C LED controllers
5 * Copyright 2015 Allworx Corp.
8 * http://www.issi.com/US/product-analog-fxled-driver.shtml
9 * http://www.si-en.com/product.asp?parentid=890
12 #include <linux/device.h>
13 #include <linux/i2c.h>
14 #include <linux/kernel.h>
15 #include <linux/leds.h>
16 #include <linux/module.h>
19 /* Used to indicate a device has no such register */
20 #define IS31FL32XX_REG_NONE 0xFF
22 /* Software Shutdown bit in Shutdown Register */
23 #define IS31FL32XX_SHUTDOWN_SSD_ENABLE 0
24 #define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)
26 /* IS31FL3216 has a number of unique registers */
27 #define IS31FL3216_CONFIG_REG 0x00
28 #define IS31FL3216_LIGHTING_EFFECT_REG 0x03
29 #define IS31FL3216_CHANNEL_CONFIG_REG 0x04
31 /* Software Shutdown bit in 3216 Config Register */
32 #define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
33 #define IS31FL3216_CONFIG_SSD_DISABLE 0
35 struct is31fl32xx_priv
;
36 struct is31fl32xx_led_data
{
37 struct led_classdev cdev
;
38 u8 channel
; /* 1-based, max priv->cdef->channels */
39 struct is31fl32xx_priv
*priv
;
42 struct is31fl32xx_priv
{
43 const struct is31fl32xx_chipdef
*cdef
;
44 struct i2c_client
*client
;
45 unsigned int num_leds
;
46 struct is31fl32xx_led_data leds
[];
50 * struct is31fl32xx_chipdef - chip-specific attributes
51 * @channels : Number of LED channels
52 * @shutdown_reg : address of Shutdown register (optional)
53 * @pwm_update_reg : address of PWM Update register
54 * @global_control_reg : address of Global Control register (optional)
55 * @reset_reg : address of Reset register (optional)
56 * @pwm_register_base : address of first PWM register
57 * @pwm_registers_reversed: : true if PWM registers count down instead of up
58 * @led_control_register_base : address of first LED control register (optional)
59 * @enable_bits_per_led_control_register: number of LEDs enable bits in each
60 * @reset_func : pointer to reset function
61 * @sw_shutdown_func : pointer to software shutdown function
63 * For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
64 * indicates that this chip has no such register.
66 * If non-NULL, @reset_func will be called during probing to set all
67 * necessary registers to a known initialization state. This is needed
68 * for chips that do not have a @reset_reg.
70 * @enable_bits_per_led_control_register must be >=1 if
71 * @led_control_register_base != %IS31FL32XX_REG_NONE.
73 struct is31fl32xx_chipdef
{
77 u8 global_control_reg
;
80 bool pwm_registers_reversed
;
81 u8 led_control_register_base
;
82 u8 enable_bits_per_led_control_register
;
83 int (*reset_func
)(struct is31fl32xx_priv
*priv
);
84 int (*sw_shutdown_func
)(struct is31fl32xx_priv
*priv
, bool enable
);
87 static const struct is31fl32xx_chipdef is31fl3236_cdef
= {
90 .pwm_update_reg
= 0x25,
91 .global_control_reg
= 0x4a,
93 .pwm_register_base
= 0x01,
94 .led_control_register_base
= 0x26,
95 .enable_bits_per_led_control_register
= 1,
98 static const struct is31fl32xx_chipdef is31fl3235_cdef
= {
100 .shutdown_reg
= 0x00,
101 .pwm_update_reg
= 0x25,
102 .global_control_reg
= 0x4a,
104 .pwm_register_base
= 0x05,
105 .led_control_register_base
= 0x2a,
106 .enable_bits_per_led_control_register
= 1,
109 static const struct is31fl32xx_chipdef is31fl3218_cdef
= {
111 .shutdown_reg
= 0x00,
112 .pwm_update_reg
= 0x16,
113 .global_control_reg
= IS31FL32XX_REG_NONE
,
115 .pwm_register_base
= 0x01,
116 .led_control_register_base
= 0x13,
117 .enable_bits_per_led_control_register
= 6,
120 static int is31fl3216_reset(struct is31fl32xx_priv
*priv
);
121 static int is31fl3216_software_shutdown(struct is31fl32xx_priv
*priv
,
123 static const struct is31fl32xx_chipdef is31fl3216_cdef
= {
125 .shutdown_reg
= IS31FL32XX_REG_NONE
,
126 .pwm_update_reg
= 0xB0,
127 .global_control_reg
= IS31FL32XX_REG_NONE
,
128 .reset_reg
= IS31FL32XX_REG_NONE
,
129 .pwm_register_base
= 0x10,
130 .pwm_registers_reversed
= true,
131 .led_control_register_base
= 0x01,
132 .enable_bits_per_led_control_register
= 8,
133 .reset_func
= is31fl3216_reset
,
134 .sw_shutdown_func
= is31fl3216_software_shutdown
,
137 static int is31fl32xx_write(struct is31fl32xx_priv
*priv
, u8 reg
, u8 val
)
141 dev_dbg(&priv
->client
->dev
, "writing register 0x%02X=0x%02X", reg
, val
);
143 ret
= i2c_smbus_write_byte_data(priv
->client
, reg
, val
);
145 dev_err(&priv
->client
->dev
,
146 "register write to 0x%02X failed (error %d)",
153 * Custom reset function for IS31FL3216 because it does not have a RESET
154 * register the way that the other IS31FL32xx chips do. We don't bother
155 * writing the GPIO and animation registers, because the registers we
156 * do write ensure those will have no effect.
158 static int is31fl3216_reset(struct is31fl32xx_priv
*priv
)
163 ret
= is31fl32xx_write(priv
, IS31FL3216_CONFIG_REG
,
164 IS31FL3216_CONFIG_SSD_ENABLE
);
167 for (i
= 0; i
< priv
->cdef
->channels
; i
++) {
168 ret
= is31fl32xx_write(priv
, priv
->cdef
->pwm_register_base
+i
,
173 ret
= is31fl32xx_write(priv
, priv
->cdef
->pwm_update_reg
, 0);
176 ret
= is31fl32xx_write(priv
, IS31FL3216_LIGHTING_EFFECT_REG
, 0x00);
179 ret
= is31fl32xx_write(priv
, IS31FL3216_CHANNEL_CONFIG_REG
, 0x00);
187 * Custom Software-Shutdown function for IS31FL3216 because it does not have
188 * a SHUTDOWN register the way that the other IS31FL32xx chips do.
189 * We don't bother doing a read/modify/write on the CONFIG register because
190 * we only ever use a value of '0' for the other fields in that register.
192 static int is31fl3216_software_shutdown(struct is31fl32xx_priv
*priv
,
195 u8 value
= enable
? IS31FL3216_CONFIG_SSD_ENABLE
:
196 IS31FL3216_CONFIG_SSD_DISABLE
;
198 return is31fl32xx_write(priv
, IS31FL3216_CONFIG_REG
, value
);
202 * NOTE: A mutex is not needed in this function because:
203 * - All referenced data is read-only after probe()
204 * - The I2C core has a mutex on to protect the bus
205 * - There are no read/modify/write operations
206 * - Intervening operations between the write of the PWM register
207 * and the Update register are harmless.
212 * PWM_REG_2 write 128
216 * PWM_REG_2 write 128
219 * are equivalent. Poking the Update register merely applies all PWM
220 * register writes up to that point.
222 static int is31fl32xx_brightness_set(struct led_classdev
*led_cdev
,
223 enum led_brightness brightness
)
225 const struct is31fl32xx_led_data
*led_data
=
226 container_of(led_cdev
, struct is31fl32xx_led_data
, cdev
);
227 const struct is31fl32xx_chipdef
*cdef
= led_data
->priv
->cdef
;
228 u8 pwm_register_offset
;
231 dev_dbg(led_cdev
->dev
, "%s: %d\n", __func__
, brightness
);
233 /* NOTE: led_data->channel is 1-based */
234 if (cdef
->pwm_registers_reversed
)
235 pwm_register_offset
= cdef
->channels
- led_data
->channel
;
237 pwm_register_offset
= led_data
->channel
- 1;
239 ret
= is31fl32xx_write(led_data
->priv
,
240 cdef
->pwm_register_base
+ pwm_register_offset
,
245 return is31fl32xx_write(led_data
->priv
, cdef
->pwm_update_reg
, 0);
248 static int is31fl32xx_reset_regs(struct is31fl32xx_priv
*priv
)
250 const struct is31fl32xx_chipdef
*cdef
= priv
->cdef
;
253 if (cdef
->reset_reg
!= IS31FL32XX_REG_NONE
) {
254 ret
= is31fl32xx_write(priv
, cdef
->reset_reg
, 0);
259 if (cdef
->reset_func
)
260 return cdef
->reset_func(priv
);
265 static int is31fl32xx_software_shutdown(struct is31fl32xx_priv
*priv
,
268 const struct is31fl32xx_chipdef
*cdef
= priv
->cdef
;
271 if (cdef
->shutdown_reg
!= IS31FL32XX_REG_NONE
) {
272 u8 value
= enable
? IS31FL32XX_SHUTDOWN_SSD_ENABLE
:
273 IS31FL32XX_SHUTDOWN_SSD_DISABLE
;
274 ret
= is31fl32xx_write(priv
, cdef
->shutdown_reg
, value
);
279 if (cdef
->sw_shutdown_func
)
280 return cdef
->sw_shutdown_func(priv
, enable
);
285 static int is31fl32xx_init_regs(struct is31fl32xx_priv
*priv
)
287 const struct is31fl32xx_chipdef
*cdef
= priv
->cdef
;
290 ret
= is31fl32xx_reset_regs(priv
);
295 * Set enable bit for all channels.
296 * We will control state with PWM registers alone.
298 if (cdef
->led_control_register_base
!= IS31FL32XX_REG_NONE
) {
300 GENMASK(cdef
->enable_bits_per_led_control_register
-1, 0);
301 u8 num_regs
= cdef
->channels
/
302 cdef
->enable_bits_per_led_control_register
;
305 for (i
= 0; i
< num_regs
; i
++) {
306 ret
= is31fl32xx_write(priv
,
307 cdef
->led_control_register_base
+i
,
314 ret
= is31fl32xx_software_shutdown(priv
, false);
318 if (cdef
->global_control_reg
!= IS31FL32XX_REG_NONE
) {
319 ret
= is31fl32xx_write(priv
, cdef
->global_control_reg
, 0x00);
327 static int is31fl32xx_parse_child_dt(const struct device
*dev
,
328 const struct device_node
*child
,
329 struct is31fl32xx_led_data
*led_data
)
331 struct led_classdev
*cdev
= &led_data
->cdev
;
335 ret
= of_property_read_u32(child
, "reg", ®
);
336 if (ret
|| reg
< 1 || reg
> led_data
->priv
->cdef
->channels
) {
338 "Child node %pOF does not have a valid reg property\n",
342 led_data
->channel
= reg
;
344 cdev
->brightness_set_blocking
= is31fl32xx_brightness_set
;
349 static struct is31fl32xx_led_data
*is31fl32xx_find_led_data(
350 struct is31fl32xx_priv
*priv
,
355 for (i
= 0; i
< priv
->num_leds
; i
++) {
356 if (priv
->leds
[i
].channel
== channel
)
357 return &priv
->leds
[i
];
363 static int is31fl32xx_parse_dt(struct device
*dev
,
364 struct is31fl32xx_priv
*priv
)
368 for_each_available_child_of_node_scoped(dev_of_node(dev
), child
) {
369 struct led_init_data init_data
= {};
370 struct is31fl32xx_led_data
*led_data
=
371 &priv
->leds
[priv
->num_leds
];
372 const struct is31fl32xx_led_data
*other_led_data
;
374 led_data
->priv
= priv
;
376 ret
= is31fl32xx_parse_child_dt(dev
, child
, led_data
);
380 /* Detect if channel is already in use by another child */
381 other_led_data
= is31fl32xx_find_led_data(priv
,
383 if (other_led_data
) {
385 "Node %pOF 'reg' conflicts with another LED\n",
390 init_data
.fwnode
= of_fwnode_handle(child
);
392 ret
= devm_led_classdev_register_ext(dev
, &led_data
->cdev
,
395 dev_err(dev
, "Failed to register LED for %pOF: %d\n",
406 static const struct of_device_id of_is31fl32xx_match
[] = {
407 { .compatible
= "issi,is31fl3236", .data
= &is31fl3236_cdef
, },
408 { .compatible
= "issi,is31fl3235", .data
= &is31fl3235_cdef
, },
409 { .compatible
= "issi,is31fl3218", .data
= &is31fl3218_cdef
, },
410 { .compatible
= "si-en,sn3218", .data
= &is31fl3218_cdef
, },
411 { .compatible
= "issi,is31fl3216", .data
= &is31fl3216_cdef
, },
412 { .compatible
= "si-en,sn3216", .data
= &is31fl3216_cdef
, },
416 MODULE_DEVICE_TABLE(of
, of_is31fl32xx_match
);
418 static int is31fl32xx_probe(struct i2c_client
*client
)
420 const struct is31fl32xx_chipdef
*cdef
;
421 struct device
*dev
= &client
->dev
;
422 struct is31fl32xx_priv
*priv
;
426 cdef
= device_get_match_data(dev
);
428 count
= of_get_available_child_count(dev_of_node(dev
));
432 priv
= devm_kzalloc(dev
, struct_size(priv
, leds
, count
),
437 priv
->client
= client
;
439 i2c_set_clientdata(client
, priv
);
441 ret
= is31fl32xx_init_regs(priv
);
445 ret
= is31fl32xx_parse_dt(dev
, priv
);
452 static void is31fl32xx_remove(struct i2c_client
*client
)
454 struct is31fl32xx_priv
*priv
= i2c_get_clientdata(client
);
457 ret
= is31fl32xx_reset_regs(priv
);
459 dev_err(&client
->dev
, "Failed to reset registers on removal (%pe)\n",
464 * i2c-core (and modalias) requires that id_table be properly filled,
465 * even though it is not used for DeviceTree based instantiation.
467 static const struct i2c_device_id is31fl32xx_id
[] = {
477 MODULE_DEVICE_TABLE(i2c
, is31fl32xx_id
);
479 static struct i2c_driver is31fl32xx_driver
= {
481 .name
= "is31fl32xx",
482 .of_match_table
= of_is31fl32xx_match
,
484 .probe
= is31fl32xx_probe
,
485 .remove
= is31fl32xx_remove
,
486 .id_table
= is31fl32xx_id
,
489 module_i2c_driver(is31fl32xx_driver
);
491 MODULE_AUTHOR("David Rivshin <drivshin@allworx.com>");
492 MODULE_DESCRIPTION("ISSI IS31FL32xx LED driver");
493 MODULE_LICENSE("GPL v2");