1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas Solutions Highlander FPGA I2C/SMBus support.
5 * Supported devices: R0P7780LC0011RL, R0P7785LC0011RL
7 * Copyright (C) 2008 Paul Mundt
8 * Copyright (C) 2008 Renesas Solutions Corp.
9 * Copyright (C) 2008 Atom Create Engineering Co., Ltd.
11 #include <linux/module.h>
12 #include <linux/interrupt.h>
13 #include <linux/i2c.h>
14 #include <linux/platform_device.h>
15 #include <linux/completion.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
21 #define SMCR_START (1 << 0)
22 #define SMCR_IRIC (1 << 1)
23 #define SMCR_BBSY (1 << 2)
24 #define SMCR_ACKE (1 << 3)
25 #define SMCR_RST (1 << 4)
26 #define SMCR_IEIC (1 << 6)
31 #define SMMR_MODE0 (1 << 0)
32 #define SMMR_MODE1 (1 << 1)
33 #define SMMR_CAP (1 << 3)
34 #define SMMR_TMMD (1 << 4)
35 #define SMMR_SP (1 << 7)
40 struct highlander_i2c_dev
{
43 struct i2c_adapter adapter
;
44 struct completion cmd_complete
;
45 unsigned long last_read_time
;
51 static bool iic_force_poll
, iic_force_normal
;
52 static int iic_timeout
= 1000, iic_read_delay
;
54 static inline void highlander_i2c_irq_enable(struct highlander_i2c_dev
*dev
)
56 iowrite16(ioread16(dev
->base
+ SMCR
) | SMCR_IEIC
, dev
->base
+ SMCR
);
59 static inline void highlander_i2c_irq_disable(struct highlander_i2c_dev
*dev
)
61 iowrite16(ioread16(dev
->base
+ SMCR
) & ~SMCR_IEIC
, dev
->base
+ SMCR
);
64 static inline void highlander_i2c_start(struct highlander_i2c_dev
*dev
)
66 iowrite16(ioread16(dev
->base
+ SMCR
) | SMCR_START
, dev
->base
+ SMCR
);
69 static inline void highlander_i2c_done(struct highlander_i2c_dev
*dev
)
71 iowrite16(ioread16(dev
->base
+ SMCR
) | SMCR_IRIC
, dev
->base
+ SMCR
);
74 static void highlander_i2c_setup(struct highlander_i2c_dev
*dev
)
78 smmr
= ioread16(dev
->base
+ SMMR
);
86 iowrite16(smmr
, dev
->base
+ SMMR
);
89 static void smbus_write_data(u8
*src
, u16
*dst
, int len
)
91 for (; len
> 1; len
-= 2) {
92 *dst
++ = be16_to_cpup((__be16
*)src
);
100 static void smbus_read_data(u16
*src
, u8
*dst
, int len
)
102 for (; len
> 1; len
-= 2) {
103 *(__be16
*)dst
= cpu_to_be16p(src
++);
111 static void highlander_i2c_command(struct highlander_i2c_dev
*dev
,
115 u16 cmd
= (command
<< 8) | command
;
117 for (i
= 0; i
< len
; i
+= 2) {
120 iowrite16(cmd
, dev
->base
+ SMSADR
+ i
);
121 dev_dbg(dev
->dev
, "command data[%x] 0x%04x\n", i
/2, cmd
);
125 static int highlander_i2c_wait_for_bbsy(struct highlander_i2c_dev
*dev
)
127 unsigned long timeout
;
129 timeout
= jiffies
+ msecs_to_jiffies(iic_timeout
);
130 while (ioread16(dev
->base
+ SMCR
) & SMCR_BBSY
) {
131 if (time_after(jiffies
, timeout
)) {
132 dev_warn(dev
->dev
, "timeout waiting for bus ready\n");
142 static int highlander_i2c_reset(struct highlander_i2c_dev
*dev
)
144 iowrite16(ioread16(dev
->base
+ SMCR
) | SMCR_RST
, dev
->base
+ SMCR
);
145 return highlander_i2c_wait_for_bbsy(dev
);
148 static int highlander_i2c_wait_for_ack(struct highlander_i2c_dev
*dev
)
150 u16 tmp
= ioread16(dev
->base
+ SMCR
);
152 if ((tmp
& (SMCR_IRIC
| SMCR_ACKE
)) == SMCR_ACKE
) {
153 dev_warn(dev
->dev
, "ack abnormality\n");
154 return highlander_i2c_reset(dev
);
160 static irqreturn_t
highlander_i2c_irq(int irq
, void *dev_id
)
162 struct highlander_i2c_dev
*dev
= dev_id
;
164 highlander_i2c_done(dev
);
165 complete(&dev
->cmd_complete
);
170 static void highlander_i2c_poll(struct highlander_i2c_dev
*dev
)
172 unsigned long timeout
;
175 timeout
= jiffies
+ msecs_to_jiffies(iic_timeout
);
177 smcr
= ioread16(dev
->base
+ SMCR
);
180 * Don't bother checking ACKE here, this and the reset
181 * are handled in highlander_i2c_wait_xfer_done() when
182 * waiting for the ACK.
185 if (smcr
& SMCR_IRIC
)
187 if (time_after(jiffies
, timeout
))
194 dev_err(dev
->dev
, "polling timed out\n");
197 static inline int highlander_i2c_wait_xfer_done(struct highlander_i2c_dev
*dev
)
200 wait_for_completion_timeout(&dev
->cmd_complete
,
201 msecs_to_jiffies(iic_timeout
));
203 /* busy looping, the IRQ of champions */
204 highlander_i2c_poll(dev
);
206 return highlander_i2c_wait_for_ack(dev
);
209 static int highlander_i2c_read(struct highlander_i2c_dev
*dev
)
214 if (highlander_i2c_wait_for_bbsy(dev
))
217 highlander_i2c_start(dev
);
219 if (highlander_i2c_wait_xfer_done(dev
)) {
220 dev_err(dev
->dev
, "Arbitration loss\n");
225 * The R0P7780LC0011RL FPGA needs a significant delay between
226 * data read cycles, otherwise the transceiver gets confused and
227 * garbage is returned when the read is subsequently aborted.
229 * It is not sufficient to wait for BBSY.
231 * While this generally only applies to the older SH7780-based
232 * Highlanders, the same issue can be observed on SH7785 ones,
233 * albeit less frequently. SH7780-based Highlanders may need
234 * this to be as high as 1000 ms.
236 if (iic_read_delay
&& time_before(jiffies
, dev
->last_read_time
+
237 msecs_to_jiffies(iic_read_delay
)))
238 msleep(jiffies_to_msecs((dev
->last_read_time
+
239 msecs_to_jiffies(iic_read_delay
)) - jiffies
));
241 cnt
= (dev
->buf_len
+ 1) >> 1;
242 for (i
= 0; i
< cnt
; i
++) {
243 data
[i
] = ioread16(dev
->base
+ SMTRDR
+ (i
* sizeof(u16
)));
244 dev_dbg(dev
->dev
, "read data[%x] 0x%04x\n", i
, data
[i
]);
247 smbus_read_data(data
, dev
->buf
, dev
->buf_len
);
249 dev
->last_read_time
= jiffies
;
254 static int highlander_i2c_write(struct highlander_i2c_dev
*dev
)
259 smbus_write_data(dev
->buf
, data
, dev
->buf_len
);
261 cnt
= (dev
->buf_len
+ 1) >> 1;
262 for (i
= 0; i
< cnt
; i
++) {
263 iowrite16(data
[i
], dev
->base
+ SMTRDR
+ (i
* sizeof(u16
)));
264 dev_dbg(dev
->dev
, "write data[%x] 0x%04x\n", i
, data
[i
]);
267 if (highlander_i2c_wait_for_bbsy(dev
))
270 highlander_i2c_start(dev
);
272 return highlander_i2c_wait_xfer_done(dev
);
275 static int highlander_i2c_smbus_xfer(struct i2c_adapter
*adap
, u16 addr
,
276 unsigned short flags
, char read_write
,
277 u8 command
, int size
,
278 union i2c_smbus_data
*data
)
280 struct highlander_i2c_dev
*dev
= i2c_get_adapdata(adap
);
283 init_completion(&dev
->cmd_complete
);
285 dev_dbg(dev
->dev
, "addr %04x, command %02x, read_write %d, size %d\n",
286 addr
, command
, read_write
, size
);
289 * Set up the buffer and transfer size
292 case I2C_SMBUS_BYTE_DATA
:
293 dev
->buf
= &data
->byte
;
296 case I2C_SMBUS_I2C_BLOCK_DATA
:
297 dev
->buf
= &data
->block
[1];
298 dev
->buf_len
= data
->block
[0];
301 dev_err(dev
->dev
, "unsupported command %d\n", size
);
306 * Encode the mode setting
308 tmp
= ioread16(dev
->base
+ SMMR
);
309 tmp
&= ~(SMMR_MODE0
| SMMR_MODE1
);
311 switch (dev
->buf_len
) {
322 tmp
|= (SMMR_MODE0
| SMMR_MODE1
);
325 dev_err(dev
->dev
, "unsupported xfer size %zu\n", dev
->buf_len
);
329 iowrite16(tmp
, dev
->base
+ SMMR
);
331 /* Ensure we're in a sane state */
332 highlander_i2c_done(dev
);
334 /* Set target address */
335 iowrite16((addr
<< 1) | read_write
, dev
->base
+ SMSMADR
);
337 highlander_i2c_command(dev
, command
, dev
->buf_len
);
339 if (read_write
== I2C_SMBUS_READ
)
340 return highlander_i2c_read(dev
);
342 return highlander_i2c_write(dev
);
345 static u32
highlander_i2c_func(struct i2c_adapter
*adapter
)
347 return I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_I2C_BLOCK
;
350 static const struct i2c_algorithm highlander_i2c_algo
= {
351 .smbus_xfer
= highlander_i2c_smbus_xfer
,
352 .functionality
= highlander_i2c_func
,
355 static int highlander_i2c_probe(struct platform_device
*pdev
)
357 struct highlander_i2c_dev
*dev
;
358 struct i2c_adapter
*adap
;
359 struct resource
*res
;
362 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
363 if (unlikely(!res
)) {
364 dev_err(&pdev
->dev
, "no mem resource\n");
368 dev
= kzalloc(sizeof(struct highlander_i2c_dev
), GFP_KERNEL
);
372 dev
->base
= ioremap(res
->start
, resource_size(res
));
373 if (unlikely(!dev
->base
)) {
378 dev
->dev
= &pdev
->dev
;
379 platform_set_drvdata(pdev
, dev
);
381 dev
->irq
= platform_get_irq(pdev
, 0);
382 if (dev
->irq
< 0 || iic_force_poll
)
386 ret
= request_irq(dev
->irq
, highlander_i2c_irq
, 0,
391 highlander_i2c_irq_enable(dev
);
393 dev_notice(&pdev
->dev
, "no IRQ, using polling mode\n");
394 highlander_i2c_irq_disable(dev
);
397 dev
->last_read_time
= jiffies
; /* initial read jiffies */
399 highlander_i2c_setup(dev
);
401 adap
= &dev
->adapter
;
402 i2c_set_adapdata(adap
, dev
);
403 adap
->owner
= THIS_MODULE
;
404 adap
->class = I2C_CLASS_HWMON
;
405 strscpy(adap
->name
, "HL FPGA I2C adapter", sizeof(adap
->name
));
406 adap
->algo
= &highlander_i2c_algo
;
407 adap
->dev
.parent
= &pdev
->dev
;
413 ret
= highlander_i2c_reset(dev
);
415 dev_err(&pdev
->dev
, "controller didn't come up\n");
419 ret
= i2c_add_numbered_adapter(adap
);
421 dev_err(&pdev
->dev
, "failure adding adapter\n");
429 free_irq(dev
->irq
, dev
);
438 static void highlander_i2c_remove(struct platform_device
*pdev
)
440 struct highlander_i2c_dev
*dev
= platform_get_drvdata(pdev
);
442 i2c_del_adapter(&dev
->adapter
);
445 free_irq(dev
->irq
, dev
);
451 static struct platform_driver highlander_i2c_driver
= {
453 .name
= "i2c-highlander",
456 .probe
= highlander_i2c_probe
,
457 .remove_new
= highlander_i2c_remove
,
460 module_platform_driver(highlander_i2c_driver
);
462 MODULE_AUTHOR("Paul Mundt");
463 MODULE_DESCRIPTION("Renesas Highlander FPGA I2C/SMBus adapter");
464 MODULE_LICENSE("GPL v2");
466 module_param(iic_force_poll
, bool, 0);
467 module_param(iic_force_normal
, bool, 0);
468 module_param(iic_timeout
, int, 0);
469 module_param(iic_read_delay
, int, 0);
471 MODULE_PARM_DESC(iic_force_poll
, "Force polling mode");
472 MODULE_PARM_DESC(iic_force_normal
,
473 "Force normal mode (100 kHz), default is fast mode (400 kHz)");
474 MODULE_PARM_DESC(iic_timeout
, "Set timeout value in msecs (default 1000 ms)");
475 MODULE_PARM_DESC(iic_read_delay
,
476 "Delay between data read cycles (default 0 ms)");