drm/panthor: Don't add write fences to the shared BOs
[drm/drm-misc.git] / arch / mips / include / asm / fpu.h
blobbc5ac9887d097646dd8d34ada5810091c073e269
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Copyright (C) 2002 MontaVista Software Inc.
4 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
5 */
6 #ifndef _ASM_FPU_H
7 #define _ASM_FPU_H
9 #include <linux/sched.h>
10 #include <linux/sched/task_stack.h>
11 #include <linux/ptrace.h>
12 #include <linux/thread_info.h>
13 #include <linux/bitops.h>
15 #include <asm/mipsregs.h>
16 #include <asm/cpu.h>
17 #include <asm/cpu-features.h>
18 #include <asm/fpu_emulator.h>
19 #include <asm/hazards.h>
20 #include <asm/ptrace.h>
21 #include <asm/processor.h>
22 #include <asm/current.h>
23 #include <asm/msa.h>
25 #ifdef CONFIG_MIPS_MT_FPAFF
26 #include <asm/mips_mt.h>
27 #endif
30 * This enum specifies a mode in which we want the FPU to operate, for cores
31 * which implement the Status.FR bit. Note that the bottom bit of the value
32 * purposefully matches the desired value of the Status.FR bit.
34 enum fpu_mode {
35 FPU_32BIT = 0, /* FR = 0 */
36 FPU_64BIT, /* FR = 1, FRE = 0 */
37 FPU_AS_IS,
38 FPU_HYBRID, /* FR = 1, FRE = 1 */
40 #define FPU_FR_MASK 0x1
43 #ifdef CONFIG_MIPS_FP_SUPPORT
45 extern void _save_fp(struct task_struct *);
46 extern void _restore_fp(struct task_struct *);
48 #define __disable_fpu() \
49 do { \
50 clear_c0_status(ST0_CU1); \
51 disable_fpu_hazard(); \
52 } while (0)
54 static inline int __enable_fpu(enum fpu_mode mode)
56 int fr;
58 switch (mode) {
59 case FPU_AS_IS:
60 /* just enable the FPU in its current mode */
61 set_c0_status(ST0_CU1);
62 enable_fpu_hazard();
63 return 0;
65 case FPU_HYBRID:
66 if (!cpu_has_fre)
67 return SIGFPE;
69 /* set FRE */
70 set_c0_config5(MIPS_CONF5_FRE);
71 goto fr_common;
73 case FPU_64BIT:
74 #if !(defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5) || \
75 defined(CONFIG_CPU_MIPSR6) || defined(CONFIG_64BIT))
76 /* we only have a 32-bit FPU */
77 return SIGFPE;
78 #endif
79 /* fallthrough */
80 case FPU_32BIT:
81 if (cpu_has_fre) {
82 /* clear FRE */
83 clear_c0_config5(MIPS_CONF5_FRE);
85 fr_common:
86 /* set CU1 & change FR appropriately */
87 fr = (int)mode & FPU_FR_MASK;
88 change_c0_status(ST0_CU1 | ST0_FR, ST0_CU1 | (fr ? ST0_FR : 0));
89 enable_fpu_hazard();
91 /* check FR has the desired value */
92 if (!!(read_c0_status() & ST0_FR) == !!fr)
93 return 0;
95 /* unsupported FR value */
96 __disable_fpu();
97 return SIGFPE;
99 default:
100 BUG();
103 return SIGFPE;
106 #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
108 static inline int __is_fpu_owner(void)
110 return test_thread_flag(TIF_USEDFPU);
113 static inline int is_fpu_owner(void)
115 return cpu_has_fpu && __is_fpu_owner();
118 static inline int __own_fpu(void)
120 enum fpu_mode mode;
121 int ret;
123 if (test_thread_flag(TIF_HYBRID_FPREGS))
124 mode = FPU_HYBRID;
125 else
126 mode = !test_thread_flag(TIF_32BIT_FPREGS);
128 ret = __enable_fpu(mode);
129 if (ret)
130 return ret;
132 if (current->thread.fpu.fcr31 & FPU_CSR_NAN2008) {
133 if (!cpu_has_nan_2008) {
134 ret = SIGFPE;
135 goto failed;
137 } else {
138 if (!cpu_has_nan_legacy) {
139 ret = SIGFPE;
140 goto failed;
144 KSTK_STATUS(current) |= ST0_CU1;
145 if (mode == FPU_64BIT || mode == FPU_HYBRID)
146 KSTK_STATUS(current) |= ST0_FR;
147 else /* mode == FPU_32BIT */
148 KSTK_STATUS(current) &= ~ST0_FR;
150 set_thread_flag(TIF_USEDFPU);
151 return 0;
152 failed:
153 __disable_fpu();
154 return ret;
157 static inline int own_fpu_inatomic(int restore)
159 int ret = 0;
161 if (cpu_has_fpu && !__is_fpu_owner()) {
162 ret = __own_fpu();
163 if (restore && !ret)
164 _restore_fp(current);
166 return ret;
169 static inline int own_fpu(int restore)
171 int ret;
173 preempt_disable();
174 ret = own_fpu_inatomic(restore);
175 preempt_enable();
176 return ret;
179 static inline void lose_fpu_inatomic(int save, struct task_struct *tsk)
181 if (is_msa_enabled()) {
182 if (save) {
183 save_msa(tsk);
184 tsk->thread.fpu.fcr31 =
185 read_32bit_cp1_register(CP1_STATUS);
187 disable_msa();
188 clear_tsk_thread_flag(tsk, TIF_USEDMSA);
189 __disable_fpu();
190 } else if (is_fpu_owner()) {
191 if (save)
192 _save_fp(tsk);
193 __disable_fpu();
194 } else {
195 /* FPU should not have been left enabled with no owner */
196 WARN(read_c0_status() & ST0_CU1,
197 "Orphaned FPU left enabled");
199 KSTK_STATUS(tsk) &= ~ST0_CU1;
200 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
203 static inline void lose_fpu(int save)
205 preempt_disable();
206 lose_fpu_inatomic(save, current);
207 preempt_enable();
211 * init_fp_ctx() - Initialize task FP context
212 * @target: The task whose FP context should be initialized.
214 * Initializes the FP context of the target task to sane default values if that
215 * target task does not already have valid FP context. Once the context has
216 * been initialized, the task will be marked as having used FP & thus having
217 * valid FP context.
219 * Returns: true if context is initialized, else false.
221 static inline bool init_fp_ctx(struct task_struct *target)
223 /* If FP has been used then the target already has context */
224 if (tsk_used_math(target))
225 return false;
227 /* Begin with data registers set to all 1s... */
228 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
230 /* FCSR has been preset by `mips_set_personality_nan'. */
233 * Record that the target has "used" math, such that the context
234 * just initialised, and any modifications made by the caller,
235 * aren't discarded.
237 set_stopped_child_used_math(target);
239 return true;
242 static inline void save_fp(struct task_struct *tsk)
244 if (cpu_has_fpu)
245 _save_fp(tsk);
248 static inline void restore_fp(struct task_struct *tsk)
250 if (cpu_has_fpu)
251 _restore_fp(tsk);
254 static inline union fpureg *get_fpu_regs(struct task_struct *tsk)
256 if (tsk == current) {
257 preempt_disable();
258 if (is_fpu_owner())
259 _save_fp(current);
260 preempt_enable();
263 return tsk->thread.fpu.fpr;
266 #else /* !CONFIG_MIPS_FP_SUPPORT */
269 * When FP support is disabled we provide only a minimal set of stub functions
270 * to avoid callers needing to care too much about CONFIG_MIPS_FP_SUPPORT.
273 static inline int __enable_fpu(enum fpu_mode mode)
275 return SIGILL;
278 static inline void __disable_fpu(void)
280 /* no-op */
284 static inline int is_fpu_owner(void)
286 return 0;
289 static inline void clear_fpu_owner(void)
291 /* no-op */
294 static inline int own_fpu_inatomic(int restore)
296 return SIGILL;
299 static inline int own_fpu(int restore)
301 return SIGILL;
304 static inline void lose_fpu_inatomic(int save, struct task_struct *tsk)
306 /* no-op */
309 static inline void lose_fpu(int save)
311 /* no-op */
314 static inline bool init_fp_ctx(struct task_struct *target)
316 return false;
320 * The following functions should only be called in paths where we know that FP
321 * support is enabled, typically a path where own_fpu() or __enable_fpu() have
322 * returned successfully. When CONFIG_MIPS_FP_SUPPORT=n it is known at compile
323 * time that this should never happen, so calls to these functions should be
324 * optimized away & never actually be emitted.
327 extern void save_fp(struct task_struct *tsk)
328 __compiletime_error("save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
330 extern void _save_fp(struct task_struct *)
331 __compiletime_error("_save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
333 extern void restore_fp(struct task_struct *tsk)
334 __compiletime_error("restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
336 extern void _restore_fp(struct task_struct *)
337 __compiletime_error("_restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
339 extern union fpureg *get_fpu_regs(struct task_struct *tsk)
340 __compiletime_error("get_fpu_regs() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
342 #endif /* !CONFIG_MIPS_FP_SUPPORT */
343 #endif /* _ASM_FPU_H */