drm/panthor: Don't add write fences to the shared BOs
[drm/drm-misc.git] / arch / mips / include / asm / pci.h
blobd993df6302dcf432e1c989efa334c1f392616c79
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 */
6 #ifndef _ASM_PCI_H
7 #define _ASM_PCI_H
9 #include <linux/mm.h>
11 #ifdef __KERNEL__
14 * This file essentially defines the interface between board
15 * specific PCI code and MIPS common PCI code. Should potentially put
16 * into include/asm/pci.h file.
19 #include <linux/ioport.h>
20 #include <linux/list.h>
21 #include <linux/of.h>
23 #ifdef CONFIG_PCI_DRIVERS_LEGACY
26 * Each PCI channel is a top-level PCI bus seem by CPU. A machine with
27 * multiple PCI channels may have multiple PCI host controllers or a
28 * single controller supporting multiple channels.
30 struct pci_controller {
31 struct list_head list;
32 struct pci_bus *bus;
33 struct device_node *of_node;
35 struct pci_ops *pci_ops;
36 struct resource *mem_resource;
37 unsigned long mem_offset;
38 struct resource *io_resource;
39 unsigned long io_offset;
40 unsigned long io_map_base;
42 #ifndef CONFIG_PCI_DOMAINS_GENERIC
43 unsigned int index;
44 /* For compatibility with current (as of July 2003) pciutils
45 and XFree86. Eventually will be removed. */
46 unsigned int need_domain_info;
47 #endif
49 /* Optional access methods for reading/writing the bus number
50 of the PCI controller */
51 int (*get_busno)(void);
52 void (*set_busno)(int busno);
56 * Used by boards to register their PCI busses before the actual scanning.
58 extern void register_pci_controller(struct pci_controller *hose);
61 * board supplied pci irq fixup routine
63 extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
65 /* Do platform specific device initialization at pci_enable_device() time */
66 extern int pcibios_plat_dev_init(struct pci_dev *dev);
68 extern char * (*pcibios_plat_setup)(char *str);
70 #ifdef CONFIG_OF
71 /* this function parses memory ranges from a device node */
72 extern void pci_load_of_ranges(struct pci_controller *hose,
73 struct device_node *node);
74 #else
75 static inline void pci_load_of_ranges(struct pci_controller *hose,
76 struct device_node *node) {}
77 #endif
79 #ifdef CONFIG_PCI_DOMAINS_GENERIC
80 static inline void set_pci_need_domain_info(struct pci_controller *hose,
81 int need_domain_info)
83 /* nothing to do */
85 #elif defined(CONFIG_PCI_DOMAINS)
86 static inline void set_pci_need_domain_info(struct pci_controller *hose,
87 int need_domain_info)
89 hose->need_domain_info = need_domain_info;
91 #endif /* CONFIG_PCI_DOMAINS */
93 #endif
95 /* Can be used to override the logic in pci_scan_bus for skipping
96 already-configured bus numbers - to be used for buggy BIOSes
97 or architectures with incomplete PCI setup by the loader */
98 static inline unsigned int pcibios_assign_all_busses(void)
100 return 1;
103 extern unsigned long PCIBIOS_MIN_IO;
104 extern unsigned long PCIBIOS_MIN_MEM;
106 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
108 #define HAVE_PCI_MMAP
109 #define ARCH_GENERIC_PCI_MMAP_RESOURCE
112 * Dynamic DMA mapping stuff.
113 * MIPS has everything mapped statically.
116 #include <linux/types.h>
117 #include <linux/slab.h>
118 #include <linux/scatterlist.h>
119 #include <linux/string.h>
120 #include <asm/io.h>
122 #ifdef CONFIG_PCI_DOMAINS_GENERIC
123 static inline int pci_proc_domain(struct pci_bus *bus)
125 return pci_domain_nr(bus);
127 #elif defined(CONFIG_PCI_DOMAINS)
128 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
130 static inline int pci_proc_domain(struct pci_bus *bus)
132 struct pci_controller *hose = bus->sysdata;
133 return hose->need_domain_info;
135 #endif /* CONFIG_PCI_DOMAINS */
137 #endif /* __KERNEL__ */
139 /* Do platform specific device initialization at pci_enable_device() time */
140 extern int pcibios_plat_dev_init(struct pci_dev *dev);
142 #endif /* _ASM_PCI_H */