1 // SPDX-License-Identifier: GPL-2.0
3 * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
4 * found on INDY and Indigo2 workstations.
6 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
7 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
8 * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
10 * - Interrupt handling fixes
11 * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
13 #include <linux/types.h>
14 #include <linux/init.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/interrupt.h>
17 #include <linux/ftrace.h>
19 #include <asm/irq_cpu.h>
20 #include <asm/sgi/hpc3.h>
21 #include <asm/sgi/ip22.h>
23 /* So far nothing hangs here */
26 struct sgint_regs
*sgint
;
28 static char lc0msk_to_irqnr
[256];
29 static char lc1msk_to_irqnr
[256];
30 static char lc2msk_to_irqnr
[256];
31 static char lc3msk_to_irqnr
[256];
33 extern int ip22_eisa_init(void);
35 static void enable_local0_irq(struct irq_data
*d
)
37 /* don't allow mappable interrupt to be enabled from setup_irq,
38 * we have our own way to do so */
39 if (d
->irq
!= SGI_MAP_0_IRQ
)
40 sgint
->imask0
|= (1 << (d
->irq
- SGINT_LOCAL0
));
43 static void disable_local0_irq(struct irq_data
*d
)
45 sgint
->imask0
&= ~(1 << (d
->irq
- SGINT_LOCAL0
));
48 static struct irq_chip ip22_local0_irq_type
= {
49 .name
= "IP22 local 0",
50 .irq_mask
= disable_local0_irq
,
51 .irq_unmask
= enable_local0_irq
,
54 static void enable_local1_irq(struct irq_data
*d
)
56 /* don't allow mappable interrupt to be enabled from setup_irq,
57 * we have our own way to do so */
58 if (d
->irq
!= SGI_MAP_1_IRQ
)
59 sgint
->imask1
|= (1 << (d
->irq
- SGINT_LOCAL1
));
62 static void disable_local1_irq(struct irq_data
*d
)
64 sgint
->imask1
&= ~(1 << (d
->irq
- SGINT_LOCAL1
));
67 static struct irq_chip ip22_local1_irq_type
= {
68 .name
= "IP22 local 1",
69 .irq_mask
= disable_local1_irq
,
70 .irq_unmask
= enable_local1_irq
,
73 static void enable_local2_irq(struct irq_data
*d
)
75 sgint
->imask0
|= (1 << (SGI_MAP_0_IRQ
- SGINT_LOCAL0
));
76 sgint
->cmeimask0
|= (1 << (d
->irq
- SGINT_LOCAL2
));
79 static void disable_local2_irq(struct irq_data
*d
)
81 sgint
->cmeimask0
&= ~(1 << (d
->irq
- SGINT_LOCAL2
));
82 if (!sgint
->cmeimask0
)
83 sgint
->imask0
&= ~(1 << (SGI_MAP_0_IRQ
- SGINT_LOCAL0
));
86 static struct irq_chip ip22_local2_irq_type
= {
87 .name
= "IP22 local 2",
88 .irq_mask
= disable_local2_irq
,
89 .irq_unmask
= enable_local2_irq
,
92 static void enable_local3_irq(struct irq_data
*d
)
94 sgint
->imask1
|= (1 << (SGI_MAP_1_IRQ
- SGINT_LOCAL1
));
95 sgint
->cmeimask1
|= (1 << (d
->irq
- SGINT_LOCAL3
));
98 static void disable_local3_irq(struct irq_data
*d
)
100 sgint
->cmeimask1
&= ~(1 << (d
->irq
- SGINT_LOCAL3
));
101 if (!sgint
->cmeimask1
)
102 sgint
->imask1
&= ~(1 << (SGI_MAP_1_IRQ
- SGINT_LOCAL1
));
105 static struct irq_chip ip22_local3_irq_type
= {
106 .name
= "IP22 local 3",
107 .irq_mask
= disable_local3_irq
,
108 .irq_unmask
= enable_local3_irq
,
111 static void indy_local0_irqdispatch(void)
113 u8 mask
= sgint
->istat0
& sgint
->imask0
;
117 if (mask
& SGINT_ISTAT0_LIO2
) {
118 mask2
= sgint
->vmeistat
& sgint
->cmeimask0
;
119 irq
= lc2msk_to_irqnr
[mask2
];
121 irq
= lc0msk_to_irqnr
[mask
];
124 * workaround for INT2 bug; if irq == 0, INT2 has seen a fifo full
125 * irq, but failed to latch it into status register
130 do_IRQ(SGINT_LOCAL0
+ 0);
133 static void indy_local1_irqdispatch(void)
135 u8 mask
= sgint
->istat1
& sgint
->imask1
;
139 if (mask
& SGINT_ISTAT1_LIO3
) {
140 mask2
= sgint
->vmeistat
& sgint
->cmeimask1
;
141 irq
= lc3msk_to_irqnr
[mask2
];
143 irq
= lc1msk_to_irqnr
[mask
];
145 /* if irq == 0, then the interrupt has already been cleared */
150 extern void ip22_be_interrupt(int irq
);
152 static void __irq_entry
indy_buserror_irq(void)
154 int irq
= SGI_BUSERR_IRQ
;
157 kstat_incr_irq_this_cpu(irq
);
158 ip22_be_interrupt(irq
);
163 #define SGI_INTERRUPTS SGINT_END
165 #define SGI_INTERRUPTS SGINT_LOCAL3
169 * IRQs on the INDY look basically (barring software IRQs which we don't use
174 * 0 Software (ignored)
175 * 1 Software (ignored)
176 * 2 Local IRQ level zero
177 * 3 Local IRQ level one
181 * 7 R4k timer (what we use)
183 * We handle the IRQ according to _our_ priority which is:
185 * Highest ---- R4k Timer
190 * Lowest ---- 8254 Timer one
192 * then we just return, if multiple IRQs are pending then we will just take
193 * another exception, big deal.
196 asmlinkage
void plat_irq_dispatch(void)
198 unsigned int pending
= read_c0_status() & read_c0_cause();
201 * First we check for r4k counter/timer IRQ.
203 if (pending
& CAUSEF_IP7
)
204 do_IRQ(SGI_TIMER_IRQ
);
205 else if (pending
& CAUSEF_IP2
)
206 indy_local0_irqdispatch();
207 else if (pending
& CAUSEF_IP3
)
208 indy_local1_irqdispatch();
209 else if (pending
& CAUSEF_IP6
)
211 else if (pending
& (CAUSEF_IP4
| CAUSEF_IP5
))
212 indy_8254timer_irq();
215 void __init
arch_init_irq(void)
219 /* Init local mask --> irq tables. */
220 for (i
= 0; i
< 256; i
++) {
222 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 7;
223 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 7;
224 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 7;
225 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 7;
226 } else if (i
& 0x40) {
227 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 6;
228 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 6;
229 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 6;
230 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 6;
231 } else if (i
& 0x20) {
232 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 5;
233 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 5;
234 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 5;
235 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 5;
236 } else if (i
& 0x10) {
237 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 4;
238 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 4;
239 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 4;
240 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 4;
241 } else if (i
& 0x08) {
242 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 3;
243 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 3;
244 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 3;
245 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 3;
246 } else if (i
& 0x04) {
247 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 2;
248 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 2;
249 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 2;
250 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 2;
251 } else if (i
& 0x02) {
252 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 1;
253 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 1;
254 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 1;
255 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 1;
256 } else if (i
& 0x01) {
257 lc0msk_to_irqnr
[i
] = SGINT_LOCAL0
+ 0;
258 lc1msk_to_irqnr
[i
] = SGINT_LOCAL1
+ 0;
259 lc2msk_to_irqnr
[i
] = SGINT_LOCAL2
+ 0;
260 lc3msk_to_irqnr
[i
] = SGINT_LOCAL3
+ 0;
262 lc0msk_to_irqnr
[i
] = 0;
263 lc1msk_to_irqnr
[i
] = 0;
264 lc2msk_to_irqnr
[i
] = 0;
265 lc3msk_to_irqnr
[i
] = 0;
269 /* Mask out all interrupts. */
272 sgint
->cmeimask0
= 0;
273 sgint
->cmeimask1
= 0;
278 for (i
= SGINT_LOCAL0
; i
< SGI_INTERRUPTS
; i
++) {
279 struct irq_chip
*handler
;
281 if (i
< SGINT_LOCAL1
)
282 handler
= &ip22_local0_irq_type
;
283 else if (i
< SGINT_LOCAL2
)
284 handler
= &ip22_local1_irq_type
;
285 else if (i
< SGINT_LOCAL3
)
286 handler
= &ip22_local2_irq_type
;
288 handler
= &ip22_local3_irq_type
;
290 irq_set_chip_and_handler(i
, handler
, handle_level_irq
);
293 /* vector handler. this register the IRQ as non-sharable */
294 if (request_irq(SGI_LOCAL_0_IRQ
, no_action
, IRQF_NO_THREAD
,
295 "local0 cascade", NULL
))
296 pr_err("Failed to register local0 cascade interrupt\n");
297 if (request_irq(SGI_LOCAL_1_IRQ
, no_action
, IRQF_NO_THREAD
,
298 "local1 cascade", NULL
))
299 pr_err("Failed to register local1 cascade interrupt\n");
300 if (request_irq(SGI_BUSERR_IRQ
, no_action
, IRQF_NO_THREAD
,
302 pr_err("Failed to register Bus Error interrupt\n");
304 /* cascade in cascade. i love Indy ;-) */
305 if (request_irq(SGI_MAP_0_IRQ
, no_action
, IRQF_NO_THREAD
,
306 "mapable0 cascade", NULL
))
307 pr_err("Failed to register mapable0 cascade interrupt\n");
309 if (request_irq(SGI_MAP_1_IRQ
, no_action
, IRQF_NO_THREAD
,
310 "mapable1 cascade", NULL
))
311 pr_err("Failed to register mapable1 cascade interrupt\n");
315 if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */