1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
4 * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
7 #include <linux/kernel.h>
8 #include <linux/errno.h>
9 #include <linux/mutex.h>
11 #include <linux/interrupt.h>
12 #include <linux/clocksource.h>
13 #include <linux/clockchips.h>
15 #include <asm/oplib.h>
16 #include <asm/timer.h>
19 #include <asm/leon_amba.h>
20 #include <asm/traps.h>
21 #include <asm/cacheflush.h>
23 #include <asm/setup.h>
29 struct leon3_irqctrl_regs_map
*leon3_irqctrl_regs
; /* interrupt controller base address */
30 struct leon3_gptimer_regs_map
*leon3_gptimer_regs
; /* timer controller base address */
32 int leondebug_irq_disable
;
33 int leon_debug_irqout
;
34 static volatile u32 dummy_master_l10_counter
;
35 unsigned long amba_system_id
;
36 static DEFINE_SPINLOCK(leon_irq_lock
);
38 static unsigned long leon3_gptimer_idx
; /* Timer Index (0..6) within Timer Core */
39 static unsigned long leon3_gptimer_ackmask
; /* For clearing pending bit */
40 unsigned long leon3_gptimer_irq
; /* interrupt controller irq number */
41 unsigned int sparc_leon_eirq
;
42 #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
43 #define LEON_IACK (&leon3_irqctrl_regs->iclear)
44 #define LEON_DO_ACK_HW 1
46 /* Return the last ACKed IRQ by the Extended IRQ controller. It has already
47 * been (automatically) ACKed when the CPU takes the trap.
49 static inline unsigned int leon_eirq_get(int cpu
)
51 return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs
->intid
[cpu
]) & 0x1f;
54 /* Handle one or multiple IRQs from the extended interrupt controller */
55 static void leon_handle_ext_irq(struct irq_desc
*desc
)
59 int cpu
= sparc_leon3_cpuid();
61 eirq
= leon_eirq_get(cpu
);
63 if ((eirq
& 0x10) && p
&& p
->irq
) /* bit4 tells if IRQ happened */
64 generic_handle_irq(p
->irq
);
67 /* The extended IRQ controller has been found, this function registers it */
68 static void leon_eirq_setup(unsigned int eirq
)
70 unsigned long mask
, oldmask
;
73 if (eirq
< 1 || eirq
> 0xf) {
74 printk(KERN_ERR
"LEON EXT IRQ NUMBER BAD: %d\n", eirq
);
78 veirq
= leon_build_device_irq(eirq
, leon_handle_ext_irq
, "extirq", 0);
81 * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
82 * controller have a mask-bit of their own, so this is safe.
86 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id
));
87 LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id
), (oldmask
| mask
));
88 sparc_leon_eirq
= eirq
;
91 unsigned long leon_get_irqmask(unsigned int irq
)
95 if (!irq
|| ((irq
> 0xf) && !sparc_leon_eirq
)
96 || ((irq
> 0x1f) && sparc_leon_eirq
)) {
98 "leon_get_irqmask: false irq number: %d\n", irq
);
101 mask
= LEON_HARD_INT(irq
);
107 static int irq_choose_cpu(const struct cpumask
*affinity
)
109 unsigned int cpu
= cpumask_first_and(affinity
, cpu_online_mask
);
111 if (cpumask_subset(cpu_online_mask
, affinity
) || cpu
>= nr_cpu_ids
)
117 #define irq_choose_cpu(affinity) boot_cpu_id
120 static int leon_set_affinity(struct irq_data
*data
, const struct cpumask
*dest
,
123 unsigned long mask
, oldmask
, flags
;
126 mask
= (unsigned long)data
->chip_data
;
127 oldcpu
= irq_choose_cpu(irq_data_get_affinity_mask(data
));
128 newcpu
= irq_choose_cpu(dest
);
130 if (oldcpu
== newcpu
)
133 /* unmask on old CPU first before enabling on the selected CPU */
134 spin_lock_irqsave(&leon_irq_lock
, flags
);
135 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu
));
136 LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu
), (oldmask
& ~mask
));
137 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu
));
138 LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu
), (oldmask
| mask
));
139 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
141 return IRQ_SET_MASK_OK
;
144 static void leon_unmask_irq(struct irq_data
*data
)
146 unsigned long mask
, oldmask
, flags
;
149 mask
= (unsigned long)data
->chip_data
;
150 cpu
= irq_choose_cpu(irq_data_get_affinity_mask(data
));
151 spin_lock_irqsave(&leon_irq_lock
, flags
);
152 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu
));
153 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu
), (oldmask
| mask
));
154 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
157 static void leon_mask_irq(struct irq_data
*data
)
159 unsigned long mask
, oldmask
, flags
;
162 mask
= (unsigned long)data
->chip_data
;
163 cpu
= irq_choose_cpu(irq_data_get_affinity_mask(data
));
164 spin_lock_irqsave(&leon_irq_lock
, flags
);
165 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu
));
166 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu
), (oldmask
& ~mask
));
167 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
170 static unsigned int leon_startup_irq(struct irq_data
*data
)
173 leon_unmask_irq(data
);
177 static void leon_shutdown_irq(struct irq_data
*data
)
180 irq_unlink(data
->irq
);
183 /* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */
184 static void leon_eoi_irq(struct irq_data
*data
)
186 unsigned long mask
= (unsigned long)data
->chip_data
;
188 if (mask
& LEON_DO_ACK_HW
)
189 LEON3_BYPASS_STORE_PA(LEON_IACK
, mask
& ~LEON_DO_ACK_HW
);
192 static struct irq_chip leon_irq
= {
194 .irq_startup
= leon_startup_irq
,
195 .irq_shutdown
= leon_shutdown_irq
,
196 .irq_mask
= leon_mask_irq
,
197 .irq_unmask
= leon_unmask_irq
,
198 .irq_eoi
= leon_eoi_irq
,
199 .irq_set_affinity
= leon_set_affinity
,
203 * Build a LEON IRQ for the edge triggered LEON IRQ controller:
204 * Edge (normal) IRQ - handle_simple_irq, ack=DON'T-CARE, never ack
205 * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR
206 * Per-CPU Edge - handle_percpu_irq, ack=0
208 unsigned int leon_build_device_irq(unsigned int real_irq
,
209 irq_flow_handler_t flow_handler
,
210 const char *name
, int do_ack
)
214 struct irq_desc
*desc
;
217 mask
= leon_get_irqmask(real_irq
);
221 irq
= irq_alloc(real_irq
, real_irq
);
226 mask
|= LEON_DO_ACK_HW
;
228 desc
= irq_to_desc(irq
);
229 if (!desc
|| !desc
->handle_irq
|| desc
->handle_irq
== handle_bad_irq
) {
230 irq_set_chip_and_handler_name(irq
, &leon_irq
,
232 irq_set_chip_data(irq
, (void *)mask
);
239 static unsigned int _leon_build_device_irq(struct platform_device
*op
,
240 unsigned int real_irq
)
242 return leon_build_device_irq(real_irq
, handle_simple_irq
, "edge", 0);
245 void leon_update_virq_handling(unsigned int virq
,
246 irq_flow_handler_t flow_handler
,
247 const char *name
, int do_ack
)
249 unsigned long mask
= (unsigned long)irq_get_chip_data(virq
);
251 mask
&= ~LEON_DO_ACK_HW
;
253 mask
|= LEON_DO_ACK_HW
;
255 irq_set_chip_and_handler_name(virq
, &leon_irq
,
257 irq_set_chip_data(virq
, (void *)mask
);
260 static u32
leon_cycles_offset(void)
262 u32 rld
, val
, ctrl
, off
;
264 rld
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].rld
);
265 val
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].val
);
266 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
267 if (LEON3_GPTIMER_CTRL_ISPENDING(ctrl
)) {
268 val
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].val
);
279 /* smp clockevent irq */
280 static irqreturn_t
leon_percpu_timer_ce_interrupt(int irq
, void *unused
)
282 struct clock_event_device
*ce
;
283 int cpu
= smp_processor_id();
285 leon_clear_profile_irq(cpu
);
287 if (cpu
== boot_cpu_id
)
288 timer_interrupt(irq
, NULL
);
290 ce
= &per_cpu(sparc32_clockevent
, cpu
);
293 if (ce
->event_handler
)
294 ce
->event_handler(ce
);
300 #endif /* CONFIG_SMP */
302 void __init
leon_init_timers(void)
305 struct device_node
*rootnp
, *np
, *nnp
;
314 sparc_config
.get_cycles_offset
= leon_cycles_offset
;
315 sparc_config
.cs_period
= 1000000 / HZ
;
316 sparc_config
.features
|= FEAT_L10_CLOCKSOURCE
;
319 sparc_config
.features
|= FEAT_L10_CLOCKEVENT
;
322 leondebug_irq_disable
= 0;
323 leon_debug_irqout
= 0;
324 master_l10_counter
= (u32 __iomem
*)&dummy_master_l10_counter
;
325 dummy_master_l10_counter
= 0;
327 rootnp
= of_find_node_by_path("/ambapp0");
331 /* Find System ID: GRLIB build ID and optional CHIP ID */
332 pp
= of_find_property(rootnp
, "systemid", &len
);
334 amba_system_id
= *(unsigned long *)pp
->value
;
336 /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */
337 np
= of_find_node_by_name(rootnp
, "GAISLER_IRQMP");
339 np
= of_find_node_by_name(rootnp
, "01_00d");
343 pp
= of_find_property(np
, "reg", &len
);
346 leon3_irqctrl_regs
= *(struct leon3_irqctrl_regs_map
**)pp
->value
;
348 /* Find GPTIMER Timer Registers base address otherwise bail out. */
352 np
= of_find_node_by_name(nnp
, "GAISLER_GPTIMER");
354 np
= of_find_node_by_name(nnp
, "01_011");
360 pp
= of_find_property(np
, "ampopts", &len
);
362 ampopts
= *(int *)pp
->value
;
364 /* Skip this instance, resource already
365 * allocated by other OS */
371 /* Select Timer-Instance on Timer Core. Default is zero */
372 leon3_gptimer_idx
= ampopts
& 0x7;
374 pp
= of_find_property(np
, "reg", &len
);
376 leon3_gptimer_regs
= *(struct leon3_gptimer_regs_map
**)
378 pp
= of_find_property(np
, "interrupts", &len
);
380 leon3_gptimer_irq
= *(unsigned int *)pp
->value
;
382 if (!(leon3_gptimer_regs
&& leon3_irqctrl_regs
&& leon3_gptimer_irq
))
385 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
386 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
,
387 ctrl
| LEON3_GPTIMER_CTRL_PENDING
);
388 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
390 if ((ctrl
& LEON3_GPTIMER_CTRL_PENDING
) != 0)
391 leon3_gptimer_ackmask
= ~LEON3_GPTIMER_CTRL_PENDING
;
393 leon3_gptimer_ackmask
= ~0;
395 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].val
, 0);
396 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].rld
,
397 (((1000000 / HZ
) - 1)));
398 LEON3_BYPASS_STORE_PA(
399 &leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
, 0);
402 * The IRQ controller may (if implemented) consist of multiple
403 * IRQ controllers, each mapped on a 4Kb boundary.
404 * Each CPU may be routed to different IRQCTRLs, however
405 * we assume that all CPUs (in SMP system) is routed to the
406 * same IRQ Controller, and for non-SMP only one IRQCTRL is
408 * In AMP systems, Linux must run on CPU0 for the time being.
410 icsel
= LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs
->icsel
[boot_cpu_id
/8]);
411 icsel
= (icsel
>> ((7 - (boot_cpu_id
&0x7)) * 4)) & 0xf;
412 leon3_irqctrl_regs
+= icsel
;
414 /* Mask all IRQs on boot-cpu IRQ controller */
415 LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs
->mask
[boot_cpu_id
], 0);
417 /* Probe extended IRQ controller */
418 eirq
= (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs
->mpstatus
)
421 leon_eirq_setup(eirq
);
428 * In SMP, sun4m adds a IPI handler to IRQ trap handler that
429 * LEON never must take, sun4d and LEON overwrites the branch
432 local_irq_save(flags
);
433 patchme_maybe_smp_msg
[0] = 0x01000000; /* NOP out the branch */
434 local_ops
->cache_all();
435 local_irq_restore(flags
);
439 config
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->config
);
440 if (config
& (1 << LEON3_GPTIMER_SEPIRQ
))
441 leon3_gptimer_irq
+= leon3_gptimer_idx
;
442 else if ((config
& LEON3_GPTIMER_TIMERS
) > 1)
443 pr_warn("GPTIMER uses shared irqs, using other timers of the same core will fail.\n");
446 /* Install per-cpu IRQ handler for broadcasted ticker */
447 irq
= leon_build_device_irq(leon3_gptimer_irq
, handle_percpu_irq
,
449 err
= request_irq(irq
, leon_percpu_timer_ce_interrupt
,
450 IRQF_PERCPU
| IRQF_TIMER
, "timer", NULL
);
452 irq
= _leon_build_device_irq(NULL
, leon3_gptimer_irq
);
453 err
= request_irq(irq
, timer_interrupt
, IRQF_TIMER
, "timer", NULL
);
456 pr_err("Unable to attach timer IRQ%d\n", irq
);
459 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
,
463 LEON3_GPTIMER_IRQEN
);
466 printk(KERN_ERR
"No Timer/irqctrl found\n");
471 static void leon_clear_clock_irq(void)
475 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
476 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
,
477 ctrl
& leon3_gptimer_ackmask
);
480 static void leon_load_profile_irq(int cpu
, unsigned int limit
)
485 void leon_clear_profile_irq(int cpu
)
489 void leon_enable_irq_cpu(unsigned int irq_nr
, unsigned int cpu
)
491 unsigned long mask
, flags
, *addr
;
492 mask
= leon_get_irqmask(irq_nr
);
493 spin_lock_irqsave(&leon_irq_lock
, flags
);
494 addr
= (unsigned long *)LEON_IMASK(cpu
);
495 LEON3_BYPASS_STORE_PA(addr
, (LEON3_BYPASS_LOAD_PA(addr
) | mask
));
496 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
501 void __init
leon_init_IRQ(void)
503 sparc_config
.init_timers
= leon_init_timers
;
504 sparc_config
.build_device_irq
= _leon_build_device_irq
;
505 sparc_config
.clock_rate
= 1000000;
506 sparc_config
.clear_clock_irq
= leon_clear_clock_irq
;
507 sparc_config
.load_profile_irq
= leon_load_profile_irq
;