1 // SPDX-License-Identifier: GPL-2.0
2 /* time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/errno.h>
13 #include <linux/export.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/rtc/m48t59.h>
32 #include <linux/kernel_stat.h>
33 #include <linux/clockchips.h>
34 #include <linux/clocksource.h>
35 #include <linux/platform_device.h>
36 #include <linux/sched/clock.h>
37 #include <linux/ftrace.h>
39 #include <asm/oplib.h>
40 #include <asm/timer.h>
44 #include <asm/starfire.h>
46 #include <asm/sections.h>
47 #include <asm/cpudata.h>
48 #include <linux/uaccess.h>
49 #include <asm/irq_regs.h>
50 #include <asm/cacheflush.h>
55 DEFINE_SPINLOCK(rtc_lock
);
58 unsigned long profile_pc(struct pt_regs
*regs
)
60 unsigned long pc
= instruction_pointer(regs
);
62 if (in_lock_functions(pc
))
63 return regs
->u_regs
[UREG_RETPC
];
66 EXPORT_SYMBOL(profile_pc
);
69 static void tick_disable_protection(void)
71 /* Set things up so user can access tick register for profiling
72 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
73 * read back of %tick after writing it.
79 "1: rd %%tick, %%g2\n"
80 " add %%g2, 6, %%g2\n"
81 " andn %%g2, %0, %%g2\n"
82 " wrpr %%g2, 0, %%tick\n"
89 static void tick_disable_irq(void)
95 "1: wr %0, 0x0, %%tick_cmpr\n"
96 " rd %%tick_cmpr, %%g0"
98 : "r" (TICKCMP_IRQ_BIT
));
101 static void tick_init_tick(void)
103 tick_disable_protection();
107 static unsigned long long tick_get_tick(void)
111 __asm__
__volatile__("rd %%tick, %0\n\t"
115 return ret
& ~TICK_PRIV_BIT
;
118 static int tick_add_compare(unsigned long adj
)
120 unsigned long orig_tick
, new_tick
, new_compare
;
122 __asm__
__volatile__("rd %%tick, %0"
125 orig_tick
&= ~TICKCMP_IRQ_BIT
;
127 /* Workaround for Spitfire Errata (#54 I think??), I discovered
128 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
131 * On Blackbird writes to %tick_cmpr can fail, the
132 * workaround seems to be to execute the wr instruction
133 * at the start of an I-cache line, and perform a dummy
134 * read back from %tick_cmpr right after writing to it. -DaveM
136 __asm__
__volatile__("ba,pt %%xcc, 1f\n\t"
137 " add %1, %2, %0\n\t"
140 "wr %0, 0, %%tick_cmpr\n\t"
141 "rd %%tick_cmpr, %%g0\n\t"
143 : "r" (orig_tick
), "r" (adj
));
145 __asm__
__volatile__("rd %%tick, %0"
147 new_tick
&= ~TICKCMP_IRQ_BIT
;
149 return ((long)(new_tick
- (orig_tick
+adj
))) > 0L;
152 static unsigned long tick_add_tick(unsigned long adj
)
154 unsigned long new_tick
;
156 /* Also need to handle Blackbird bug here too. */
157 __asm__
__volatile__("rd %%tick, %0\n\t"
159 "wrpr %0, 0, %%tick\n\t"
166 /* Searches for cpu clock frequency with given cpuid in OpenBoot tree */
167 static unsigned long cpuid_to_freq(phandle node
, int cpuid
)
169 bool is_cpu_node
= false;
170 unsigned long freq
= 0;
176 if (prom_getproperty(node
, "device_type", type
, sizeof(type
)) != -1)
177 is_cpu_node
= (strcmp(type
, "cpu") == 0);
179 /* try upa-portid then cpuid to get cpuid, see prom_64.c */
180 if (is_cpu_node
&& (prom_getint(node
, "upa-portid") == cpuid
||
181 prom_getint(node
, "cpuid") == cpuid
))
182 freq
= prom_getintdefault(node
, "clock-frequency", 0);
184 freq
= cpuid_to_freq(prom_getchild(node
), cpuid
);
186 freq
= cpuid_to_freq(prom_getsibling(node
), cpuid
);
191 static unsigned long tick_get_frequency(void)
193 return cpuid_to_freq(prom_root_node
, hard_smp_processor_id());
196 static struct sparc64_tick_ops tick_operations __cacheline_aligned
= {
198 .init_tick
= tick_init_tick
,
199 .disable_irq
= tick_disable_irq
,
200 .get_tick
= tick_get_tick
,
201 .add_tick
= tick_add_tick
,
202 .add_compare
= tick_add_compare
,
203 .get_frequency
= tick_get_frequency
,
204 .softint_mask
= 1UL << 0,
207 struct sparc64_tick_ops
*tick_ops __read_mostly
= &tick_operations
;
208 EXPORT_SYMBOL(tick_ops
);
210 static void stick_disable_irq(void)
212 __asm__
__volatile__(
213 "wr %0, 0x0, %%asr25"
215 : "r" (TICKCMP_IRQ_BIT
));
218 static void stick_init_tick(void)
220 /* Writes to the %tick and %stick register are not
221 * allowed on sun4v. The Hypervisor controls that
224 if (tlb_type
!= hypervisor
) {
225 tick_disable_protection();
228 /* Let the user get at STICK too. */
229 __asm__
__volatile__(
230 " rd %%asr24, %%g2\n"
231 " andn %%g2, %0, %%g2\n"
232 " wr %%g2, 0, %%asr24"
234 : "r" (TICK_PRIV_BIT
)
241 static unsigned long long stick_get_tick(void)
245 __asm__
__volatile__("rd %%asr24, %0"
248 return ret
& ~TICK_PRIV_BIT
;
251 static unsigned long stick_add_tick(unsigned long adj
)
253 unsigned long new_tick
;
255 __asm__
__volatile__("rd %%asr24, %0\n\t"
257 "wr %0, 0, %%asr24\n\t"
264 static int stick_add_compare(unsigned long adj
)
266 unsigned long orig_tick
, new_tick
;
268 __asm__
__volatile__("rd %%asr24, %0"
270 orig_tick
&= ~TICKCMP_IRQ_BIT
;
272 __asm__
__volatile__("wr %0, 0, %%asr25"
274 : "r" (orig_tick
+ adj
));
276 __asm__
__volatile__("rd %%asr24, %0"
278 new_tick
&= ~TICKCMP_IRQ_BIT
;
280 return ((long)(new_tick
- (orig_tick
+adj
))) > 0L;
283 static unsigned long stick_get_frequency(void)
285 return prom_getintdefault(prom_root_node
, "stick-frequency", 0);
288 static struct sparc64_tick_ops stick_operations __read_mostly
= {
290 .init_tick
= stick_init_tick
,
291 .disable_irq
= stick_disable_irq
,
292 .get_tick
= stick_get_tick
,
293 .add_tick
= stick_add_tick
,
294 .add_compare
= stick_add_compare
,
295 .get_frequency
= stick_get_frequency
,
296 .softint_mask
= 1UL << 16,
299 /* On Hummingbird the STICK/STICK_CMPR register is implemented
300 * in I/O space. There are two 64-bit registers each, the
301 * first holds the low 32-bits of the value and the second holds
304 * Since STICK is constantly updating, we have to access it carefully.
306 * The sequence we use to read is:
309 * 3) read high again, if it rolled re-read both low and high again.
311 * Writing STICK safely is also tricky:
312 * 1) write low to zero
316 static unsigned long __hbird_read_stick(void)
318 unsigned long ret
, tmp1
, tmp2
, tmp3
;
319 unsigned long addr
= HBIRD_STICK_ADDR
+8;
321 __asm__
__volatile__("ldxa [%1] %5, %2\n"
323 "sub %1, 0x8, %1\n\t"
324 "ldxa [%1] %5, %3\n\t"
325 "add %1, 0x8, %1\n\t"
326 "ldxa [%1] %5, %4\n\t"
328 "bne,a,pn %%xcc, 1b\n\t"
330 "sllx %4, 32, %4\n\t"
332 : "=&r" (ret
), "=&r" (addr
),
333 "=&r" (tmp1
), "=&r" (tmp2
), "=&r" (tmp3
)
334 : "i" (ASI_PHYS_BYPASS_EC_E
), "1" (addr
));
339 static void __hbird_write_stick(unsigned long val
)
341 unsigned long low
= (val
& 0xffffffffUL
);
342 unsigned long high
= (val
>> 32UL);
343 unsigned long addr
= HBIRD_STICK_ADDR
;
345 __asm__
__volatile__("stxa %%g0, [%0] %4\n\t"
346 "add %0, 0x8, %0\n\t"
347 "stxa %3, [%0] %4\n\t"
348 "sub %0, 0x8, %0\n\t"
351 : "0" (addr
), "r" (low
), "r" (high
),
352 "i" (ASI_PHYS_BYPASS_EC_E
));
355 static void __hbird_write_compare(unsigned long val
)
357 unsigned long low
= (val
& 0xffffffffUL
);
358 unsigned long high
= (val
>> 32UL);
359 unsigned long addr
= HBIRD_STICKCMP_ADDR
+ 0x8UL
;
361 __asm__
__volatile__("stxa %3, [%0] %4\n\t"
362 "sub %0, 0x8, %0\n\t"
365 : "0" (addr
), "r" (low
), "r" (high
),
366 "i" (ASI_PHYS_BYPASS_EC_E
));
369 static void hbtick_disable_irq(void)
371 __hbird_write_compare(TICKCMP_IRQ_BIT
);
374 static void hbtick_init_tick(void)
376 tick_disable_protection();
378 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
379 * XXX into actually sending STICK interrupts. I think because
380 * XXX of how we store %tick_cmpr in head.S this somehow resets the
381 * XXX {TICK + STICK} interrupt mux. -DaveM
383 __hbird_write_stick(__hbird_read_stick());
385 hbtick_disable_irq();
388 static unsigned long long hbtick_get_tick(void)
390 return __hbird_read_stick() & ~TICK_PRIV_BIT
;
393 static unsigned long hbtick_add_tick(unsigned long adj
)
397 val
= __hbird_read_stick() + adj
;
398 __hbird_write_stick(val
);
403 static int hbtick_add_compare(unsigned long adj
)
405 unsigned long val
= __hbird_read_stick();
408 val
&= ~TICKCMP_IRQ_BIT
;
410 __hbird_write_compare(val
);
412 val2
= __hbird_read_stick() & ~TICKCMP_IRQ_BIT
;
414 return ((long)(val2
- val
)) > 0L;
417 static unsigned long hbtick_get_frequency(void)
419 return prom_getintdefault(prom_root_node
, "stick-frequency", 0);
422 static struct sparc64_tick_ops hbtick_operations __read_mostly
= {
424 .init_tick
= hbtick_init_tick
,
425 .disable_irq
= hbtick_disable_irq
,
426 .get_tick
= hbtick_get_tick
,
427 .add_tick
= hbtick_add_tick
,
428 .add_compare
= hbtick_add_compare
,
429 .get_frequency
= hbtick_get_frequency
,
430 .softint_mask
= 1UL << 0,
433 unsigned long cmos_regs
;
434 EXPORT_SYMBOL(cmos_regs
);
436 static struct resource rtc_cmos_resource
;
438 static struct platform_device rtc_cmos_device
= {
441 .resource
= &rtc_cmos_resource
,
445 static int rtc_probe(struct platform_device
*op
)
449 printk(KERN_INFO
"%pOF: RTC regs at 0x%llx\n",
450 op
->dev
.of_node
, op
->resource
[0].start
);
452 /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
453 * up a fake resource so that the probe works for all cases.
454 * When the RTC is behind an ISA bus it will have IORESOURCE_IO
455 * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
458 r
= &rtc_cmos_resource
;
459 r
->flags
= IORESOURCE_IO
;
460 r
->name
= op
->resource
[0].name
;
461 r
->start
= op
->resource
[0].start
;
462 r
->end
= op
->resource
[0].end
;
464 cmos_regs
= op
->resource
[0].start
;
465 return platform_device_register(&rtc_cmos_device
);
468 static const struct of_device_id rtc_match
[] = {
471 .compatible
= "m5819",
475 .compatible
= "isa-m5819p",
479 .compatible
= "isa-m5823p",
483 .compatible
= "ds1287",
488 static struct platform_driver rtc_driver
= {
492 .of_match_table
= rtc_match
,
496 static struct platform_device rtc_bq4802_device
= {
497 .name
= "rtc-bq4802",
502 static int bq4802_probe(struct platform_device
*op
)
505 printk(KERN_INFO
"%pOF: BQ4802 regs at 0x%llx\n",
506 op
->dev
.of_node
, op
->resource
[0].start
);
508 rtc_bq4802_device
.resource
= &op
->resource
[0];
509 return platform_device_register(&rtc_bq4802_device
);
512 static const struct of_device_id bq4802_match
[] = {
515 .compatible
= "bq4802",
520 static struct platform_driver bq4802_driver
= {
521 .probe
= bq4802_probe
,
524 .of_match_table
= bq4802_match
,
528 static unsigned char mostek_read_byte(struct device
*dev
, u32 ofs
)
530 struct platform_device
*pdev
= to_platform_device(dev
);
531 void __iomem
*regs
= (void __iomem
*) pdev
->resource
[0].start
;
533 return readb(regs
+ ofs
);
536 static void mostek_write_byte(struct device
*dev
, u32 ofs
, u8 val
)
538 struct platform_device
*pdev
= to_platform_device(dev
);
539 void __iomem
*regs
= (void __iomem
*) pdev
->resource
[0].start
;
541 writeb(val
, regs
+ ofs
);
544 static struct m48t59_plat_data m48t59_data
= {
545 .read_byte
= mostek_read_byte
,
546 .write_byte
= mostek_write_byte
,
549 static struct platform_device m48t59_rtc
= {
550 .name
= "rtc-m48t59",
554 .platform_data
= &m48t59_data
,
558 static int mostek_probe(struct platform_device
*op
)
560 struct device_node
*dp
= op
->dev
.of_node
;
562 /* On an Enterprise system there can be multiple mostek clocks.
563 * We should only match the one that is on the central FHC bus.
565 if (of_node_name_eq(dp
->parent
, "fhc") &&
566 !of_node_name_eq(dp
->parent
->parent
, "central"))
569 printk(KERN_INFO
"%pOF: Mostek regs at 0x%llx\n",
570 dp
, op
->resource
[0].start
);
572 m48t59_rtc
.resource
= &op
->resource
[0];
573 return platform_device_register(&m48t59_rtc
);
576 static const struct of_device_id mostek_match
[] = {
583 static struct platform_driver mostek_driver
= {
584 .probe
= mostek_probe
,
587 .of_match_table
= mostek_match
,
591 static struct platform_device rtc_sun4v_device
= {
596 static struct platform_device rtc_starfire_device
= {
597 .name
= "rtc-starfire",
601 static int __init
clock_init(void)
603 if (this_is_starfire
)
604 return platform_device_register(&rtc_starfire_device
);
606 if (tlb_type
== hypervisor
)
607 return platform_device_register(&rtc_sun4v_device
);
609 (void) platform_driver_register(&rtc_driver
);
610 (void) platform_driver_register(&mostek_driver
);
611 (void) platform_driver_register(&bq4802_driver
);
616 /* Must be after subsys_initcall() so that busses are probed. Must
617 * be before device_initcall() because things like the RTC driver
618 * need to see the clock registers.
620 fs_initcall(clock_init
);
622 /* Return true if this is Hummingbird, aka Ultra-IIe */
623 static bool is_hummingbird(void)
625 unsigned long ver
, manuf
, impl
;
627 __asm__
__volatile__ ("rdpr %%ver, %0"
629 manuf
= ((ver
>> 48) & 0xffff);
630 impl
= ((ver
>> 32) & 0xffff);
632 return (manuf
== 0x17 && impl
== 0x13);
636 unsigned long clock_tick_ref
;
637 unsigned int ref_freq
;
639 static DEFINE_PER_CPU(struct freq_table
, sparc64_freq_table
) = { 0, 0 };
641 unsigned long sparc64_get_clock_tick(unsigned int cpu
)
643 struct freq_table
*ft
= &per_cpu(sparc64_freq_table
, cpu
);
645 if (ft
->clock_tick_ref
)
646 return ft
->clock_tick_ref
;
647 return cpu_data(cpu
).clock_tick
;
649 EXPORT_SYMBOL(sparc64_get_clock_tick
);
651 #ifdef CONFIG_CPU_FREQ
653 static int sparc64_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
656 struct cpufreq_freqs
*freq
= data
;
658 struct freq_table
*ft
;
660 for_each_cpu(cpu
, freq
->policy
->cpus
) {
661 ft
= &per_cpu(sparc64_freq_table
, cpu
);
664 ft
->ref_freq
= freq
->old
;
665 ft
->clock_tick_ref
= cpu_data(cpu
).clock_tick
;
668 if ((val
== CPUFREQ_PRECHANGE
&& freq
->old
< freq
->new) ||
669 (val
== CPUFREQ_POSTCHANGE
&& freq
->old
> freq
->new)) {
670 cpu_data(cpu
).clock_tick
=
671 cpufreq_scale(ft
->clock_tick_ref
, ft
->ref_freq
,
679 static struct notifier_block sparc64_cpufreq_notifier_block
= {
680 .notifier_call
= sparc64_cpufreq_notifier
683 static int __init
register_sparc64_cpufreq_notifier(void)
686 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block
,
687 CPUFREQ_TRANSITION_NOTIFIER
);
691 core_initcall(register_sparc64_cpufreq_notifier
);
693 #endif /* CONFIG_CPU_FREQ */
695 static int sparc64_next_event(unsigned long delta
,
696 struct clock_event_device
*evt
)
698 return tick_operations
.add_compare(delta
) ? -ETIME
: 0;
701 static int sparc64_timer_shutdown(struct clock_event_device
*evt
)
703 tick_operations
.disable_irq();
707 static struct clock_event_device sparc64_clockevent
= {
708 .features
= CLOCK_EVT_FEAT_ONESHOT
,
709 .set_state_shutdown
= sparc64_timer_shutdown
,
710 .set_next_event
= sparc64_next_event
,
715 static DEFINE_PER_CPU(struct clock_event_device
, sparc64_events
);
717 void __irq_entry
timer_interrupt(int irq
, struct pt_regs
*regs
)
719 struct pt_regs
*old_regs
= set_irq_regs(regs
);
720 unsigned long tick_mask
= tick_operations
.softint_mask
;
721 int cpu
= smp_processor_id();
722 struct clock_event_device
*evt
= &per_cpu(sparc64_events
, cpu
);
724 clear_softint(tick_mask
);
728 local_cpu_data().irq0_irqs
++;
729 kstat_incr_irq_this_cpu(0);
731 if (unlikely(!evt
->event_handler
)) {
733 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu
);
735 evt
->event_handler(evt
);
739 set_irq_regs(old_regs
);
742 void setup_sparc64_timer(void)
744 struct clock_event_device
*sevt
;
745 unsigned long pstate
;
747 /* Guarantee that the following sequences execute
750 __asm__
__volatile__("rdpr %%pstate, %0\n\t"
751 "wrpr %0, %1, %%pstate"
755 tick_operations
.init_tick();
757 /* Restore PSTATE_IE. */
758 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
762 sevt
= this_cpu_ptr(&sparc64_events
);
764 memcpy(sevt
, &sparc64_clockevent
, sizeof(*sevt
));
765 sevt
->cpumask
= cpumask_of(smp_processor_id());
767 clockevents_register_device(sevt
);
770 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
772 static struct clocksource clocksource_tick
= {
774 .mask
= CLOCKSOURCE_MASK(64),
775 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
778 static unsigned long tb_ticks_per_usec __read_mostly
;
780 void __delay(unsigned long loops
)
782 unsigned long bclock
= get_tick();
784 while ((get_tick() - bclock
) < loops
)
787 EXPORT_SYMBOL(__delay
);
789 void udelay(unsigned long usecs
)
791 __delay(tb_ticks_per_usec
* usecs
);
793 EXPORT_SYMBOL(udelay
);
795 static u64
clocksource_tick_read(struct clocksource
*cs
)
800 static void __init
get_tick_patch(void)
802 unsigned int *addr
, *instr
, i
;
803 struct get_tick_patch
*p
;
805 if (tlb_type
== spitfire
&& is_hummingbird())
808 for (p
= &__get_tick_patch
; p
< &__get_tick_patch_end
; p
++) {
809 instr
= (tlb_type
== spitfire
) ? p
->tick
: p
->stick
;
810 addr
= (unsigned int *)(unsigned long)p
->addr
;
811 for (i
= 0; i
< GET_TICK_NINSTR
; i
++) {
813 /* ensure that address is modified before flush */
820 static void __init
init_tick_ops(struct sparc64_tick_ops
*ops
)
822 unsigned long freq
, quotient
, tick
;
824 freq
= ops
->get_frequency();
825 quotient
= clocksource_hz2mult(freq
, SPARC64_NSEC_PER_CYC_SHIFT
);
826 tick
= ops
->get_tick();
828 ops
->offset
= (tick
* quotient
) >> SPARC64_NSEC_PER_CYC_SHIFT
;
829 ops
->ticks_per_nsec_quotient
= quotient
;
830 ops
->frequency
= freq
;
831 tick_operations
= *ops
;
835 void __init
time_init_early(void)
837 if (tlb_type
== spitfire
) {
838 if (is_hummingbird()) {
839 init_tick_ops(&hbtick_operations
);
840 clocksource_tick
.archdata
.vclock_mode
= VCLOCK_NONE
;
842 init_tick_ops(&tick_operations
);
843 clocksource_tick
.archdata
.vclock_mode
= VCLOCK_TICK
;
846 init_tick_ops(&stick_operations
);
847 clocksource_tick
.archdata
.vclock_mode
= VCLOCK_STICK
;
851 void __init
time_init(void)
855 freq
= tick_operations
.frequency
;
856 tb_ticks_per_usec
= freq
/ USEC_PER_SEC
;
858 clocksource_tick
.name
= tick_operations
.name
;
859 clocksource_tick
.read
= clocksource_tick_read
;
861 clocksource_register_hz(&clocksource_tick
, freq
);
862 printk("clocksource: mult[%x] shift[%d]\n",
863 clocksource_tick
.mult
, clocksource_tick
.shift
);
865 sparc64_clockevent
.name
= tick_operations
.name
;
866 clockevents_calc_mult_shift(&sparc64_clockevent
, freq
, 4);
868 sparc64_clockevent
.max_delta_ns
=
869 clockevent_delta2ns(0x7fffffffffffffffUL
, &sparc64_clockevent
);
870 sparc64_clockevent
.max_delta_ticks
= 0x7fffffffffffffffUL
;
871 sparc64_clockevent
.min_delta_ns
=
872 clockevent_delta2ns(0xF, &sparc64_clockevent
);
873 sparc64_clockevent
.min_delta_ticks
= 0xF;
875 printk("clockevent: mult[%x] shift[%d]\n",
876 sparc64_clockevent
.mult
, sparc64_clockevent
.shift
);
878 setup_sparc64_timer();
881 unsigned long long sched_clock(void)
883 unsigned long quotient
= tick_operations
.ticks_per_nsec_quotient
;
884 unsigned long offset
= tick_operations
.offset
;
886 /* Use barrier so the compiler emits the loads first and overlaps load
887 * latency with reading tick, because reading %tick/%stick is a
888 * post-sync instruction that will flush and restart subsequent
889 * instructions after it commits.
893 return ((get_tick() * quotient
) >> SPARC64_NSEC_PER_CYC_SHIFT
) - offset
;
896 int read_current_timer(unsigned long *timer_val
)
898 *timer_val
= get_tick();