arch/sparc/kernel/uprobes.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * User-space Probes (UProbes) for sparc
   4  *
   5  * Copyright (C) 2013 Oracle Inc.
   6  *
   7  * Authors:
   8  *      Jose E. Marchesi <jose.marchesi@oracle.com>
   9  *      Eric Saint Etienne <eric.saint.etienne@oracle.com>
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/highmem.h>
  14 #include <linux/uprobes.h>
  15 #include <linux/uaccess.h>
  16 #include <linux/sched.h> /* For struct task_struct */
  17 #include <linux/kdebug.h>
  18
  19 #include <asm/cacheflush.h>
  20
  21 #include "kernel.h"
  22
  23 /* Compute the address of the breakpoint instruction and return it.
  24  *
  25  * Note that uprobe_get_swbp_addr is defined as a weak symbol in
  26  * kernel/events/uprobe.c.
  27  */
  28 unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
  29 {
  30         return instruction_pointer(regs);
  31 }
  32
  33 static void copy_to_page(struct page *page, unsigned long vaddr,
  34                          const void *src, int len)
  35 {
  36         void *kaddr = kmap_atomic(page);
  37
  38         memcpy(kaddr + (vaddr & ~PAGE_MASK), src, len);
  39         kunmap_atomic(kaddr);
  40 }
  41
  42 /* Fill in the xol area with the probed instruction followed by the
  43  * single-step trap.  Some fixups in the copied instruction are
  44  * performed at this point.
  45  *
  46  * Note that uprobe_xol_copy is defined as a weak symbol in
  47  * kernel/events/uprobe.c.
  48  */
  49 void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
  50                            void *src, unsigned long len)
  51 {
  52         const u32 stp_insn = UPROBE_STP_INSN;
  53         u32 insn = *(u32 *) src;
  54
  55         /* Branches annulling their delay slot must be fixed to not do
  56          * so.  Clearing the annul bit on these instructions we can be
  57          * sure the single-step breakpoint in the XOL slot will be
  58          * executed.
  59          */
  60
  61         u32 op = (insn >> 30) & 0x3;
  62         u32 op2 = (insn >> 22) & 0x7;
  63
  64         if (op == 0 &&
  65             (op2 == 1 || op2 == 2 || op2 == 3 || op2 == 5 || op2 == 6) &&
  66             (insn & ANNUL_BIT) == ANNUL_BIT)
  67                 insn &= ~ANNUL_BIT;
  68
  69         copy_to_page(page, vaddr, &insn, len);
  70         copy_to_page(page, vaddr+len, &stp_insn, 4);
  71 }
  72
  73
  74 /* Instruction analysis/validity.
  75  *
  76  * This function returns 0 on success or a -ve number on error.
  77  */
  78 int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
  79                              struct mm_struct *mm, unsigned long addr)
  80 {
  81         /* Any unsupported instruction?  Then return -EINVAL  */
  82         return 0;
  83 }
  84
  85 /* If INSN is a relative control transfer instruction, return the
  86  * corrected branch destination value.
  87  *
  88  * Note that regs->tpc and regs->tnpc still hold the values of the
  89  * program counters at the time of the single-step trap due to the
  90  * execution of the UPROBE_STP_INSN at utask->xol_vaddr + 4.
  91  *
  92  */
  93 static unsigned long relbranch_fixup(u32 insn, struct uprobe_task *utask,
  94                                      struct pt_regs *regs)
  95 {
  96         /* Branch not taken, no mods necessary.  */
  97         if (regs->tnpc == regs->tpc + 0x4UL)
  98                 return utask->autask.saved_tnpc + 0x4UL;
  99
 100         /* The three cases are call, branch w/prediction,
 101          * and traditional branch.
 102          */
 103         if ((insn & 0xc0000000) == 0x40000000 ||
 104             (insn & 0xc1c00000) == 0x00400000 ||
 105             (insn & 0xc1c00000) == 0x00800000) {
 106                 unsigned long real_pc = (unsigned long) utask->vaddr;
 107                 unsigned long ixol_addr = utask->xol_vaddr;
 108
 109                 /* The instruction did all the work for us
 110                  * already, just apply the offset to the correct
 111                  * instruction location.
 112                  */
 113                 return (real_pc + (regs->tnpc - ixol_addr));
 114         }
 115
 116         /* It is jmpl or some other absolute PC modification instruction,
 117          * leave NPC as-is.
 118          */
 119         return regs->tnpc;
 120 }
 121
 122 /* If INSN is an instruction which writes its PC location
 123  * into a destination register, fix that up.
 124  */
 125 static int retpc_fixup(struct pt_regs *regs, u32 insn,
 126                        unsigned long real_pc)
 127 {
 128         unsigned long *slot = NULL;
 129         int rc = 0;
 130
 131         /* Simplest case is 'call', which always uses %o7 */
 132         if ((insn & 0xc0000000) == 0x40000000)
 133                 slot = &regs->u_regs[UREG_I7];
 134
 135         /* 'jmpl' encodes the register inside of the opcode */
 136         if ((insn & 0xc1f80000) == 0x81c00000) {
 137                 unsigned long rd = ((insn >> 25) & 0x1f);
 138
 139                 if (rd <= 15) {
 140                         slot = &regs->u_regs[rd];
 141                 } else {
 142                         unsigned long fp = regs->u_regs[UREG_FP];
 143                         /* Hard case, it goes onto the stack. */
 144                         flushw_all();
 145
 146                         rd -= 16;
 147                         if (test_thread_64bit_stack(fp)) {
 148                                 unsigned long __user *uslot =
 149                         (unsigned long __user *) (fp + STACK_BIAS) + rd;
 150                                 rc = __put_user(real_pc, uslot);
 151                         } else {
 152                                 unsigned int __user *uslot = (unsigned int
 153                                                 __user *) fp + rd;
 154                                 rc = __put_user((u32) real_pc, uslot);
 155                         }
 156                 }
 157         }
 158         if (slot != NULL)
 159                 *slot = real_pc;
 160         return rc;
 161 }
 162
 163 /* Single-stepping can be avoided for certain instructions: NOPs and
 164  * instructions that can be emulated.  This function determines
 165  * whether the instruction where the uprobe is installed falls in one
 166  * of these cases and emulates it.
 167  *
 168  * This function returns true if the single-stepping can be skipped,
 169  * false otherwise.
 170  */
 171 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
 172 {
 173         /* We currently only emulate NOP instructions.
 174          */
 175
 176         if (auprobe->ixol == (1 << 24)) {
 177                 regs->tnpc += 4;
 178                 regs->tpc += 4;
 179                 return true;
 180         }
 181
 182         return false;
 183 }
 184
 185 /* Prepare to execute out of line.  At this point
 186  * current->utask->xol_vaddr points to an allocated XOL slot properly
 187  * initialized with the original instruction and the single-stepping
 188  * trap instruction.
 189  *
 190  * This function returns 0 on success, any other number on error.
 191  */
 192 int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
 193 {
 194         struct uprobe_task *utask = current->utask;
 195         struct arch_uprobe_task *autask = &current->utask->autask;
 196
 197         /* Save the current program counters so they can be restored
 198          * later.
 199          */
 200         autask->saved_tpc = regs->tpc;
 201         autask->saved_tnpc = regs->tnpc;
 202
 203         /* Adjust PC and NPC so the first instruction in the XOL slot
 204          * will be executed by the user task.
 205          */
 206         instruction_pointer_set(regs, utask->xol_vaddr);
 207
 208         return 0;
 209 }
 210
 211 /* Prepare to resume execution after the single-step.  Called after
 212  * single-stepping. To avoid the SMP problems that can occur when we
 213  * temporarily put back the original opcode to single-step, we
 214  * single-stepped a copy of the instruction.
 215  *
 216  * This function returns 0 on success, any other number on error.
 217  */
 218 int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
 219 {
 220         struct uprobe_task *utask = current->utask;
 221         struct arch_uprobe_task *autask = &utask->autask;
 222         u32 insn = auprobe->ixol;
 223         int rc = 0;
 224
 225         if (utask->state == UTASK_SSTEP_ACK) {
 226                 regs->tnpc = relbranch_fixup(insn, utask, regs);
 227                 regs->tpc = autask->saved_tnpc;
 228                 rc =  retpc_fixup(regs, insn, (unsigned long) utask->vaddr);
 229         } else {
 230                 regs->tnpc = utask->vaddr+4;
 231                 regs->tpc = autask->saved_tnpc+4;
 232         }
 233         return rc;
 234 }
 235
 236 /* Handler for uprobe traps.  This is called from the traps table and
 237  * triggers the proper die notification.
 238  */
 239 asmlinkage void uprobe_trap(struct pt_regs *regs,
 240                             unsigned long trap_level)
 241 {
 242         BUG_ON(trap_level != 0x173 && trap_level != 0x174);
 243
 244         /* We are only interested in user-mode code.  Uprobe traps
 245          * shall not be present in kernel code.
 246          */
 247         if (!user_mode(regs)) {
 248                 local_irq_enable();
 249                 bad_trap(regs, trap_level);
 250                 return;
 251         }
 252
 253         /* trap_level == 0x173 --> ta 0x73
 254          * trap_level == 0x174 --> ta 0x74
 255          */
 256         if (notify_die((trap_level == 0x173) ? DIE_BPT : DIE_SSTEP,
 257                                 (trap_level == 0x173) ? "bpt" : "sstep",
 258                                 regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
 259                 bad_trap(regs, trap_level);
 260 }
 261
 262 /* Callback routine for handling die notifications.
 263 */
 264 int arch_uprobe_exception_notify(struct notifier_block *self,
 265                                  unsigned long val, void *data)
 266 {
 267         int ret = NOTIFY_DONE;
 268         struct die_args *args = (struct die_args *)data;
 269
 270         /* We are only interested in userspace traps */
 271         if (args->regs && !user_mode(args->regs))
 272                 return NOTIFY_DONE;
 273
 274         switch (val) {
 275         case DIE_BPT:
 276                 if (uprobe_pre_sstep_notifier(args->regs))
 277                         ret = NOTIFY_STOP;
 278                 break;
 279
 280         case DIE_SSTEP:
 281                 if (uprobe_post_sstep_notifier(args->regs))
 282                         ret = NOTIFY_STOP;
 283
 284         default:
 285                 break;
 286         }
 287
 288         return ret;
 289 }
 290
 291 /* This function gets called when a XOL instruction either gets
 292  * trapped or the thread has a fatal signal, so reset the instruction
 293  * pointer to its probed address.
 294  */
 295 void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
 296 {
 297         struct uprobe_task *utask = current->utask;
 298
 299         instruction_pointer_set(regs, utask->vaddr);
 300 }
 301
 302 /* If xol insn itself traps and generates a signal(Say,
 303  * SIGILL/SIGSEGV/etc), then detect the case where a singlestepped
 304  * instruction jumps back to its own address.
 305  */
 306 bool arch_uprobe_xol_was_trapped(struct task_struct *t)
 307 {
 308         return false;
 309 }
 310
 311 unsigned long
 312 arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr,
 313                                   struct pt_regs *regs)
 314 {
 315         unsigned long orig_ret_vaddr = regs->u_regs[UREG_I7];
 316
 317         regs->u_regs[UREG_I7] = trampoline_vaddr-8;
 318
 319         return orig_ret_vaddr + 8;
 320 }