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drm/panthor: Don't add write fences to the shared BOs
[drm/drm-misc.git] / arch / x86 / kvm / hyperv.c
blob4f0a94346d009406639680918e686ddd3abc8d83
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * KVM Microsoft Hyper-V emulation
4 *
5 * derived from arch/x86/kvm/x86.c
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
11 * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
12 *
13 * Authors:
14 * Avi Kivity <avi@qumranet.com>
15 * Yaniv Kamay <yaniv@qumranet.com>
16 * Amit Shah <amit.shah@qumranet.com>
17 * Ben-Ami Yassour <benami@il.ibm.com>
18 * Andrey Smetanin <asmetanin@virtuozzo.com>
19 */
20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21
22 #include "x86.h"
23 #include "lapic.h"
24 #include "ioapic.h"
25 #include "cpuid.h"
26 #include "hyperv.h"
27 #include "mmu.h"
28 #include "xen.h"
29
30 #include <linux/cpu.h>
31 #include <linux/kvm_host.h>
32 #include <linux/highmem.h>
33 #include <linux/sched/cputime.h>
34 #include <linux/spinlock.h>
35 #include <linux/eventfd.h>
36
37 #include <asm/apicdef.h>
38 #include <asm/mshyperv.h>
39 #include <trace/events/kvm.h>
40
41 #include "trace.h"
42 #include "irq.h"
43 #include "fpu.h"
44
45 #define KVM_HV_MAX_SPARSE_VCPU_SET_BITS DIV_ROUND_UP(KVM_MAX_VCPUS, HV_VCPUS_PER_SPARSE_BANK)
46
47 /*
48 * As per Hyper-V TLFS, extended hypercalls start from 0x8001
49 * (HvExtCallQueryCapabilities). Response of this hypercalls is a 64 bit value
50 * where each bit tells which extended hypercall is available besides
51 * HvExtCallQueryCapabilities.
52 *
53 * 0x8001 - First extended hypercall, HvExtCallQueryCapabilities, no bit
54 * assigned.
55 *
56 * 0x8002 - Bit 0
57 * 0x8003 - Bit 1
58 * ..
59 * 0x8041 - Bit 63
60 *
61 * Therefore, HV_EXT_CALL_MAX = 0x8001 + 64
62 */
63 #define HV_EXT_CALL_MAX (HV_EXT_CALL_QUERY_CAPABILITIES + 64)
64
65 static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
66 bool vcpu_kick);
67
68 static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
69 {
70 return atomic64_read(&synic->sint[sint]);
71 }
72
73 static inline int synic_get_sint_vector(u64 sint_value)
74 {
75 if (sint_value & HV_SYNIC_SINT_MASKED)
76 return -1;
77 return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
78 }
79
80 static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
81 int vector)
82 {
83 int i;
84
85 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
86 if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
87 return true;
88 }
89 return false;
90 }
91
92 static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
93 int vector)
94 {
95 int i;
96 u64 sint_value;
97
98 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
99 sint_value = synic_read_sint(synic, i);
100 if (synic_get_sint_vector(sint_value) == vector &&
101 sint_value & HV_SYNIC_SINT_AUTO_EOI)
102 return true;
103 }
104 return false;
105 }
106
107 static void synic_update_vector(struct kvm_vcpu_hv_synic *synic,
108 int vector)
109 {
110 struct kvm_vcpu *vcpu = hv_synic_to_vcpu(synic);
111 struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
112 bool auto_eoi_old, auto_eoi_new;
113
114 if (vector < HV_SYNIC_FIRST_VALID_VECTOR)
115 return;
116
117 if (synic_has_vector_connected(synic, vector))
118 __set_bit(vector, synic->vec_bitmap);
119 else
120 __clear_bit(vector, synic->vec_bitmap);
121
122 auto_eoi_old = !bitmap_empty(synic->auto_eoi_bitmap, 256);
123
124 if (synic_has_vector_auto_eoi(synic, vector))
125 __set_bit(vector, synic->auto_eoi_bitmap);
126 else
127 __clear_bit(vector, synic->auto_eoi_bitmap);
128
129 auto_eoi_new = !bitmap_empty(synic->auto_eoi_bitmap, 256);
130
131 if (auto_eoi_old == auto_eoi_new)
132 return;
133
134 if (!enable_apicv)
135 return;
136
137 down_write(&vcpu->kvm->arch.apicv_update_lock);
138
139 if (auto_eoi_new)
140 hv->synic_auto_eoi_used++;
141 else
142 hv->synic_auto_eoi_used--;
143
144 /*
145 * Inhibit APICv if any vCPU is using SynIC's AutoEOI, which relies on
146 * the hypervisor to manually inject IRQs.
147 */
148 __kvm_set_or_clear_apicv_inhibit(vcpu->kvm,
149 APICV_INHIBIT_REASON_HYPERV,
150 !!hv->synic_auto_eoi_used);
151
152 up_write(&vcpu->kvm->arch.apicv_update_lock);
153 }
154
155 static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
156 u64 data, bool host)
157 {
158 int vector, old_vector;
159 bool masked;
160
161 vector = data & HV_SYNIC_SINT_VECTOR_MASK;
162 masked = data & HV_SYNIC_SINT_MASKED;
163
164 /*
165 * Valid vectors are 16-255, however, nested Hyper-V attempts to write
166 * default '0x10000' value on boot and this should not #GP. We need to
167 * allow zero-initing the register from host as well.
168 */
169 if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked)
170 return 1;
171 /*
172 * Guest may configure multiple SINTs to use the same vector, so
173 * we maintain a bitmap of vectors handled by synic, and a
174 * bitmap of vectors with auto-eoi behavior. The bitmaps are
175 * updated here, and atomically queried on fast paths.
176 */
177 old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK;
178
179 atomic64_set(&synic->sint[sint], data);
180
181 synic_update_vector(synic, old_vector);
182
183 synic_update_vector(synic, vector);
184
185 /* Load SynIC vectors into EOI exit bitmap */
186 kvm_make_request(KVM_REQ_SCAN_IOAPIC, hv_synic_to_vcpu(synic));
187 return 0;
188 }
189
190 static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
191 {
192 struct kvm_vcpu *vcpu = NULL;
193 unsigned long i;
194
195 if (vpidx >= KVM_MAX_VCPUS)
196 return NULL;
197
198 vcpu = kvm_get_vcpu(kvm, vpidx);
199 if (vcpu && kvm_hv_get_vpindex(vcpu) == vpidx)
200 return vcpu;
201 kvm_for_each_vcpu(i, vcpu, kvm)
202 if (kvm_hv_get_vpindex(vcpu) == vpidx)
203 return vcpu;
204 return NULL;
205 }
206
207 static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
208 {
209 struct kvm_vcpu *vcpu;
210 struct kvm_vcpu_hv_synic *synic;
211
212 vcpu = get_vcpu_by_vpidx(kvm, vpidx);
213 if (!vcpu || !to_hv_vcpu(vcpu))
214 return NULL;
215 synic = to_hv_synic(vcpu);
216 return (synic->active) ? synic : NULL;
217 }
218
219 static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
220 {
221 struct kvm *kvm = vcpu->kvm;
222 struct kvm_vcpu_hv_synic *synic = to_hv_synic(vcpu);
223 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
224 struct kvm_vcpu_hv_stimer *stimer;
225 int gsi, idx;
226
227 trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint);
228
229 /* Try to deliver pending Hyper-V SynIC timers messages */
230 for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) {
231 stimer = &hv_vcpu->stimer[idx];
232 if (stimer->msg_pending && stimer->config.enable &&
233 !stimer->config.direct_mode &&
234 stimer->config.sintx == sint)
235 stimer_mark_pending(stimer, false);
236 }
237
238 idx = srcu_read_lock(&kvm->irq_srcu);
239 gsi = atomic_read(&synic->sint_to_gsi[sint]);
240 if (gsi != -1)
241 kvm_notify_acked_gsi(kvm, gsi);
242 srcu_read_unlock(&kvm->irq_srcu, idx);
243 }
244
245 static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
246 {
247 struct kvm_vcpu *vcpu = hv_synic_to_vcpu(synic);
248 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
249
250 hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
251 hv_vcpu->exit.u.synic.msr = msr;
252 hv_vcpu->exit.u.synic.control = synic->control;
253 hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
254 hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
255
256 kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
257 }
258
259 static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
260 u32 msr, u64 data, bool host)
261 {
262 struct kvm_vcpu *vcpu = hv_synic_to_vcpu(synic);
263 int ret;
264
265 if (!synic->active && (!host || data))
266 return 1;
267
268 trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);
269
270 ret = 0;
271 switch (msr) {
272 case HV_X64_MSR_SCONTROL:
273 synic->control = data;
274 if (!host)
275 synic_exit(synic, msr);
276 break;
277 case HV_X64_MSR_SVERSION:
278 if (!host) {
279 ret = 1;
280 break;
281 }
282 synic->version = data;
283 break;
284 case HV_X64_MSR_SIEFP:
285 if ((data & HV_SYNIC_SIEFP_ENABLE) && !host &&
286 !synic->dont_zero_synic_pages)
287 if (kvm_clear_guest(vcpu->kvm,
288 data & PAGE_MASK, PAGE_SIZE)) {
289 ret = 1;
290 break;
291 }
292 synic->evt_page = data;
293 if (!host)
294 synic_exit(synic, msr);
295 break;
296 case HV_X64_MSR_SIMP:
297 if ((data & HV_SYNIC_SIMP_ENABLE) && !host &&
298 !synic->dont_zero_synic_pages)
299 if (kvm_clear_guest(vcpu->kvm,
300 data & PAGE_MASK, PAGE_SIZE)) {
301 ret = 1;
302 break;
303 }
304 synic->msg_page = data;
305 if (!host)
306 synic_exit(synic, msr);
307 break;
308 case HV_X64_MSR_EOM: {
309 int i;
310
311 if (!synic->active)
312 break;
313
314 for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
315 kvm_hv_notify_acked_sint(vcpu, i);
316 break;
317 }
318 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
319 ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);
320 break;
321 default:
322 ret = 1;
323 break;
324 }
325 return ret;
326 }
327
328 static bool kvm_hv_is_syndbg_enabled(struct kvm_vcpu *vcpu)
329 {
330 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
331
332 return hv_vcpu->cpuid_cache.syndbg_cap_eax &
333 HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING;
334 }
335
336 static int kvm_hv_syndbg_complete_userspace(struct kvm_vcpu *vcpu)
337 {
338 struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
339
340 if (vcpu->run->hyperv.u.syndbg.msr == HV_X64_MSR_SYNDBG_CONTROL)
341 hv->hv_syndbg.control.status =
342 vcpu->run->hyperv.u.syndbg.status;
343 return 1;
344 }
345
346 static void syndbg_exit(struct kvm_vcpu *vcpu, u32 msr)
347 {
348 struct kvm_hv_syndbg *syndbg = to_hv_syndbg(vcpu);
349 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
350
351 hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNDBG;
352 hv_vcpu->exit.u.syndbg.msr = msr;
353 hv_vcpu->exit.u.syndbg.control = syndbg->control.control;
354 hv_vcpu->exit.u.syndbg.send_page = syndbg->control.send_page;
355 hv_vcpu->exit.u.syndbg.recv_page = syndbg->control.recv_page;
356 hv_vcpu->exit.u.syndbg.pending_page = syndbg->control.pending_page;
357 vcpu->arch.complete_userspace_io =
358 kvm_hv_syndbg_complete_userspace;
359
360 kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
361 }
362
363 static int syndbg_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
364 {
365 struct kvm_hv_syndbg *syndbg = to_hv_syndbg(vcpu);
366
367 if (!kvm_hv_is_syndbg_enabled(vcpu) && !host)
368 return 1;
369
370 trace_kvm_hv_syndbg_set_msr(vcpu->vcpu_id,
371 to_hv_vcpu(vcpu)->vp_index, msr, data);
372 switch (msr) {
373 case HV_X64_MSR_SYNDBG_CONTROL:
374 syndbg->control.control = data;
375 if (!host)
376 syndbg_exit(vcpu, msr);
377 break;
378 case HV_X64_MSR_SYNDBG_STATUS:
379 syndbg->control.status = data;
380 break;
381 case HV_X64_MSR_SYNDBG_SEND_BUFFER:
382 syndbg->control.send_page = data;
383 break;
384 case HV_X64_MSR_SYNDBG_RECV_BUFFER:
385 syndbg->control.recv_page = data;
386 break;
387 case HV_X64_MSR_SYNDBG_PENDING_BUFFER:
388 syndbg->control.pending_page = data;
389 if (!host)
390 syndbg_exit(vcpu, msr);
391 break;
392 case HV_X64_MSR_SYNDBG_OPTIONS:
393 syndbg->options = data;
394 break;
395 default:
396 break;
397 }
398
399 return 0;
400 }
401
402 static int syndbg_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
403 {
404 struct kvm_hv_syndbg *syndbg = to_hv_syndbg(vcpu);
405
406 if (!kvm_hv_is_syndbg_enabled(vcpu) && !host)
407 return 1;
408
409 switch (msr) {
410 case HV_X64_MSR_SYNDBG_CONTROL:
411 *pdata = syndbg->control.control;
412 break;
413 case HV_X64_MSR_SYNDBG_STATUS:
414 *pdata = syndbg->control.status;
415 break;
416 case HV_X64_MSR_SYNDBG_SEND_BUFFER:
417 *pdata = syndbg->control.send_page;
418 break;
419 case HV_X64_MSR_SYNDBG_RECV_BUFFER:
420 *pdata = syndbg->control.recv_page;
421 break;
422 case HV_X64_MSR_SYNDBG_PENDING_BUFFER:
423 *pdata = syndbg->control.pending_page;
424 break;
425 case HV_X64_MSR_SYNDBG_OPTIONS:
426 *pdata = syndbg->options;
427 break;
428 default:
429 break;
430 }
431
432 trace_kvm_hv_syndbg_get_msr(vcpu->vcpu_id, kvm_hv_get_vpindex(vcpu), msr, *pdata);
433
434 return 0;
435 }
436
437 static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata,
438 bool host)
439 {
440 int ret;
441
442 if (!synic->active && !host)
443 return 1;
444
445 ret = 0;
446 switch (msr) {
447 case HV_X64_MSR_SCONTROL:
448 *pdata = synic->control;
449 break;
450 case HV_X64_MSR_SVERSION:
451 *pdata = synic->version;
452 break;
453 case HV_X64_MSR_SIEFP:
454 *pdata = synic->evt_page;
455 break;
456 case HV_X64_MSR_SIMP:
457 *pdata = synic->msg_page;
458 break;
459 case HV_X64_MSR_EOM:
460 *pdata = 0;
461 break;
462 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
463 *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
464 break;
465 default:
466 ret = 1;
467 break;
468 }
469 return ret;
470 }
471
472 static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
473 {
474 struct kvm_vcpu *vcpu = hv_synic_to_vcpu(synic);
475 struct kvm_lapic_irq irq;
476 int ret, vector;
477
478 if (KVM_BUG_ON(!lapic_in_kernel(vcpu), vcpu->kvm))
479 return -EINVAL;
480
481 if (sint >= ARRAY_SIZE(synic->sint))
482 return -EINVAL;
483
484 vector = synic_get_sint_vector(synic_read_sint(synic, sint));
485 if (vector < 0)
486 return -ENOENT;
487
488 memset(&irq, 0, sizeof(irq));
489 irq.shorthand = APIC_DEST_SELF;
490 irq.dest_mode = APIC_DEST_PHYSICAL;
491 irq.delivery_mode = APIC_DM_FIXED;
492 irq.vector = vector;
493 irq.level = 1;
494
495 ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL);
496 trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
497 return ret;
498 }
499
500 int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
501 {
502 struct kvm_vcpu_hv_synic *synic;
503
504 synic = synic_get(kvm, vpidx);
505 if (!synic)
506 return -EINVAL;
507
508 return synic_set_irq(synic, sint);
509 }
510
511 void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
512 {
513 struct kvm_vcpu_hv_synic *synic = to_hv_synic(vcpu);
514 int i;
515
516 trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector);
517
518 for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
519 if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
520 kvm_hv_notify_acked_sint(vcpu, i);
521 }
522
523 static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
524 {
525 struct kvm_vcpu_hv_synic *synic;
526
527 synic = synic_get(kvm, vpidx);
528 if (!synic)
529 return -EINVAL;
530
531 if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
532 return -EINVAL;
533
534 atomic_set(&synic->sint_to_gsi[sint], gsi);
535 return 0;
536 }
537
538 void kvm_hv_irq_routing_update(struct kvm *kvm)
539 {
540 struct kvm_irq_routing_table *irq_rt;
541 struct kvm_kernel_irq_routing_entry *e;
542 u32 gsi;
543
544 irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
545 lockdep_is_held(&kvm->irq_lock));
546
547 for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
548 hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
549 if (e->type == KVM_IRQ_ROUTING_HV_SINT)
550 kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
551 e->hv_sint.sint, gsi);
552 }
553 }
554 }
555
556 static void synic_init(struct kvm_vcpu_hv_synic *synic)
557 {
558 int i;
559
560 memset(synic, 0, sizeof(*synic));
561 synic->version = HV_SYNIC_VERSION_1;
562 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
563 atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
564 atomic_set(&synic->sint_to_gsi[i], -1);
565 }
566 }
567
568 static u64 get_time_ref_counter(struct kvm *kvm)
569 {
570 struct kvm_hv *hv = to_kvm_hv(kvm);
571 struct kvm_vcpu *vcpu;
572 u64 tsc;
573
574 /*
575 * Fall back to get_kvmclock_ns() when TSC page hasn't been set up,
576 * is broken, disabled or being updated.
577 */
578 if (hv->hv_tsc_page_status != HV_TSC_PAGE_SET)
579 return div_u64(get_kvmclock_ns(kvm), 100);
580
581 vcpu = kvm_get_vcpu(kvm, 0);
582 tsc = kvm_read_l1_tsc(vcpu, rdtsc());
583 return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64)
584 + hv->tsc_ref.tsc_offset;
585 }
586
587 static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
588 bool vcpu_kick)
589 {
590 struct kvm_vcpu *vcpu = hv_stimer_to_vcpu(stimer);
591
592 set_bit(stimer->index,
593 to_hv_vcpu(vcpu)->stimer_pending_bitmap);
594 kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
595 if (vcpu_kick)
596 kvm_vcpu_kick(vcpu);
597 }
598
599 static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer)
600 {
601 struct kvm_vcpu *vcpu = hv_stimer_to_vcpu(stimer);
602
603 trace_kvm_hv_stimer_cleanup(hv_stimer_to_vcpu(stimer)->vcpu_id,
604 stimer->index);
605
606 hrtimer_cancel(&stimer->timer);
607 clear_bit(stimer->index,
608 to_hv_vcpu(vcpu)->stimer_pending_bitmap);
609 stimer->msg_pending = false;
610 stimer->exp_time = 0;
611 }
612
613 static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer)
614 {
615 struct kvm_vcpu_hv_stimer *stimer;
616
617 stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer);
618 trace_kvm_hv_stimer_callback(hv_stimer_to_vcpu(stimer)->vcpu_id,
619 stimer->index);
620 stimer_mark_pending(stimer, true);
621
622 return HRTIMER_NORESTART;
623 }
624
625 /*
626 * stimer_start() assumptions:
627 * a) stimer->count is not equal to 0
628 * b) stimer->config has HV_STIMER_ENABLE flag
629 */
630 static int stimer_start(struct kvm_vcpu_hv_stimer *stimer)
631 {
632 u64 time_now;
633 ktime_t ktime_now;
634
635 time_now = get_time_ref_counter(hv_stimer_to_vcpu(stimer)->kvm);
636 ktime_now = ktime_get();
637
638 if (stimer->config.periodic) {
639 if (stimer->exp_time) {
640 if (time_now >= stimer->exp_time) {
641 u64 remainder;
642
643 div64_u64_rem(time_now - stimer->exp_time,
644 stimer->count, &remainder);
645 stimer->exp_time =
646 time_now + (stimer->count - remainder);
647 }
648 } else
649 stimer->exp_time = time_now + stimer->count;
650
651 trace_kvm_hv_stimer_start_periodic(
652 hv_stimer_to_vcpu(stimer)->vcpu_id,
653 stimer->index,
654 time_now, stimer->exp_time);
655
656 hrtimer_start(&stimer->timer,
657 ktime_add_ns(ktime_now,
658 100 * (stimer->exp_time - time_now)),
659 HRTIMER_MODE_ABS);
660 return 0;
661 }
662 stimer->exp_time = stimer->count;
663 if (time_now >= stimer->count) {
664 /*
665 * Expire timer according to Hypervisor Top-Level Functional
666 * specification v4(15.3.1):
667 * "If a one shot is enabled and the specified count is in
668 * the past, it will expire immediately."
669 */
670 stimer_mark_pending(stimer, false);
671 return 0;
672 }
673
674 trace_kvm_hv_stimer_start_one_shot(hv_stimer_to_vcpu(stimer)->vcpu_id,
675 stimer->index,
676 time_now, stimer->count);
677
678 hrtimer_start(&stimer->timer,
679 ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)),
680 HRTIMER_MODE_ABS);
681 return 0;
682 }
683
684 static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config,
685 bool host)
686 {
687 union hv_stimer_config new_config = {.as_uint64 = config},
688 old_config = {.as_uint64 = stimer->config.as_uint64};
689 struct kvm_vcpu *vcpu = hv_stimer_to_vcpu(stimer);
690 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
691 struct kvm_vcpu_hv_synic *synic = to_hv_synic(vcpu);
692
693 if (!synic->active && (!host || config))
694 return 1;
695
696 if (unlikely(!host && hv_vcpu->enforce_cpuid && new_config.direct_mode &&
697 !(hv_vcpu->cpuid_cache.features_edx &
698 HV_STIMER_DIRECT_MODE_AVAILABLE)))
699 return 1;
700
701 trace_kvm_hv_stimer_set_config(hv_stimer_to_vcpu(stimer)->vcpu_id,
702 stimer->index, config, host);
703
704 stimer_cleanup(stimer);
705 if (old_config.enable &&
706 !new_config.direct_mode && new_config.sintx == 0)
707 new_config.enable = 0;
708 stimer->config.as_uint64 = new_config.as_uint64;
709
710 if (stimer->config.enable)
711 stimer_mark_pending(stimer, false);
712
713 return 0;
714 }
715
716 static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
717 bool host)
718 {
719 struct kvm_vcpu *vcpu = hv_stimer_to_vcpu(stimer);
720 struct kvm_vcpu_hv_synic *synic = to_hv_synic(vcpu);
721
722 if (!synic->active && (!host || count))
723 return 1;
724
725 trace_kvm_hv_stimer_set_count(hv_stimer_to_vcpu(stimer)->vcpu_id,
726 stimer->index, count, host);
727
728 stimer_cleanup(stimer);
729 stimer->count = count;
730 if (!host) {
731 if (stimer->count == 0)
732 stimer->config.enable = 0;
733 else if (stimer->config.auto_enable)
734 stimer->config.enable = 1;
735 }
736
737 if (stimer->config.enable)
738 stimer_mark_pending(stimer, false);
739
740 return 0;
741 }
742
743 static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig)
744 {
745 *pconfig = stimer->config.as_uint64;
746 return 0;
747 }
748
749 static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount)
750 {
751 *pcount = stimer->count;
752 return 0;
753 }
754
755 static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint,
756 struct hv_message *src_msg, bool no_retry)
757 {
758 struct kvm_vcpu *vcpu = hv_synic_to_vcpu(synic);
759 int msg_off = offsetof(struct hv_message_page, sint_message[sint]);
760 gfn_t msg_page_gfn;
761 struct hv_message_header hv_hdr;
762 int r;
763
764 if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE))
765 return -ENOENT;
766
767 msg_page_gfn = synic->msg_page >> PAGE_SHIFT;
768
769 /*
770 * Strictly following the spec-mandated ordering would assume setting
771 * .msg_pending before checking .message_type. However, this function
772 * is only called in vcpu context so the entire update is atomic from
773 * guest POV and thus the exact order here doesn't matter.
774 */
775 r = kvm_vcpu_read_guest_page(vcpu, msg_page_gfn, &hv_hdr.message_type,
776 msg_off + offsetof(struct hv_message,
777 header.message_type),
778 sizeof(hv_hdr.message_type));
779 if (r < 0)
780 return r;
781
782 if (hv_hdr.message_type != HVMSG_NONE) {
783 if (no_retry)
784 return 0;
785
786 hv_hdr.message_flags.msg_pending = 1;
787 r = kvm_vcpu_write_guest_page(vcpu, msg_page_gfn,
788 &hv_hdr.message_flags,
789 msg_off +
790 offsetof(struct hv_message,
791 header.message_flags),
792 sizeof(hv_hdr.message_flags));
793 if (r < 0)
794 return r;
795 return -EAGAIN;
796 }
797
798 r = kvm_vcpu_write_guest_page(vcpu, msg_page_gfn, src_msg, msg_off,
799 sizeof(src_msg->header) +
800 src_msg->header.payload_size);
801 if (r < 0)
802 return r;
803
804 r = synic_set_irq(synic, sint);
805 if (r < 0)
806 return r;
807 if (r == 0)
808 return -EFAULT;
809 return 0;
810 }
811
812 static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer)
813 {
814 struct kvm_vcpu *vcpu = hv_stimer_to_vcpu(stimer);
815 struct hv_message *msg = &stimer->msg;
816 struct hv_timer_message_payload *payload =
817 (struct hv_timer_message_payload *)&msg->u.payload;
818
819 /*
820 * To avoid piling up periodic ticks, don't retry message
821 * delivery for them (within "lazy" lost ticks policy).
822 */
823 bool no_retry = stimer->config.periodic;
824
825 payload->expiration_time = stimer->exp_time;
826 payload->delivery_time = get_time_ref_counter(vcpu->kvm);
827 return synic_deliver_msg(to_hv_synic(vcpu),
828 stimer->config.sintx, msg,
829 no_retry);
830 }
831
832 static int stimer_notify_direct(struct kvm_vcpu_hv_stimer *stimer)
833 {
834 struct kvm_vcpu *vcpu = hv_stimer_to_vcpu(stimer);
835 struct kvm_lapic_irq irq = {
836 .delivery_mode = APIC_DM_FIXED,
837 .vector = stimer->config.apic_vector
838 };
839
840 if (lapic_in_kernel(vcpu))
841 return !kvm_apic_set_irq(vcpu, &irq, NULL);
842 return 0;
843 }
844
845 static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer)
846 {
847 int r, direct = stimer->config.direct_mode;
848
849 stimer->msg_pending = true;
850 if (!direct)
851 r = stimer_send_msg(stimer);
852 else
853 r = stimer_notify_direct(stimer);
854 trace_kvm_hv_stimer_expiration(hv_stimer_to_vcpu(stimer)->vcpu_id,
855 stimer->index, direct, r);
856 if (!r) {
857 stimer->msg_pending = false;
858 if (!(stimer->config.periodic))
859 stimer->config.enable = 0;
860 }
861 }
862
863 void kvm_hv_process_stimers(struct kvm_vcpu *vcpu)
864 {
865 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
866 struct kvm_vcpu_hv_stimer *stimer;
867 u64 time_now, exp_time;
868 int i;
869
870 if (!hv_vcpu)
871 return;
872
873 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
874 if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) {
875 stimer = &hv_vcpu->stimer[i];
876 if (stimer->config.enable) {
877 exp_time = stimer->exp_time;
878
879 if (exp_time) {
880 time_now =
881 get_time_ref_counter(vcpu->kvm);
882 if (time_now >= exp_time)
883 stimer_expiration(stimer);
884 }
885
886 if ((stimer->config.enable) &&
887 stimer->count) {
888 if (!stimer->msg_pending)
889 stimer_start(stimer);
890 } else
891 stimer_cleanup(stimer);
892 }
893 }
894 }
895
896 void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu)
897 {
898 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
899 int i;
900
901 if (!hv_vcpu)
902 return;
903
904 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
905 stimer_cleanup(&hv_vcpu->stimer[i]);
906
907 kfree(hv_vcpu);
908 vcpu->arch.hyperv = NULL;
909 }
910
911 bool kvm_hv_assist_page_enabled(struct kvm_vcpu *vcpu)
912 {
913 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
914
915 if (!hv_vcpu)
916 return false;
917
918 if (!(hv_vcpu->hv_vapic & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE))
919 return false;
920 return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED;
921 }
922 EXPORT_SYMBOL_GPL(kvm_hv_assist_page_enabled);
923
924 int kvm_hv_get_assist_page(struct kvm_vcpu *vcpu)
925 {
926 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
927
928 if (!hv_vcpu || !kvm_hv_assist_page_enabled(vcpu))
929 return -EFAULT;
930
931 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data,
932 &hv_vcpu->vp_assist_page, sizeof(struct hv_vp_assist_page));
933 }
934 EXPORT_SYMBOL_GPL(kvm_hv_get_assist_page);
935
936 static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer)
937 {
938 struct hv_message *msg = &stimer->msg;
939 struct hv_timer_message_payload *payload =
940 (struct hv_timer_message_payload *)&msg->u.payload;
941
942 memset(&msg->header, 0, sizeof(msg->header));
943 msg->header.message_type = HVMSG_TIMER_EXPIRED;
944 msg->header.payload_size = sizeof(*payload);
945
946 payload->timer_index = stimer->index;
947 payload->expiration_time = 0;
948 payload->delivery_time = 0;
949 }
950
951 static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index)
952 {
953 memset(stimer, 0, sizeof(*stimer));
954 stimer->index = timer_index;
955 hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
956 stimer->timer.function = stimer_timer_callback;
957 stimer_prepare_msg(stimer);
958 }
959
960 int kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
961 {
962 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
963 int i;
964
965 if (hv_vcpu)
966 return 0;
967
968 hv_vcpu = kzalloc(sizeof(struct kvm_vcpu_hv), GFP_KERNEL_ACCOUNT);
969 if (!hv_vcpu)
970 return -ENOMEM;
971
972 vcpu->arch.hyperv = hv_vcpu;
973 hv_vcpu->vcpu = vcpu;
974
975 synic_init(&hv_vcpu->synic);
976
977 bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
978 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
979 stimer_init(&hv_vcpu->stimer[i], i);
980
981 hv_vcpu->vp_index = vcpu->vcpu_idx;
982
983 for (i = 0; i < HV_NR_TLB_FLUSH_FIFOS; i++) {
984 INIT_KFIFO(hv_vcpu->tlb_flush_fifo[i].entries);
985 spin_lock_init(&hv_vcpu->tlb_flush_fifo[i].write_lock);
986 }
987
988 return 0;
989 }
990
991 int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
992 {
993 struct kvm_vcpu_hv_synic *synic;
994 int r;
995
996 r = kvm_hv_vcpu_init(vcpu);
997 if (r)
998 return r;
999
1000 synic = to_hv_synic(vcpu);
1001
1002 synic->active = true;
1003 synic->dont_zero_synic_pages = dont_zero_synic_pages;
1004 synic->control = HV_SYNIC_CONTROL_ENABLE;
1005 return 0;
1006 }
1007
1008 static bool kvm_hv_msr_partition_wide(u32 msr)
1009 {
1010 bool r = false;
1011
1012 switch (msr) {
1013 case HV_X64_MSR_GUEST_OS_ID:
1014 case HV_X64_MSR_HYPERCALL:
1015 case HV_X64_MSR_REFERENCE_TSC:
1016 case HV_X64_MSR_TIME_REF_COUNT:
1017 case HV_X64_MSR_CRASH_CTL:
1018 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1019 case HV_X64_MSR_RESET:
1020 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1021 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1022 case HV_X64_MSR_TSC_EMULATION_STATUS:
1023 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
1024 case HV_X64_MSR_SYNDBG_OPTIONS:
1025 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
1026 r = true;
1027 break;
1028 }
1029
1030 return r;
1031 }
1032
1033 static int kvm_hv_msr_get_crash_data(struct kvm *kvm, u32 index, u64 *pdata)
1034 {
1035 struct kvm_hv *hv = to_kvm_hv(kvm);
1036 size_t size = ARRAY_SIZE(hv->hv_crash_param);
1037
1038 if (WARN_ON_ONCE(index >= size))
1039 return -EINVAL;
1040
1041 *pdata = hv->hv_crash_param[array_index_nospec(index, size)];
1042 return 0;
1043 }
1044
1045 static int kvm_hv_msr_get_crash_ctl(struct kvm *kvm, u64 *pdata)
1046 {
1047 struct kvm_hv *hv = to_kvm_hv(kvm);
1048
1049 *pdata = hv->hv_crash_ctl;
1050 return 0;
1051 }
1052
1053 static int kvm_hv_msr_set_crash_ctl(struct kvm *kvm, u64 data)
1054 {
1055 struct kvm_hv *hv = to_kvm_hv(kvm);
1056
1057 hv->hv_crash_ctl = data & HV_CRASH_CTL_CRASH_NOTIFY;
1058
1059 return 0;
1060 }
1061
1062 static int kvm_hv_msr_set_crash_data(struct kvm *kvm, u32 index, u64 data)
1063 {
1064 struct kvm_hv *hv = to_kvm_hv(kvm);
1065 size_t size = ARRAY_SIZE(hv->hv_crash_param);
1066
1067 if (WARN_ON_ONCE(index >= size))
1068 return -EINVAL;
1069
1070 hv->hv_crash_param[array_index_nospec(index, size)] = data;
1071 return 0;
1072 }
1073
1074 /*
1075 * The kvmclock and Hyper-V TSC page use similar formulas, and converting
1076 * between them is possible:
1077 *
1078 * kvmclock formula:
1079 * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32)
1080 * + system_time
1081 *
1082 * Hyper-V formula:
1083 * nsec/100 = ticks * scale / 2^64 + offset
1084 *
1085 * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula.
1086 * By dividing the kvmclock formula by 100 and equating what's left we get:
1087 * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
1088 * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100
1089 * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100
1090 *
1091 * Now expand the kvmclock formula and divide by 100:
1092 * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32)
1093 * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32)
1094 * + system_time
1095 * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
1096 * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100
1097 * + system_time / 100
1098 *
1099 * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64:
1100 * nsec/100 = ticks * scale / 2^64
1101 * - tsc_timestamp * scale / 2^64
1102 * + system_time / 100
1103 *
1104 * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out:
1105 * offset = system_time / 100 - tsc_timestamp * scale / 2^64
1106 *
1107 * These two equivalencies are implemented in this function.
1108 */
1109 static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock,
1110 struct ms_hyperv_tsc_page *tsc_ref)
1111 {
1112 u64 max_mul;
1113
1114 if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT))
1115 return false;
1116
1117 /*
1118 * check if scale would overflow, if so we use the time ref counter
1119 * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64
1120 * tsc_to_system_mul / 100 >= 2^(32-tsc_shift)
1121 * tsc_to_system_mul >= 100 * 2^(32-tsc_shift)
1122 */
1123 max_mul = 100ull << (32 - hv_clock->tsc_shift);
1124 if (hv_clock->tsc_to_system_mul >= max_mul)
1125 return false;
1126
1127 /*
1128 * Otherwise compute the scale and offset according to the formulas
1129 * derived above.
1130 */
1131 tsc_ref->tsc_scale =
1132 mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift),
1133 hv_clock->tsc_to_system_mul,
1134 100);
1135
1136 tsc_ref->tsc_offset = hv_clock->system_time;
1137 do_div(tsc_ref->tsc_offset, 100);
1138 tsc_ref->tsc_offset -=
1139 mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64);
1140 return true;
1141 }
1142
1143 /*
1144 * Don't touch TSC page values if the guest has opted for TSC emulation after
1145 * migration. KVM doesn't fully support reenlightenment notifications and TSC
1146 * access emulation and Hyper-V is known to expect the values in TSC page to
1147 * stay constant before TSC access emulation is disabled from guest side
1148 * (HV_X64_MSR_TSC_EMULATION_STATUS). KVM userspace is expected to preserve TSC
1149 * frequency and guest visible TSC value across migration (and prevent it when
1150 * TSC scaling is unsupported).
1151 */
1152 static inline bool tsc_page_update_unsafe(struct kvm_hv *hv)
1153 {
1154 return (hv->hv_tsc_page_status != HV_TSC_PAGE_GUEST_CHANGED) &&
1155 hv->hv_tsc_emulation_control;
1156 }
1157
1158 void kvm_hv_setup_tsc_page(struct kvm *kvm,
1159 struct pvclock_vcpu_time_info *hv_clock)
1160 {
1161 struct kvm_hv *hv = to_kvm_hv(kvm);
1162 u32 tsc_seq;
1163 u64 gfn;
1164
1165 BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence));
1166 BUILD_BUG_ON(offsetof(struct ms_hyperv_tsc_page, tsc_sequence) != 0);
1167
1168 mutex_lock(&hv->hv_lock);
1169
1170 if (hv->hv_tsc_page_status == HV_TSC_PAGE_BROKEN ||
1171 hv->hv_tsc_page_status == HV_TSC_PAGE_SET ||
1172 hv->hv_tsc_page_status == HV_TSC_PAGE_UNSET)
1173 goto out_unlock;
1174
1175 if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1176 goto out_unlock;
1177
1178 gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1179 /*
1180 * Because the TSC parameters only vary when there is a
1181 * change in the master clock, do not bother with caching.
1182 */
1183 if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn),
1184 &tsc_seq, sizeof(tsc_seq))))
1185 goto out_err;
1186
1187 if (tsc_seq && tsc_page_update_unsafe(hv)) {
1188 if (kvm_read_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
1189 goto out_err;
1190
1191 hv->hv_tsc_page_status = HV_TSC_PAGE_SET;
1192 goto out_unlock;
1193 }
1194
1195 /*
1196 * While we're computing and writing the parameters, force the
1197 * guest to use the time reference count MSR.
1198 */
1199 hv->tsc_ref.tsc_sequence = 0;
1200 if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
1201 &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
1202 goto out_err;
1203
1204 if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref))
1205 goto out_err;
1206
1207 /* Ensure sequence is zero before writing the rest of the struct. */
1208 smp_wmb();
1209 if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
1210 goto out_err;
1211
1212 /*
1213 * Now switch to the TSC page mechanism by writing the sequence.
1214 */
1215 tsc_seq++;
1216 if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0)
1217 tsc_seq = 1;
1218
1219 /* Write the struct entirely before the non-zero sequence. */
1220 smp_wmb();
1221
1222 hv->tsc_ref.tsc_sequence = tsc_seq;
1223 if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
1224 &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
1225 goto out_err;
1226
1227 hv->hv_tsc_page_status = HV_TSC_PAGE_SET;
1228 goto out_unlock;
1229
1230 out_err:
1231 hv->hv_tsc_page_status = HV_TSC_PAGE_BROKEN;
1232 out_unlock:
1233 mutex_unlock(&hv->hv_lock);
1234 }
1235
1236 void kvm_hv_request_tsc_page_update(struct kvm *kvm)
1237 {
1238 struct kvm_hv *hv = to_kvm_hv(kvm);
1239
1240 mutex_lock(&hv->hv_lock);
1241
1242 if (hv->hv_tsc_page_status == HV_TSC_PAGE_SET &&
1243 !tsc_page_update_unsafe(hv))
1244 hv->hv_tsc_page_status = HV_TSC_PAGE_HOST_CHANGED;
1245
1246 mutex_unlock(&hv->hv_lock);
1247 }
1248
1249 static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr)
1250 {
1251 if (!hv_vcpu->enforce_cpuid)
1252 return true;
1253
1254 switch (msr) {
1255 case HV_X64_MSR_GUEST_OS_ID:
1256 case HV_X64_MSR_HYPERCALL:
1257 return hv_vcpu->cpuid_cache.features_eax &
1258 HV_MSR_HYPERCALL_AVAILABLE;
1259 case HV_X64_MSR_VP_RUNTIME:
1260 return hv_vcpu->cpuid_cache.features_eax &
1261 HV_MSR_VP_RUNTIME_AVAILABLE;
1262 case HV_X64_MSR_TIME_REF_COUNT:
1263 return hv_vcpu->cpuid_cache.features_eax &
1264 HV_MSR_TIME_REF_COUNT_AVAILABLE;
1265 case HV_X64_MSR_VP_INDEX:
1266 return hv_vcpu->cpuid_cache.features_eax &
1267 HV_MSR_VP_INDEX_AVAILABLE;
1268 case HV_X64_MSR_RESET:
1269 return hv_vcpu->cpuid_cache.features_eax &
1270 HV_MSR_RESET_AVAILABLE;
1271 case HV_X64_MSR_REFERENCE_TSC:
1272 return hv_vcpu->cpuid_cache.features_eax &
1273 HV_MSR_REFERENCE_TSC_AVAILABLE;
1274 case HV_X64_MSR_SCONTROL:
1275 case HV_X64_MSR_SVERSION:
1276 case HV_X64_MSR_SIEFP:
1277 case HV_X64_MSR_SIMP:
1278 case HV_X64_MSR_EOM:
1279 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
1280 return hv_vcpu->cpuid_cache.features_eax &
1281 HV_MSR_SYNIC_AVAILABLE;
1282 case HV_X64_MSR_STIMER0_CONFIG:
1283 case HV_X64_MSR_STIMER1_CONFIG:
1284 case HV_X64_MSR_STIMER2_CONFIG:
1285 case HV_X64_MSR_STIMER3_CONFIG:
1286 case HV_X64_MSR_STIMER0_COUNT:
1287 case HV_X64_MSR_STIMER1_COUNT:
1288 case HV_X64_MSR_STIMER2_COUNT:
1289 case HV_X64_MSR_STIMER3_COUNT:
1290 return hv_vcpu->cpuid_cache.features_eax &
1291 HV_MSR_SYNTIMER_AVAILABLE;
1292 case HV_X64_MSR_EOI:
1293 case HV_X64_MSR_ICR:
1294 case HV_X64_MSR_TPR:
1295 case HV_X64_MSR_VP_ASSIST_PAGE:
1296 return hv_vcpu->cpuid_cache.features_eax &
1297 HV_MSR_APIC_ACCESS_AVAILABLE;
1298 case HV_X64_MSR_TSC_FREQUENCY:
1299 case HV_X64_MSR_APIC_FREQUENCY:
1300 return hv_vcpu->cpuid_cache.features_eax &
1301 HV_ACCESS_FREQUENCY_MSRS;
1302 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1303 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1304 case HV_X64_MSR_TSC_EMULATION_STATUS:
1305 return hv_vcpu->cpuid_cache.features_eax &
1306 HV_ACCESS_REENLIGHTENMENT;
1307 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
1308 return hv_vcpu->cpuid_cache.features_eax &
1309 HV_ACCESS_TSC_INVARIANT;
1310 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1311 case HV_X64_MSR_CRASH_CTL:
1312 return hv_vcpu->cpuid_cache.features_edx &
1313 HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
1314 case HV_X64_MSR_SYNDBG_OPTIONS:
1315 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
1316 return hv_vcpu->cpuid_cache.features_edx &
1317 HV_FEATURE_DEBUG_MSRS_AVAILABLE;
1318 default:
1319 break;
1320 }
1321
1322 return false;
1323 }
1324
1325 #define KVM_HV_WIN2016_GUEST_ID 0x1040a00003839
1326 #define KVM_HV_WIN2016_GUEST_ID_MASK (~GENMASK_ULL(23, 16)) /* mask out the service version */
1327
1328 /*
1329 * Hyper-V enabled Windows Server 2016 SMP VMs fail to boot in !XSAVES && XSAVEC
1330 * configuration.
1331 * Such configuration can result from, for example, AMD Erratum 1386 workaround.
1332 *
1333 * Print a notice so users aren't left wondering what's suddenly gone wrong.
1334 */
1335 static void __kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu)
1336 {
1337 struct kvm *kvm = vcpu->kvm;
1338 struct kvm_hv *hv = to_kvm_hv(kvm);
1339
1340 /* Check again under the hv_lock. */
1341 if (hv->xsaves_xsavec_checked)
1342 return;
1343
1344 if ((hv->hv_guest_os_id & KVM_HV_WIN2016_GUEST_ID_MASK) !=
1345 KVM_HV_WIN2016_GUEST_ID)
1346 return;
1347
1348 hv->xsaves_xsavec_checked = true;
1349
1350 /* UP configurations aren't affected */
1351 if (atomic_read(&kvm->online_vcpus) < 2)
1352 return;
1353
1354 if (guest_cpuid_has(vcpu, X86_FEATURE_XSAVES) ||
1355 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVEC))
1356 return;
1357
1358 pr_notice_ratelimited("Booting SMP Windows KVM VM with !XSAVES && XSAVEC. "
1359 "If it fails to boot try disabling XSAVEC in the VM config.\n");
1360 }
1361
1362 void kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu)
1363 {
1364 struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
1365
1366 if (!vcpu->arch.hyperv_enabled ||
1367 hv->xsaves_xsavec_checked)
1368 return;
1369
1370 mutex_lock(&hv->hv_lock);
1371 __kvm_hv_xsaves_xsavec_maybe_warn(vcpu);
1372 mutex_unlock(&hv->hv_lock);
1373 }
1374
1375 static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
1376 bool host)
1377 {
1378 struct kvm *kvm = vcpu->kvm;
1379 struct kvm_hv *hv = to_kvm_hv(kvm);
1380
1381 if (unlikely(!host && !hv_check_msr_access(to_hv_vcpu(vcpu), msr)))
1382 return 1;
1383
1384 switch (msr) {
1385 case HV_X64_MSR_GUEST_OS_ID:
1386 hv->hv_guest_os_id = data;
1387 /* setting guest os id to zero disables hypercall page */
1388 if (!hv->hv_guest_os_id)
1389 hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1390 break;
1391 case HV_X64_MSR_HYPERCALL: {
1392 u8 instructions[9];
1393 int i = 0;
1394 u64 addr;
1395
1396 /* if guest os id is not set hypercall should remain disabled */
1397 if (!hv->hv_guest_os_id)
1398 break;
1399 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1400 hv->hv_hypercall = data;
1401 break;
1402 }
1403
1404 /*
1405 * If Xen and Hyper-V hypercalls are both enabled, disambiguate
1406 * the same way Xen itself does, by setting the bit 31 of EAX
1407 * which is RsvdZ in the 32-bit Hyper-V hypercall ABI and just
1408 * going to be clobbered on 64-bit.
1409 */
1410 if (kvm_xen_hypercall_enabled(kvm)) {
1411 /* orl $0x80000000, %eax */
1412 instructions[i++] = 0x0d;
1413 instructions[i++] = 0x00;
1414 instructions[i++] = 0x00;
1415 instructions[i++] = 0x00;
1416 instructions[i++] = 0x80;
1417 }
1418
1419 /* vmcall/vmmcall */
1420 kvm_x86_call(patch_hypercall)(vcpu, instructions + i);
1421 i += 3;
1422
1423 /* ret */
1424 ((unsigned char *)instructions)[i++] = 0xc3;
1425
1426 addr = data & HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK;
1427 if (kvm_vcpu_write_guest(vcpu, addr, instructions, i))
1428 return 1;
1429 hv->hv_hypercall = data;
1430 break;
1431 }
1432 case HV_X64_MSR_REFERENCE_TSC:
1433 hv->hv_tsc_page = data;
1434 if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE) {
1435 if (!host)
1436 hv->hv_tsc_page_status = HV_TSC_PAGE_GUEST_CHANGED;
1437 else
1438 hv->hv_tsc_page_status = HV_TSC_PAGE_HOST_CHANGED;
1439 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1440 } else {
1441 hv->hv_tsc_page_status = HV_TSC_PAGE_UNSET;
1442 }
1443 break;
1444 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1445 return kvm_hv_msr_set_crash_data(kvm,
1446 msr - HV_X64_MSR_CRASH_P0,
1447 data);
1448 case HV_X64_MSR_CRASH_CTL:
1449 if (host)
1450 return kvm_hv_msr_set_crash_ctl(kvm, data);
1451
1452 if (data & HV_CRASH_CTL_CRASH_NOTIFY) {
1453 vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
1454 hv->hv_crash_param[0],
1455 hv->hv_crash_param[1],
1456 hv->hv_crash_param[2],
1457 hv->hv_crash_param[3],
1458 hv->hv_crash_param[4]);
1459
1460 /* Send notification about crash to user space */
1461 kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
1462 }
1463 break;
1464 case HV_X64_MSR_RESET:
1465 if (data == 1) {
1466 vcpu_debug(vcpu, "hyper-v reset requested\n");
1467 kvm_make_request(KVM_REQ_HV_RESET, vcpu);
1468 }
1469 break;
1470 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1471 hv->hv_reenlightenment_control = data;
1472 break;
1473 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1474 hv->hv_tsc_emulation_control = data;
1475 break;
1476 case HV_X64_MSR_TSC_EMULATION_STATUS:
1477 if (data && !host)
1478 return 1;
1479
1480 hv->hv_tsc_emulation_status = data;
1481 break;
1482 case HV_X64_MSR_TIME_REF_COUNT:
1483 /* read-only, but still ignore it if host-initiated */
1484 if (!host)
1485 return 1;
1486 break;
1487 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
1488 /* Only bit 0 is supported */
1489 if (data & ~HV_EXPOSE_INVARIANT_TSC)
1490 return 1;
1491
1492 /* The feature can't be disabled from the guest */
1493 if (!host && hv->hv_invtsc_control && !data)
1494 return 1;
1495
1496 hv->hv_invtsc_control = data;
1497 break;
1498 case HV_X64_MSR_SYNDBG_OPTIONS:
1499 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
1500 return syndbg_set_msr(vcpu, msr, data, host);
1501 default:
1502 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
1503 return 1;
1504 }
1505 return 0;
1506 }
1507
1508 /* Calculate cpu time spent by current task in 100ns units */
1509 static u64 current_task_runtime_100ns(void)
1510 {
1511 u64 utime, stime;
1512
1513 task_cputime_adjusted(current, &utime, &stime);
1514
1515 return div_u64(utime + stime, 100);
1516 }
1517
1518 static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
1519 {
1520 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
1521
1522 if (unlikely(!host && !hv_check_msr_access(hv_vcpu, msr)))
1523 return 1;
1524
1525 switch (msr) {
1526 case HV_X64_MSR_VP_INDEX: {
1527 struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
1528 u32 new_vp_index = (u32)data;
1529
1530 if (!host || new_vp_index >= KVM_MAX_VCPUS)
1531 return 1;
1532
1533 if (new_vp_index == hv_vcpu->vp_index)
1534 return 0;
1535
1536 /*
1537 * The VP index is initialized to vcpu_index by
1538 * kvm_hv_vcpu_postcreate so they initially match. Now the
1539 * VP index is changing, adjust num_mismatched_vp_indexes if
1540 * it now matches or no longer matches vcpu_idx.
1541 */
1542 if (hv_vcpu->vp_index == vcpu->vcpu_idx)
1543 atomic_inc(&hv->num_mismatched_vp_indexes);
1544 else if (new_vp_index == vcpu->vcpu_idx)
1545 atomic_dec(&hv->num_mismatched_vp_indexes);
1546
1547 hv_vcpu->vp_index = new_vp_index;
1548 break;
1549 }
1550 case HV_X64_MSR_VP_ASSIST_PAGE: {
1551 u64 gfn;
1552 unsigned long addr;
1553
1554 if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) {
1555 hv_vcpu->hv_vapic = data;
1556 if (kvm_lapic_set_pv_eoi(vcpu, 0, 0))
1557 return 1;
1558 break;
1559 }
1560 gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT;
1561 addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
1562 if (kvm_is_error_hva(addr))
1563 return 1;
1564
1565 /*
1566 * Clear apic_assist portion of struct hv_vp_assist_page
1567 * only, there can be valuable data in the rest which needs
1568 * to be preserved e.g. on migration.
1569 */
1570 if (__put_user(0, (u32 __user *)addr))
1571 return 1;
1572 hv_vcpu->hv_vapic = data;
1573 kvm_vcpu_mark_page_dirty(vcpu, gfn);
1574 if (kvm_lapic_set_pv_eoi(vcpu,
1575 gfn_to_gpa(gfn) | KVM_MSR_ENABLED,
1576 sizeof(struct hv_vp_assist_page)))
1577 return 1;
1578 break;
1579 }
1580 case HV_X64_MSR_EOI:
1581 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1582 case HV_X64_MSR_ICR:
1583 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1584 case HV_X64_MSR_TPR:
1585 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1586 case HV_X64_MSR_VP_RUNTIME:
1587 if (!host)
1588 return 1;
1589 hv_vcpu->runtime_offset = data - current_task_runtime_100ns();
1590 break;
1591 case HV_X64_MSR_SCONTROL:
1592 case HV_X64_MSR_SVERSION:
1593 case HV_X64_MSR_SIEFP:
1594 case HV_X64_MSR_SIMP:
1595 case HV_X64_MSR_EOM:
1596 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
1597 return synic_set_msr(to_hv_synic(vcpu), msr, data, host);
1598 case HV_X64_MSR_STIMER0_CONFIG:
1599 case HV_X64_MSR_STIMER1_CONFIG:
1600 case HV_X64_MSR_STIMER2_CONFIG:
1601 case HV_X64_MSR_STIMER3_CONFIG: {
1602 int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
1603
1604 return stimer_set_config(to_hv_stimer(vcpu, timer_index),
1605 data, host);
1606 }
1607 case HV_X64_MSR_STIMER0_COUNT:
1608 case HV_X64_MSR_STIMER1_COUNT:
1609 case HV_X64_MSR_STIMER2_COUNT:
1610 case HV_X64_MSR_STIMER3_COUNT: {
1611 int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
1612
1613 return stimer_set_count(to_hv_stimer(vcpu, timer_index),
1614 data, host);
1615 }
1616 case HV_X64_MSR_TSC_FREQUENCY:
1617 case HV_X64_MSR_APIC_FREQUENCY:
1618 /* read-only, but still ignore it if host-initiated */
1619 if (!host)
1620 return 1;
1621 break;
1622 default:
1623 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
1624 return 1;
1625 }
1626
1627 return 0;
1628 }
1629
1630 static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
1631 bool host)
1632 {
1633 u64 data = 0;
1634 struct kvm *kvm = vcpu->kvm;
1635 struct kvm_hv *hv = to_kvm_hv(kvm);
1636
1637 if (unlikely(!host && !hv_check_msr_access(to_hv_vcpu(vcpu), msr)))
1638 return 1;
1639
1640 switch (msr) {
1641 case HV_X64_MSR_GUEST_OS_ID:
1642 data = hv->hv_guest_os_id;
1643 break;
1644 case HV_X64_MSR_HYPERCALL:
1645 data = hv->hv_hypercall;
1646 break;
1647 case HV_X64_MSR_TIME_REF_COUNT:
1648 data = get_time_ref_counter(kvm);
1649 break;
1650 case HV_X64_MSR_REFERENCE_TSC:
1651 data = hv->hv_tsc_page;
1652 break;
1653 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1654 return kvm_hv_msr_get_crash_data(kvm,
1655 msr - HV_X64_MSR_CRASH_P0,
1656 pdata);
1657 case HV_X64_MSR_CRASH_CTL:
1658 return kvm_hv_msr_get_crash_ctl(kvm, pdata);
1659 case HV_X64_MSR_RESET:
1660 data = 0;
1661 break;
1662 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1663 data = hv->hv_reenlightenment_control;
1664 break;
1665 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1666 data = hv->hv_tsc_emulation_control;
1667 break;
1668 case HV_X64_MSR_TSC_EMULATION_STATUS:
1669 data = hv->hv_tsc_emulation_status;
1670 break;
1671 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
1672 data = hv->hv_invtsc_control;
1673 break;
1674 case HV_X64_MSR_SYNDBG_OPTIONS:
1675 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
1676 return syndbg_get_msr(vcpu, msr, pdata, host);
1677 default:
1678 kvm_pr_unimpl_rdmsr(vcpu, msr);
1679 return 1;
1680 }
1681
1682 *pdata = data;
1683 return 0;
1684 }
1685
1686 static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
1687 bool host)
1688 {
1689 u64 data = 0;
1690 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
1691
1692 if (unlikely(!host && !hv_check_msr_access(hv_vcpu, msr)))
1693 return 1;
1694
1695 switch (msr) {
1696 case HV_X64_MSR_VP_INDEX:
1697 data = hv_vcpu->vp_index;
1698 break;
1699 case HV_X64_MSR_EOI:
1700 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1701 case HV_X64_MSR_ICR:
1702 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1703 case HV_X64_MSR_TPR:
1704 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1705 case HV_X64_MSR_VP_ASSIST_PAGE:
1706 data = hv_vcpu->hv_vapic;
1707 break;
1708 case HV_X64_MSR_VP_RUNTIME:
1709 data = current_task_runtime_100ns() + hv_vcpu->runtime_offset;
1710 break;
1711 case HV_X64_MSR_SCONTROL:
1712 case HV_X64_MSR_SVERSION:
1713 case HV_X64_MSR_SIEFP:
1714 case HV_X64_MSR_SIMP:
1715 case HV_X64_MSR_EOM:
1716 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
1717 return synic_get_msr(to_hv_synic(vcpu), msr, pdata, host);
1718 case HV_X64_MSR_STIMER0_CONFIG:
1719 case HV_X64_MSR_STIMER1_CONFIG:
1720 case HV_X64_MSR_STIMER2_CONFIG:
1721 case HV_X64_MSR_STIMER3_CONFIG: {
1722 int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
1723
1724 return stimer_get_config(to_hv_stimer(vcpu, timer_index),
1725 pdata);
1726 }
1727 case HV_X64_MSR_STIMER0_COUNT:
1728 case HV_X64_MSR_STIMER1_COUNT:
1729 case HV_X64_MSR_STIMER2_COUNT:
1730 case HV_X64_MSR_STIMER3_COUNT: {
1731 int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
1732
1733 return stimer_get_count(to_hv_stimer(vcpu, timer_index),
1734 pdata);
1735 }
1736 case HV_X64_MSR_TSC_FREQUENCY:
1737 data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
1738 break;
1739 case HV_X64_MSR_APIC_FREQUENCY:
1740 data = div64_u64(1000000000ULL,
1741 vcpu->kvm->arch.apic_bus_cycle_ns);
1742 break;
1743 default:
1744 kvm_pr_unimpl_rdmsr(vcpu, msr);
1745 return 1;
1746 }
1747 *pdata = data;
1748 return 0;
1749 }
1750
1751 int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
1752 {
1753 struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
1754
1755 if (!host && !vcpu->arch.hyperv_enabled)
1756 return 1;
1757
1758 if (kvm_hv_vcpu_init(vcpu))
1759 return 1;
1760
1761 if (kvm_hv_msr_partition_wide(msr)) {
1762 int r;
1763
1764 mutex_lock(&hv->hv_lock);
1765 r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
1766 mutex_unlock(&hv->hv_lock);
1767 return r;
1768 } else
1769 return kvm_hv_set_msr(vcpu, msr, data, host);
1770 }
1771
1772 int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
1773 {
1774 struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
1775
1776 if (!host && !vcpu->arch.hyperv_enabled)
1777 return 1;
1778
1779 if (kvm_hv_vcpu_init(vcpu))
1780 return 1;
1781
1782 if (kvm_hv_msr_partition_wide(msr)) {
1783 int r;
1784
1785 mutex_lock(&hv->hv_lock);
1786 r = kvm_hv_get_msr_pw(vcpu, msr, pdata, host);
1787 mutex_unlock(&hv->hv_lock);
1788 return r;
1789 } else
1790 return kvm_hv_get_msr(vcpu, msr, pdata, host);
1791 }
1792
1793 static void sparse_set_to_vcpu_mask(struct kvm *kvm, u64 *sparse_banks,
1794 u64 valid_bank_mask, unsigned long *vcpu_mask)
1795 {
1796 struct kvm_hv *hv = to_kvm_hv(kvm);
1797 bool has_mismatch = atomic_read(&hv->num_mismatched_vp_indexes);
1798 u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
1799 struct kvm_vcpu *vcpu;
1800 int bank, sbank = 0;
1801 unsigned long i;
1802 u64 *bitmap;
1803
1804 BUILD_BUG_ON(sizeof(vp_bitmap) >
1805 sizeof(*vcpu_mask) * BITS_TO_LONGS(KVM_MAX_VCPUS));
1806
1807 /*
1808 * If vp_index == vcpu_idx for all vCPUs, fill vcpu_mask directly, else
1809 * fill a temporary buffer and manually test each vCPU's VP index.
1810 */
1811 if (likely(!has_mismatch))
1812 bitmap = (u64 *)vcpu_mask;
1813 else
1814 bitmap = vp_bitmap;
1815
1816 /*
1817 * Each set of 64 VPs is packed into sparse_banks, with valid_bank_mask
1818 * having a '1' for each bank that exists in sparse_banks. Sets must
1819 * be in ascending order, i.e. bank0..bankN.
1820 */
1821 memset(bitmap, 0, sizeof(vp_bitmap));
1822 for_each_set_bit(bank, (unsigned long *)&valid_bank_mask,
1823 KVM_HV_MAX_SPARSE_VCPU_SET_BITS)
1824 bitmap[bank] = sparse_banks[sbank++];
1825
1826 if (likely(!has_mismatch))
1827 return;
1828
1829 bitmap_zero(vcpu_mask, KVM_MAX_VCPUS);
1830 kvm_for_each_vcpu(i, vcpu, kvm) {
1831 if (test_bit(kvm_hv_get_vpindex(vcpu), (unsigned long *)vp_bitmap))
1832 __set_bit(i, vcpu_mask);
1833 }
1834 }
1835
1836 static bool hv_is_vp_in_sparse_set(u32 vp_id, u64 valid_bank_mask, u64 sparse_banks[])
1837 {
1838 int valid_bit_nr = vp_id / HV_VCPUS_PER_SPARSE_BANK;
1839 unsigned long sbank;
1840
1841 if (!test_bit(valid_bit_nr, (unsigned long *)&valid_bank_mask))
1842 return false;
1843
1844 /*
1845 * The index into the sparse bank is the number of preceding bits in
1846 * the valid mask. Optimize for VMs with <64 vCPUs by skipping the
1847 * fancy math if there can't possibly be preceding bits.
1848 */
1849 if (valid_bit_nr)
1850 sbank = hweight64(valid_bank_mask & GENMASK_ULL(valid_bit_nr - 1, 0));
1851 else
1852 sbank = 0;
1853
1854 return test_bit(vp_id % HV_VCPUS_PER_SPARSE_BANK,
1855 (unsigned long *)&sparse_banks[sbank]);
1856 }
1857
1858 struct kvm_hv_hcall {
1859 /* Hypercall input data */
1860 u64 param;
1861 u64 ingpa;
1862 u64 outgpa;
1863 u16 code;
1864 u16 var_cnt;
1865 u16 rep_cnt;
1866 u16 rep_idx;
1867 bool fast;
1868 bool rep;
1869 sse128_t xmm[HV_HYPERCALL_MAX_XMM_REGISTERS];
1870
1871 /*
1872 * Current read offset when KVM reads hypercall input data gradually,
1873 * either offset in bytes from 'ingpa' for regular hypercalls or the
1874 * number of already consumed 'XMM halves' for 'fast' hypercalls.
1875 */
1876 union {
1877 gpa_t data_offset;
1878 int consumed_xmm_halves;
1879 };
1880 };
1881
1882
1883 static int kvm_hv_get_hc_data(struct kvm *kvm, struct kvm_hv_hcall *hc,
1884 u16 orig_cnt, u16 cnt_cap, u64 *data)
1885 {
1886 /*
1887 * Preserve the original count when ignoring entries via a "cap", KVM
1888 * still needs to validate the guest input (though the non-XMM path
1889 * punts on the checks).
1890 */
1891 u16 cnt = min(orig_cnt, cnt_cap);
1892 int i, j;
1893
1894 if (hc->fast) {
1895 /*
1896 * Each XMM holds two sparse banks, but do not count halves that
1897 * have already been consumed for hypercall parameters.
1898 */
1899 if (orig_cnt > 2 * HV_HYPERCALL_MAX_XMM_REGISTERS - hc->consumed_xmm_halves)
1900 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1901
1902 for (i = 0; i < cnt; i++) {
1903 j = i + hc->consumed_xmm_halves;
1904 if (j % 2)
1905 data[i] = sse128_hi(hc->xmm[j / 2]);
1906 else
1907 data[i] = sse128_lo(hc->xmm[j / 2]);
1908 }
1909 return 0;
1910 }
1911
1912 return kvm_read_guest(kvm, hc->ingpa + hc->data_offset, data,
1913 cnt * sizeof(*data));
1914 }
1915
1916 static u64 kvm_get_sparse_vp_set(struct kvm *kvm, struct kvm_hv_hcall *hc,
1917 u64 *sparse_banks)
1918 {
1919 if (hc->var_cnt > HV_MAX_SPARSE_VCPU_BANKS)
1920 return -EINVAL;
1921
1922 /* Cap var_cnt to ignore banks that cannot contain a legal VP index. */
1923 return kvm_hv_get_hc_data(kvm, hc, hc->var_cnt, KVM_HV_MAX_SPARSE_VCPU_SET_BITS,
1924 sparse_banks);
1925 }
1926
1927 static int kvm_hv_get_tlb_flush_entries(struct kvm *kvm, struct kvm_hv_hcall *hc, u64 entries[])
1928 {
1929 return kvm_hv_get_hc_data(kvm, hc, hc->rep_cnt, hc->rep_cnt, entries);
1930 }
1931
1932 static void hv_tlb_flush_enqueue(struct kvm_vcpu *vcpu,
1933 struct kvm_vcpu_hv_tlb_flush_fifo *tlb_flush_fifo,
1934 u64 *entries, int count)
1935 {
1936 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
1937 u64 flush_all_entry = KVM_HV_TLB_FLUSHALL_ENTRY;
1938
1939 if (!hv_vcpu)
1940 return;
1941
1942 spin_lock(&tlb_flush_fifo->write_lock);
1943
1944 /*
1945 * All entries should fit on the fifo leaving one free for 'flush all'
1946 * entry in case another request comes in. In case there's not enough
1947 * space, just put 'flush all' entry there.
1948 */
1949 if (count && entries && count < kfifo_avail(&tlb_flush_fifo->entries)) {
1950 WARN_ON(kfifo_in(&tlb_flush_fifo->entries, entries, count) != count);
1951 goto out_unlock;
1952 }
1953
1954 /*
1955 * Note: full fifo always contains 'flush all' entry, no need to check the
1956 * return value.
1957 */
1958 kfifo_in(&tlb_flush_fifo->entries, &flush_all_entry, 1);
1959
1960 out_unlock:
1961 spin_unlock(&tlb_flush_fifo->write_lock);
1962 }
1963
1964 int kvm_hv_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
1965 {
1966 struct kvm_vcpu_hv_tlb_flush_fifo *tlb_flush_fifo;
1967 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
1968 u64 entries[KVM_HV_TLB_FLUSH_FIFO_SIZE];
1969 int i, j, count;
1970 gva_t gva;
1971
1972 if (!tdp_enabled || !hv_vcpu)
1973 return -EINVAL;
1974
1975 tlb_flush_fifo = kvm_hv_get_tlb_flush_fifo(vcpu, is_guest_mode(vcpu));
1976
1977 count = kfifo_out(&tlb_flush_fifo->entries, entries, KVM_HV_TLB_FLUSH_FIFO_SIZE);
1978
1979 for (i = 0; i < count; i++) {
1980 if (entries[i] == KVM_HV_TLB_FLUSHALL_ENTRY)
1981 goto out_flush_all;
1982
1983 /*
1984 * Lower 12 bits of 'address' encode the number of additional
1985 * pages to flush.
1986 */
1987 gva = entries[i] & PAGE_MASK;
1988 for (j = 0; j < (entries[i] & ~PAGE_MASK) + 1; j++)
1989 kvm_x86_call(flush_tlb_gva)(vcpu, gva + j * PAGE_SIZE);
1990
1991 ++vcpu->stat.tlb_flush;
1992 }
1993 return 0;
1994
1995 out_flush_all:
1996 kfifo_reset_out(&tlb_flush_fifo->entries);
1997
1998 /* Fall back to full flush. */
1999 return -ENOSPC;
2000 }
2001
2002 static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc)
2003 {
2004 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
2005 u64 *sparse_banks = hv_vcpu->sparse_banks;
2006 struct kvm *kvm = vcpu->kvm;
2007 struct hv_tlb_flush_ex flush_ex;
2008 struct hv_tlb_flush flush;
2009 DECLARE_BITMAP(vcpu_mask, KVM_MAX_VCPUS);
2010 struct kvm_vcpu_hv_tlb_flush_fifo *tlb_flush_fifo;
2011 /*
2012 * Normally, there can be no more than 'KVM_HV_TLB_FLUSH_FIFO_SIZE'
2013 * entries on the TLB flush fifo. The last entry, however, needs to be
2014 * always left free for 'flush all' entry which gets placed when
2015 * there is not enough space to put all the requested entries.
2016 */
2017 u64 __tlb_flush_entries[KVM_HV_TLB_FLUSH_FIFO_SIZE - 1];
2018 u64 *tlb_flush_entries;
2019 u64 valid_bank_mask;
2020 struct kvm_vcpu *v;
2021 unsigned long i;
2022 bool all_cpus;
2023
2024 /*
2025 * The Hyper-V TLFS doesn't allow more than HV_MAX_SPARSE_VCPU_BANKS
2026 * sparse banks. Fail the build if KVM's max allowed number of
2027 * vCPUs (>4096) exceeds this limit.
2028 */
2029 BUILD_BUG_ON(KVM_HV_MAX_SPARSE_VCPU_SET_BITS > HV_MAX_SPARSE_VCPU_BANKS);
2030
2031 /*
2032 * 'Slow' hypercall's first parameter is the address in guest's memory
2033 * where hypercall parameters are placed. This is either a GPA or a
2034 * nested GPA when KVM is handling the call from L2 ('direct' TLB
2035 * flush). Translate the address here so the memory can be uniformly
2036 * read with kvm_read_guest().
2037 */
2038 if (!hc->fast && is_guest_mode(vcpu)) {
2039 hc->ingpa = translate_nested_gpa(vcpu, hc->ingpa, 0, NULL);
2040 if (unlikely(hc->ingpa == INVALID_GPA))
2041 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2042 }
2043
2044 if (hc->code == HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST ||
2045 hc->code == HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE) {
2046 if (hc->fast) {
2047 flush.address_space = hc->ingpa;
2048 flush.flags = hc->outgpa;
2049 flush.processor_mask = sse128_lo(hc->xmm[0]);
2050 hc->consumed_xmm_halves = 1;
2051 } else {
2052 if (unlikely(kvm_read_guest(kvm, hc->ingpa,
2053 &flush, sizeof(flush))))
2054 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2055 hc->data_offset = sizeof(flush);
2056 }
2057
2058 trace_kvm_hv_flush_tlb(flush.processor_mask,
2059 flush.address_space, flush.flags,
2060 is_guest_mode(vcpu));
2061
2062 valid_bank_mask = BIT_ULL(0);
2063 sparse_banks[0] = flush.processor_mask;
2064
2065 /*
2066 * Work around possible WS2012 bug: it sends hypercalls
2067 * with processor_mask = 0x0 and HV_FLUSH_ALL_PROCESSORS clear,
2068 * while also expecting us to flush something and crashing if
2069 * we don't. Let's treat processor_mask == 0 same as
2070 * HV_FLUSH_ALL_PROCESSORS.
2071 */
2072 all_cpus = (flush.flags & HV_FLUSH_ALL_PROCESSORS) ||
2073 flush.processor_mask == 0;
2074 } else {
2075 if (hc->fast) {
2076 flush_ex.address_space = hc->ingpa;
2077 flush_ex.flags = hc->outgpa;
2078 memcpy(&flush_ex.hv_vp_set,
2079 &hc->xmm[0], sizeof(hc->xmm[0]));
2080 hc->consumed_xmm_halves = 2;
2081 } else {
2082 if (unlikely(kvm_read_guest(kvm, hc->ingpa, &flush_ex,
2083 sizeof(flush_ex))))
2084 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2085 hc->data_offset = sizeof(flush_ex);
2086 }
2087
2088 trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask,
2089 flush_ex.hv_vp_set.format,
2090 flush_ex.address_space,
2091 flush_ex.flags, is_guest_mode(vcpu));
2092
2093 valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask;
2094 all_cpus = flush_ex.hv_vp_set.format !=
2095 HV_GENERIC_SET_SPARSE_4K;
2096
2097 if (hc->var_cnt != hweight64(valid_bank_mask))
2098 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2099
2100 if (!all_cpus) {
2101 if (!hc->var_cnt)
2102 goto ret_success;
2103
2104 if (kvm_get_sparse_vp_set(kvm, hc, sparse_banks))
2105 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2106 }
2107
2108 /*
2109 * Hyper-V TLFS doesn't explicitly forbid non-empty sparse vCPU
2110 * banks (and, thus, non-zero 'var_cnt') for the 'all vCPUs'
2111 * case (HV_GENERIC_SET_ALL). Always adjust data_offset and
2112 * consumed_xmm_halves to make sure TLB flush entries are read
2113 * from the correct offset.
2114 */
2115 if (hc->fast)
2116 hc->consumed_xmm_halves += hc->var_cnt;
2117 else
2118 hc->data_offset += hc->var_cnt * sizeof(sparse_banks[0]);
2119 }
2120
2121 if (hc->code == HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE ||
2122 hc->code == HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX ||
2123 hc->rep_cnt > ARRAY_SIZE(__tlb_flush_entries)) {
2124 tlb_flush_entries = NULL;
2125 } else {
2126 if (kvm_hv_get_tlb_flush_entries(kvm, hc, __tlb_flush_entries))
2127 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2128 tlb_flush_entries = __tlb_flush_entries;
2129 }
2130
2131 /*
2132 * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we can't
2133 * analyze it here, flush TLB regardless of the specified address space.
2134 */
2135 if (all_cpus && !is_guest_mode(vcpu)) {
2136 kvm_for_each_vcpu(i, v, kvm) {
2137 tlb_flush_fifo = kvm_hv_get_tlb_flush_fifo(v, false);
2138 hv_tlb_flush_enqueue(v, tlb_flush_fifo,
2139 tlb_flush_entries, hc->rep_cnt);
2140 }
2141
2142 kvm_make_all_cpus_request(kvm, KVM_REQ_HV_TLB_FLUSH);
2143 } else if (!is_guest_mode(vcpu)) {
2144 sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask, vcpu_mask);
2145
2146 for_each_set_bit(i, vcpu_mask, KVM_MAX_VCPUS) {
2147 v = kvm_get_vcpu(kvm, i);
2148 if (!v)
2149 continue;
2150 tlb_flush_fifo = kvm_hv_get_tlb_flush_fifo(v, false);
2151 hv_tlb_flush_enqueue(v, tlb_flush_fifo,
2152 tlb_flush_entries, hc->rep_cnt);
2153 }
2154
2155 kvm_make_vcpus_request_mask(kvm, KVM_REQ_HV_TLB_FLUSH, vcpu_mask);
2156 } else {
2157 struct kvm_vcpu_hv *hv_v;
2158
2159 bitmap_zero(vcpu_mask, KVM_MAX_VCPUS);
2160
2161 kvm_for_each_vcpu(i, v, kvm) {
2162 hv_v = to_hv_vcpu(v);
2163
2164 /*
2165 * The following check races with nested vCPUs entering/exiting
2166 * and/or migrating between L1's vCPUs, however the only case when
2167 * KVM *must* flush the TLB is when the target L2 vCPU keeps
2168 * running on the same L1 vCPU from the moment of the request until
2169 * kvm_hv_flush_tlb() returns. TLB is fully flushed in all other
2170 * cases, e.g. when the target L2 vCPU migrates to a different L1
2171 * vCPU or when the corresponding L1 vCPU temporary switches to a
2172 * different L2 vCPU while the request is being processed.
2173 */
2174 if (!hv_v || hv_v->nested.vm_id != hv_vcpu->nested.vm_id)
2175 continue;
2176
2177 if (!all_cpus &&
2178 !hv_is_vp_in_sparse_set(hv_v->nested.vp_id, valid_bank_mask,
2179 sparse_banks))
2180 continue;
2181
2182 __set_bit(i, vcpu_mask);
2183 tlb_flush_fifo = kvm_hv_get_tlb_flush_fifo(v, true);
2184 hv_tlb_flush_enqueue(v, tlb_flush_fifo,
2185 tlb_flush_entries, hc->rep_cnt);
2186 }
2187
2188 kvm_make_vcpus_request_mask(kvm, KVM_REQ_HV_TLB_FLUSH, vcpu_mask);
2189 }
2190
2191 ret_success:
2192 /* We always do full TLB flush, set 'Reps completed' = 'Rep Count' */
2193 return (u64)HV_STATUS_SUCCESS |
2194 ((u64)hc->rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
2195 }
2196
2197 static void kvm_hv_send_ipi_to_many(struct kvm *kvm, u32 vector,
2198 u64 *sparse_banks, u64 valid_bank_mask)
2199 {
2200 struct kvm_lapic_irq irq = {
2201 .delivery_mode = APIC_DM_FIXED,
2202 .vector = vector
2203 };
2204 struct kvm_vcpu *vcpu;
2205 unsigned long i;
2206
2207 kvm_for_each_vcpu(i, vcpu, kvm) {
2208 if (sparse_banks &&
2209 !hv_is_vp_in_sparse_set(kvm_hv_get_vpindex(vcpu),
2210 valid_bank_mask, sparse_banks))
2211 continue;
2212
2213 /* We fail only when APIC is disabled */
2214 kvm_apic_set_irq(vcpu, &irq, NULL);
2215 }
2216 }
2217
2218 static u64 kvm_hv_send_ipi(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc)
2219 {
2220 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
2221 u64 *sparse_banks = hv_vcpu->sparse_banks;
2222 struct kvm *kvm = vcpu->kvm;
2223 struct hv_send_ipi_ex send_ipi_ex;
2224 struct hv_send_ipi send_ipi;
2225 u64 valid_bank_mask;
2226 u32 vector;
2227 bool all_cpus;
2228
2229 if (hc->code == HVCALL_SEND_IPI) {
2230 if (!hc->fast) {
2231 if (unlikely(kvm_read_guest(kvm, hc->ingpa, &send_ipi,
2232 sizeof(send_ipi))))
2233 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2234 sparse_banks[0] = send_ipi.cpu_mask;
2235 vector = send_ipi.vector;
2236 } else {
2237 /* 'reserved' part of hv_send_ipi should be 0 */
2238 if (unlikely(hc->ingpa >> 32 != 0))
2239 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2240 sparse_banks[0] = hc->outgpa;
2241 vector = (u32)hc->ingpa;
2242 }
2243 all_cpus = false;
2244 valid_bank_mask = BIT_ULL(0);
2245
2246 trace_kvm_hv_send_ipi(vector, sparse_banks[0]);
2247 } else {
2248 if (!hc->fast) {
2249 if (unlikely(kvm_read_guest(kvm, hc->ingpa, &send_ipi_ex,
2250 sizeof(send_ipi_ex))))
2251 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2252 } else {
2253 send_ipi_ex.vector = (u32)hc->ingpa;
2254 send_ipi_ex.vp_set.format = hc->outgpa;
2255 send_ipi_ex.vp_set.valid_bank_mask = sse128_lo(hc->xmm[0]);
2256 }
2257
2258 trace_kvm_hv_send_ipi_ex(send_ipi_ex.vector,
2259 send_ipi_ex.vp_set.format,
2260 send_ipi_ex.vp_set.valid_bank_mask);
2261
2262 vector = send_ipi_ex.vector;
2263 valid_bank_mask = send_ipi_ex.vp_set.valid_bank_mask;
2264 all_cpus = send_ipi_ex.vp_set.format == HV_GENERIC_SET_ALL;
2265
2266 if (hc->var_cnt != hweight64(valid_bank_mask))
2267 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2268
2269 if (all_cpus)
2270 goto check_and_send_ipi;
2271
2272 if (!hc->var_cnt)
2273 goto ret_success;
2274
2275 if (!hc->fast)
2276 hc->data_offset = offsetof(struct hv_send_ipi_ex,
2277 vp_set.bank_contents);
2278 else
2279 hc->consumed_xmm_halves = 1;
2280
2281 if (kvm_get_sparse_vp_set(kvm, hc, sparse_banks))
2282 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2283 }
2284
2285 check_and_send_ipi:
2286 if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR))
2287 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2288
2289 if (all_cpus)
2290 kvm_hv_send_ipi_to_many(kvm, vector, NULL, 0);
2291 else
2292 kvm_hv_send_ipi_to_many(kvm, vector, sparse_banks, valid_bank_mask);
2293
2294 ret_success:
2295 return HV_STATUS_SUCCESS;
2296 }
2297
2298 void kvm_hv_set_cpuid(struct kvm_vcpu *vcpu, bool hyperv_enabled)
2299 {
2300 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
2301 struct kvm_cpuid_entry2 *entry;
2302
2303 vcpu->arch.hyperv_enabled = hyperv_enabled;
2304
2305 if (!hv_vcpu) {
2306 /*
2307 * KVM should have already allocated kvm_vcpu_hv if Hyper-V is
2308 * enabled in CPUID.
2309 */
2310 WARN_ON_ONCE(vcpu->arch.hyperv_enabled);
2311 return;
2312 }
2313
2314 memset(&hv_vcpu->cpuid_cache, 0, sizeof(hv_vcpu->cpuid_cache));
2315
2316 if (!vcpu->arch.hyperv_enabled)
2317 return;
2318
2319 entry = kvm_find_cpuid_entry(vcpu, HYPERV_CPUID_FEATURES);
2320 if (entry) {
2321 hv_vcpu->cpuid_cache.features_eax = entry->eax;
2322 hv_vcpu->cpuid_cache.features_ebx = entry->ebx;
2323 hv_vcpu->cpuid_cache.features_edx = entry->edx;
2324 }
2325
2326 entry = kvm_find_cpuid_entry(vcpu, HYPERV_CPUID_ENLIGHTMENT_INFO);
2327 if (entry) {
2328 hv_vcpu->cpuid_cache.enlightenments_eax = entry->eax;
2329 hv_vcpu->cpuid_cache.enlightenments_ebx = entry->ebx;
2330 }
2331
2332 entry = kvm_find_cpuid_entry(vcpu, HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES);
2333 if (entry)
2334 hv_vcpu->cpuid_cache.syndbg_cap_eax = entry->eax;
2335
2336 entry = kvm_find_cpuid_entry(vcpu, HYPERV_CPUID_NESTED_FEATURES);
2337 if (entry) {
2338 hv_vcpu->cpuid_cache.nested_eax = entry->eax;
2339 hv_vcpu->cpuid_cache.nested_ebx = entry->ebx;
2340 }
2341 }
2342
2343 int kvm_hv_set_enforce_cpuid(struct kvm_vcpu *vcpu, bool enforce)
2344 {
2345 struct kvm_vcpu_hv *hv_vcpu;
2346 int ret = 0;
2347
2348 if (!to_hv_vcpu(vcpu)) {
2349 if (enforce) {
2350 ret = kvm_hv_vcpu_init(vcpu);
2351 if (ret)
2352 return ret;
2353 } else {
2354 return 0;
2355 }
2356 }
2357
2358 hv_vcpu = to_hv_vcpu(vcpu);
2359 hv_vcpu->enforce_cpuid = enforce;
2360
2361 return ret;
2362 }
2363
2364 static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result)
2365 {
2366 bool longmode;
2367
2368 longmode = is_64_bit_hypercall(vcpu);
2369 if (longmode)
2370 kvm_rax_write(vcpu, result);
2371 else {
2372 kvm_rdx_write(vcpu, result >> 32);
2373 kvm_rax_write(vcpu, result & 0xffffffff);
2374 }
2375 }
2376
2377 static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result)
2378 {
2379 u32 tlb_lock_count = 0;
2380 int ret;
2381
2382 if (hv_result_success(result) && is_guest_mode(vcpu) &&
2383 kvm_hv_is_tlb_flush_hcall(vcpu) &&
2384 kvm_read_guest(vcpu->kvm, to_hv_vcpu(vcpu)->nested.pa_page_gpa,
2385 &tlb_lock_count, sizeof(tlb_lock_count)))
2386 result = HV_STATUS_INVALID_HYPERCALL_INPUT;
2387
2388 trace_kvm_hv_hypercall_done(result);
2389 kvm_hv_hypercall_set_result(vcpu, result);
2390 ++vcpu->stat.hypercalls;
2391
2392 ret = kvm_skip_emulated_instruction(vcpu);
2393
2394 if (tlb_lock_count)
2395 kvm_x86_ops.nested_ops->hv_inject_synthetic_vmexit_post_tlb_flush(vcpu);
2396
2397 return ret;
2398 }
2399
2400 static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu)
2401 {
2402 return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result);
2403 }
2404
2405 static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc)
2406 {
2407 struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
2408 struct eventfd_ctx *eventfd;
2409
2410 if (unlikely(!hc->fast)) {
2411 int ret;
2412 gpa_t gpa = hc->ingpa;
2413
2414 if ((gpa & (__alignof__(hc->ingpa) - 1)) ||
2415 offset_in_page(gpa) + sizeof(hc->ingpa) > PAGE_SIZE)
2416 return HV_STATUS_INVALID_ALIGNMENT;
2417
2418 ret = kvm_vcpu_read_guest(vcpu, gpa,
2419 &hc->ingpa, sizeof(hc->ingpa));
2420 if (ret < 0)
2421 return HV_STATUS_INVALID_ALIGNMENT;
2422 }
2423
2424 /*
2425 * Per spec, bits 32-47 contain the extra "flag number". However, we
2426 * have no use for it, and in all known usecases it is zero, so just
2427 * report lookup failure if it isn't.
2428 */
2429 if (hc->ingpa & 0xffff00000000ULL)
2430 return HV_STATUS_INVALID_PORT_ID;
2431 /* remaining bits are reserved-zero */
2432 if (hc->ingpa & ~KVM_HYPERV_CONN_ID_MASK)
2433 return HV_STATUS_INVALID_HYPERCALL_INPUT;
2434
2435 /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */
2436 rcu_read_lock();
2437 eventfd = idr_find(&hv->conn_to_evt, hc->ingpa);
2438 rcu_read_unlock();
2439 if (!eventfd)
2440 return HV_STATUS_INVALID_PORT_ID;
2441
2442 eventfd_signal(eventfd);
2443 return HV_STATUS_SUCCESS;
2444 }
2445
2446 static bool is_xmm_fast_hypercall(struct kvm_hv_hcall *hc)
2447 {
2448 switch (hc->code) {
2449 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
2450 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
2451 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
2452 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
2453 case HVCALL_SEND_IPI_EX:
2454 return true;
2455 }
2456
2457 return false;
2458 }
2459
2460 static void kvm_hv_hypercall_read_xmm(struct kvm_hv_hcall *hc)
2461 {
2462 int reg;
2463
2464 kvm_fpu_get();
2465 for (reg = 0; reg < HV_HYPERCALL_MAX_XMM_REGISTERS; reg++)
2466 _kvm_read_sse_reg(reg, &hc->xmm[reg]);
2467 kvm_fpu_put();
2468 }
2469
2470 static bool hv_check_hypercall_access(struct kvm_vcpu_hv *hv_vcpu, u16 code)
2471 {
2472 if (!hv_vcpu->enforce_cpuid)
2473 return true;
2474
2475 switch (code) {
2476 case HVCALL_NOTIFY_LONG_SPIN_WAIT:
2477 return hv_vcpu->cpuid_cache.enlightenments_ebx &&
2478 hv_vcpu->cpuid_cache.enlightenments_ebx != U32_MAX;
2479 case HVCALL_POST_MESSAGE:
2480 return hv_vcpu->cpuid_cache.features_ebx & HV_POST_MESSAGES;
2481 case HVCALL_SIGNAL_EVENT:
2482 return hv_vcpu->cpuid_cache.features_ebx & HV_SIGNAL_EVENTS;
2483 case HVCALL_POST_DEBUG_DATA:
2484 case HVCALL_RETRIEVE_DEBUG_DATA:
2485 case HVCALL_RESET_DEBUG_SESSION:
2486 /*
2487 * Return 'true' when SynDBG is disabled so the resulting code
2488 * will be HV_STATUS_INVALID_HYPERCALL_CODE.
2489 */
2490 return !kvm_hv_is_syndbg_enabled(hv_vcpu->vcpu) ||
2491 hv_vcpu->cpuid_cache.features_ebx & HV_DEBUGGING;
2492 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
2493 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
2494 if (!(hv_vcpu->cpuid_cache.enlightenments_eax &
2495 HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED))
2496 return false;
2497 fallthrough;
2498 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
2499 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
2500 return hv_vcpu->cpuid_cache.enlightenments_eax &
2501 HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
2502 case HVCALL_SEND_IPI_EX:
2503 if (!(hv_vcpu->cpuid_cache.enlightenments_eax &
2504 HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED))
2505 return false;
2506 fallthrough;
2507 case HVCALL_SEND_IPI:
2508 return hv_vcpu->cpuid_cache.enlightenments_eax &
2509 HV_X64_CLUSTER_IPI_RECOMMENDED;
2510 case HV_EXT_CALL_QUERY_CAPABILITIES ... HV_EXT_CALL_MAX:
2511 return hv_vcpu->cpuid_cache.features_ebx &
2512 HV_ENABLE_EXTENDED_HYPERCALLS;
2513 default:
2514 break;
2515 }
2516
2517 return true;
2518 }
2519
2520 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
2521 {
2522 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
2523 struct kvm_hv_hcall hc;
2524 u64 ret = HV_STATUS_SUCCESS;
2525
2526 /*
2527 * hypercall generates UD from non zero cpl and real mode
2528 * per HYPER-V spec
2529 */
2530 if (kvm_x86_call(get_cpl)(vcpu) != 0 || !is_protmode(vcpu)) {
2531 kvm_queue_exception(vcpu, UD_VECTOR);
2532 return 1;
2533 }
2534
2535 #ifdef CONFIG_X86_64
2536 if (is_64_bit_hypercall(vcpu)) {
2537 hc.param = kvm_rcx_read(vcpu);
2538 hc.ingpa = kvm_rdx_read(vcpu);
2539 hc.outgpa = kvm_r8_read(vcpu);
2540 } else
2541 #endif
2542 {
2543 hc.param = ((u64)kvm_rdx_read(vcpu) << 32) |
2544 (kvm_rax_read(vcpu) & 0xffffffff);
2545 hc.ingpa = ((u64)kvm_rbx_read(vcpu) << 32) |
2546 (kvm_rcx_read(vcpu) & 0xffffffff);
2547 hc.outgpa = ((u64)kvm_rdi_read(vcpu) << 32) |
2548 (kvm_rsi_read(vcpu) & 0xffffffff);
2549 }
2550
2551 hc.code = hc.param & 0xffff;
2552 hc.var_cnt = (hc.param & HV_HYPERCALL_VARHEAD_MASK) >> HV_HYPERCALL_VARHEAD_OFFSET;
2553 hc.fast = !!(hc.param & HV_HYPERCALL_FAST_BIT);
2554 hc.rep_cnt = (hc.param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff;
2555 hc.rep_idx = (hc.param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff;
2556 hc.rep = !!(hc.rep_cnt || hc.rep_idx);
2557
2558 trace_kvm_hv_hypercall(hc.code, hc.fast, hc.var_cnt, hc.rep_cnt,
2559 hc.rep_idx, hc.ingpa, hc.outgpa);
2560
2561 if (unlikely(!hv_check_hypercall_access(hv_vcpu, hc.code))) {
2562 ret = HV_STATUS_ACCESS_DENIED;
2563 goto hypercall_complete;
2564 }
2565
2566 if (unlikely(hc.param & HV_HYPERCALL_RSVD_MASK)) {
2567 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2568 goto hypercall_complete;
2569 }
2570
2571 if (hc.fast && is_xmm_fast_hypercall(&hc)) {
2572 if (unlikely(hv_vcpu->enforce_cpuid &&
2573 !(hv_vcpu->cpuid_cache.features_edx &
2574 HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE))) {
2575 kvm_queue_exception(vcpu, UD_VECTOR);
2576 return 1;
2577 }
2578
2579 kvm_hv_hypercall_read_xmm(&hc);
2580 }
2581
2582 switch (hc.code) {
2583 case HVCALL_NOTIFY_LONG_SPIN_WAIT:
2584 if (unlikely(hc.rep || hc.var_cnt)) {
2585 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2586 break;
2587 }
2588 kvm_vcpu_on_spin(vcpu, true);
2589 break;
2590 case HVCALL_SIGNAL_EVENT:
2591 if (unlikely(hc.rep || hc.var_cnt)) {
2592 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2593 break;
2594 }
2595 ret = kvm_hvcall_signal_event(vcpu, &hc);
2596 if (ret != HV_STATUS_INVALID_PORT_ID)
2597 break;
2598 fallthrough; /* maybe userspace knows this conn_id */
2599 case HVCALL_POST_MESSAGE:
2600 /* don't bother userspace if it has no way to handle it */
2601 if (unlikely(hc.rep || hc.var_cnt || !to_hv_synic(vcpu)->active)) {
2602 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2603 break;
2604 }
2605 goto hypercall_userspace_exit;
2606 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
2607 if (unlikely(hc.var_cnt)) {
2608 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2609 break;
2610 }
2611 fallthrough;
2612 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
2613 if (unlikely(!hc.rep_cnt || hc.rep_idx)) {
2614 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2615 break;
2616 }
2617 ret = kvm_hv_flush_tlb(vcpu, &hc);
2618 break;
2619 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
2620 if (unlikely(hc.var_cnt)) {
2621 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2622 break;
2623 }
2624 fallthrough;
2625 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
2626 if (unlikely(hc.rep)) {
2627 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2628 break;
2629 }
2630 ret = kvm_hv_flush_tlb(vcpu, &hc);
2631 break;
2632 case HVCALL_SEND_IPI:
2633 if (unlikely(hc.var_cnt)) {
2634 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2635 break;
2636 }
2637 fallthrough;
2638 case HVCALL_SEND_IPI_EX:
2639 if (unlikely(hc.rep)) {
2640 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
2641 break;
2642 }
2643 ret = kvm_hv_send_ipi(vcpu, &hc);
2644 break;
2645 case HVCALL_POST_DEBUG_DATA:
2646 case HVCALL_RETRIEVE_DEBUG_DATA:
2647 if (unlikely(hc.fast)) {
2648 ret = HV_STATUS_INVALID_PARAMETER;
2649 break;
2650 }
2651 fallthrough;
2652 case HVCALL_RESET_DEBUG_SESSION: {
2653 struct kvm_hv_syndbg *syndbg = to_hv_syndbg(vcpu);
2654
2655 if (!kvm_hv_is_syndbg_enabled(vcpu)) {
2656 ret = HV_STATUS_INVALID_HYPERCALL_CODE;
2657 break;
2658 }
2659
2660 if (!(syndbg->options & HV_X64_SYNDBG_OPTION_USE_HCALLS)) {
2661 ret = HV_STATUS_OPERATION_DENIED;
2662 break;
2663 }
2664 goto hypercall_userspace_exit;
2665 }
2666 case HV_EXT_CALL_QUERY_CAPABILITIES ... HV_EXT_CALL_MAX:
2667 if (unlikely(hc.fast)) {
2668 ret = HV_STATUS_INVALID_PARAMETER;
2669 break;
2670 }
2671 goto hypercall_userspace_exit;
2672 default:
2673 ret = HV_STATUS_INVALID_HYPERCALL_CODE;
2674 break;
2675 }
2676
2677 hypercall_complete:
2678 return kvm_hv_hypercall_complete(vcpu, ret);
2679
2680 hypercall_userspace_exit:
2681 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
2682 vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL;
2683 vcpu->run->hyperv.u.hcall.input = hc.param;
2684 vcpu->run->hyperv.u.hcall.params[0] = hc.ingpa;
2685 vcpu->run->hyperv.u.hcall.params[1] = hc.outgpa;
2686 vcpu->arch.complete_userspace_io = kvm_hv_hypercall_complete_userspace;
2687 return 0;
2688 }
2689
2690 void kvm_hv_init_vm(struct kvm *kvm)
2691 {
2692 struct kvm_hv *hv = to_kvm_hv(kvm);
2693
2694 mutex_init(&hv->hv_lock);
2695 idr_init(&hv->conn_to_evt);
2696 }
2697
2698 void kvm_hv_destroy_vm(struct kvm *kvm)
2699 {
2700 struct kvm_hv *hv = to_kvm_hv(kvm);
2701 struct eventfd_ctx *eventfd;
2702 int i;
2703
2704 idr_for_each_entry(&hv->conn_to_evt, eventfd, i)
2705 eventfd_ctx_put(eventfd);
2706 idr_destroy(&hv->conn_to_evt);
2707 }
2708
2709 static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd)
2710 {
2711 struct kvm_hv *hv = to_kvm_hv(kvm);
2712 struct eventfd_ctx *eventfd;
2713 int ret;
2714
2715 eventfd = eventfd_ctx_fdget(fd);
2716 if (IS_ERR(eventfd))
2717 return PTR_ERR(eventfd);
2718
2719 mutex_lock(&hv->hv_lock);
2720 ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1,
2721 GFP_KERNEL_ACCOUNT);
2722 mutex_unlock(&hv->hv_lock);
2723
2724 if (ret >= 0)
2725 return 0;
2726
2727 if (ret == -ENOSPC)
2728 ret = -EEXIST;
2729 eventfd_ctx_put(eventfd);
2730 return ret;
2731 }
2732
2733 static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id)
2734 {
2735 struct kvm_hv *hv = to_kvm_hv(kvm);
2736 struct eventfd_ctx *eventfd;
2737
2738 mutex_lock(&hv->hv_lock);
2739 eventfd = idr_remove(&hv->conn_to_evt, conn_id);
2740 mutex_unlock(&hv->hv_lock);
2741
2742 if (!eventfd)
2743 return -ENOENT;
2744
2745 synchronize_srcu(&kvm->srcu);
2746 eventfd_ctx_put(eventfd);
2747 return 0;
2748 }
2749
2750 int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args)
2751 {
2752 if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) ||
2753 (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK))
2754 return -EINVAL;
2755
2756 if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN)
2757 return kvm_hv_eventfd_deassign(kvm, args->conn_id);
2758 return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd);
2759 }
2760
2761 int kvm_get_hv_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid2 *cpuid,
2762 struct kvm_cpuid_entry2 __user *entries)
2763 {
2764 uint16_t evmcs_ver = 0;
2765 struct kvm_cpuid_entry2 cpuid_entries[] = {
2766 { .function = HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS },
2767 { .function = HYPERV_CPUID_INTERFACE },
2768 { .function = HYPERV_CPUID_VERSION },
2769 { .function = HYPERV_CPUID_FEATURES },
2770 { .function = HYPERV_CPUID_ENLIGHTMENT_INFO },
2771 { .function = HYPERV_CPUID_IMPLEMENT_LIMITS },
2772 { .function = HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS },
2773 { .function = HYPERV_CPUID_SYNDBG_INTERFACE },
2774 { .function = HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES },
2775 { .function = HYPERV_CPUID_NESTED_FEATURES },
2776 };
2777 int i, nent = ARRAY_SIZE(cpuid_entries);
2778
2779 if (kvm_x86_ops.nested_ops->get_evmcs_version)
2780 evmcs_ver = kvm_x86_ops.nested_ops->get_evmcs_version(vcpu);
2781
2782 if (cpuid->nent < nent)
2783 return -E2BIG;
2784
2785 if (cpuid->nent > nent)
2786 cpuid->nent = nent;
2787
2788 for (i = 0; i < nent; i++) {
2789 struct kvm_cpuid_entry2 *ent = &cpuid_entries[i];
2790 u32 signature[3];
2791
2792 switch (ent->function) {
2793 case HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS:
2794 memcpy(signature, "Linux KVM Hv", 12);
2795
2796 ent->eax = HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES;
2797 ent->ebx = signature[0];
2798 ent->ecx = signature[1];
2799 ent->edx = signature[2];
2800 break;
2801
2802 case HYPERV_CPUID_INTERFACE:
2803 ent->eax = HYPERV_CPUID_SIGNATURE_EAX;
2804 break;
2805
2806 case HYPERV_CPUID_VERSION:
2807 /*
2808 * We implement some Hyper-V 2016 functions so let's use
2809 * this version.
2810 */
2811 ent->eax = 0x00003839;
2812 ent->ebx = 0x000A0000;
2813 break;
2814
2815 case HYPERV_CPUID_FEATURES:
2816 ent->eax |= HV_MSR_VP_RUNTIME_AVAILABLE;
2817 ent->eax |= HV_MSR_TIME_REF_COUNT_AVAILABLE;
2818 ent->eax |= HV_MSR_SYNIC_AVAILABLE;
2819 ent->eax |= HV_MSR_SYNTIMER_AVAILABLE;
2820 ent->eax |= HV_MSR_APIC_ACCESS_AVAILABLE;
2821 ent->eax |= HV_MSR_HYPERCALL_AVAILABLE;
2822 ent->eax |= HV_MSR_VP_INDEX_AVAILABLE;
2823 ent->eax |= HV_MSR_RESET_AVAILABLE;
2824 ent->eax |= HV_MSR_REFERENCE_TSC_AVAILABLE;
2825 ent->eax |= HV_ACCESS_FREQUENCY_MSRS;
2826 ent->eax |= HV_ACCESS_REENLIGHTENMENT;
2827 ent->eax |= HV_ACCESS_TSC_INVARIANT;
2828
2829 ent->ebx |= HV_POST_MESSAGES;
2830 ent->ebx |= HV_SIGNAL_EVENTS;
2831 ent->ebx |= HV_ENABLE_EXTENDED_HYPERCALLS;
2832
2833 ent->edx |= HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE;
2834 ent->edx |= HV_FEATURE_FREQUENCY_MSRS_AVAILABLE;
2835 ent->edx |= HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
2836
2837 ent->ebx |= HV_DEBUGGING;
2838 ent->edx |= HV_X64_GUEST_DEBUGGING_AVAILABLE;
2839 ent->edx |= HV_FEATURE_DEBUG_MSRS_AVAILABLE;
2840 ent->edx |= HV_FEATURE_EXT_GVA_RANGES_FLUSH;
2841
2842 /*
2843 * Direct Synthetic timers only make sense with in-kernel
2844 * LAPIC
2845 */
2846 if (!vcpu || lapic_in_kernel(vcpu))
2847 ent->edx |= HV_STIMER_DIRECT_MODE_AVAILABLE;
2848
2849 break;
2850
2851 case HYPERV_CPUID_ENLIGHTMENT_INFO:
2852 ent->eax |= HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
2853 ent->eax |= HV_X64_APIC_ACCESS_RECOMMENDED;
2854 ent->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED;
2855 ent->eax |= HV_X64_CLUSTER_IPI_RECOMMENDED;
2856 ent->eax |= HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED;
2857 if (evmcs_ver)
2858 ent->eax |= HV_X64_ENLIGHTENED_VMCS_RECOMMENDED;
2859 if (!cpu_smt_possible())
2860 ent->eax |= HV_X64_NO_NONARCH_CORESHARING;
2861
2862 ent->eax |= HV_DEPRECATING_AEOI_RECOMMENDED;
2863 /*
2864 * Default number of spinlock retry attempts, matches
2865 * HyperV 2016.
2866 */
2867 ent->ebx = 0x00000FFF;
2868
2869 break;
2870
2871 case HYPERV_CPUID_IMPLEMENT_LIMITS:
2872 /* Maximum number of virtual processors */
2873 ent->eax = KVM_MAX_VCPUS;
2874 /*
2875 * Maximum number of logical processors, matches
2876 * HyperV 2016.
2877 */
2878 ent->ebx = 64;
2879
2880 break;
2881
2882 case HYPERV_CPUID_NESTED_FEATURES:
2883 ent->eax = evmcs_ver;
2884 ent->eax |= HV_X64_NESTED_DIRECT_FLUSH;
2885 ent->eax |= HV_X64_NESTED_MSR_BITMAP;
2886 ent->ebx |= HV_X64_NESTED_EVMCS1_PERF_GLOBAL_CTRL;
2887 break;
2888
2889 case HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS:
2890 memcpy(signature, "Linux KVM Hv", 12);
2891
2892 ent->eax = 0;
2893 ent->ebx = signature[0];
2894 ent->ecx = signature[1];
2895 ent->edx = signature[2];
2896 break;
2897
2898 case HYPERV_CPUID_SYNDBG_INTERFACE:
2899 memcpy(signature, "VS#1\0\0\0\0\0\0\0\0", 12);
2900 ent->eax = signature[0];
2901 break;
2902
2903 case HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES:
2904 ent->eax |= HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING;
2905 break;
2906
2907 default:
2908 break;
2909 }
2910 }
2911
2912 if (copy_to_user(entries, cpuid_entries,
2913 nent * sizeof(struct kvm_cpuid_entry2)))
2914 return -EFAULT;
2915
2916 return 0;
2917 }
Kernel DRM miscellaneous fixes and cross-tree changes