arch/x86/kvm/lapic.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __KVM_X86_LAPIC_H
   3 #define __KVM_X86_LAPIC_H
   4
   5 #include <kvm/iodev.h>
   6
   7 #include <linux/kvm_host.h>
   8
   9 #include "hyperv.h"
  10 #include "smm.h"
  11
  12 #define KVM_APIC_INIT           0
  13 #define KVM_APIC_SIPI           1
  14
  15 #define APIC_SHORT_MASK                 0xc0000
  16 #define APIC_DEST_NOSHORT               0x0
  17 #define APIC_DEST_MASK                  0x800
  18
  19 #define APIC_BUS_CYCLE_NS_DEFAULT       1
  20
  21 #define APIC_BROADCAST                  0xFF
  22 #define X2APIC_BROADCAST                0xFFFFFFFFul
  23
  24 enum lapic_mode {
  25         LAPIC_MODE_DISABLED = 0,
  26         LAPIC_MODE_INVALID = X2APIC_ENABLE,
  27         LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE,
  28         LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE,
  29 };
  30
  31 enum lapic_lvt_entry {
  32         LVT_TIMER,
  33         LVT_THERMAL_MONITOR,
  34         LVT_PERFORMANCE_COUNTER,
  35         LVT_LINT0,
  36         LVT_LINT1,
  37         LVT_ERROR,
  38         LVT_CMCI,
  39
  40         KVM_APIC_MAX_NR_LVT_ENTRIES,
  41 };
  42
  43 #define APIC_LVTx(x) ((x) == LVT_CMCI ? APIC_LVTCMCI : APIC_LVTT + 0x10 * (x))
  44
  45 struct kvm_timer {
  46         struct hrtimer timer;
  47         s64 period;                             /* unit: ns */
  48         ktime_t target_expiration;
  49         u32 timer_mode;
  50         u32 timer_mode_mask;
  51         u64 tscdeadline;
  52         u64 expired_tscdeadline;
  53         u32 timer_advance_ns;
  54         atomic_t pending;                       /* accumulated triggered timers */
  55         bool hv_timer_in_use;
  56 };
  57
  58 struct kvm_lapic {
  59         unsigned long base_address;
  60         struct kvm_io_device dev;
  61         struct kvm_timer lapic_timer;
  62         u32 divide_count;
  63         struct kvm_vcpu *vcpu;
  64         bool apicv_active;
  65         bool sw_enabled;
  66         bool irr_pending;
  67         bool lvt0_in_nmi_mode;
  68         /* Number of bits set in ISR. */
  69         s16 isr_count;
  70         /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
  71         int highest_isr_cache;
  72         /**
  73          * APIC register page.  The layout matches the register layout seen by
  74          * the guest 1:1, because it is accessed by the vmx microcode.
  75          * Note: Only one register, the TPR, is used by the microcode.
  76          */
  77         void *regs;
  78         gpa_t vapic_addr;
  79         struct gfn_to_hva_cache vapic_cache;
  80         unsigned long pending_events;
  81         unsigned int sipi_vector;
  82         int nr_lvt_entries;
  83 };
  84
  85 struct dest_map;
  86
  87 int kvm_create_lapic(struct kvm_vcpu *vcpu);
  88 void kvm_free_lapic(struct kvm_vcpu *vcpu);
  89
  90 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
  91 void kvm_apic_ack_interrupt(struct kvm_vcpu *vcpu, int vector);
  92 int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
  93 int kvm_apic_accept_events(struct kvm_vcpu *vcpu);
  94 void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);
  95 u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
  96 void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
  97 void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
  98 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
  99 void kvm_recalculate_apic_map(struct kvm *kvm);
 100 void kvm_apic_set_version(struct kvm_vcpu *vcpu);
 101 void kvm_apic_after_set_mcg_cap(struct kvm_vcpu *vcpu);
 102 bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
 103                            int shorthand, unsigned int dest, int dest_mode);
 104 int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
 105 void kvm_apic_clear_irr(struct kvm_vcpu *vcpu, int vec);
 106 bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr);
 107 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr);
 108 void kvm_apic_update_ppr(struct kvm_vcpu *vcpu);
 109 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
 110                      struct dest_map *dest_map);
 111 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
 112 void kvm_apic_update_apicv(struct kvm_vcpu *vcpu);
 113 int kvm_alloc_apic_access_page(struct kvm *kvm);
 114 void kvm_inhibit_apic_access_page(struct kvm_vcpu *vcpu);
 115
 116 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
 117                 struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map);
 118 void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high);
 119
 120 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
 121 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
 122 int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
 123 int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
 124 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu);
 125 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
 126
 127 u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
 128 void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
 129
 130 void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
 131 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
 132
 133 int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
 134 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
 135 void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
 136
 137 int kvm_x2apic_icr_write(struct kvm_lapic *apic, u64 data);
 138 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
 139 int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
 140
 141 int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
 142 int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
 143
 144 int kvm_lapic_set_pv_eoi(struct kvm_vcpu *vcpu, u64 data, unsigned long len);
 145 void kvm_lapic_exit(void);
 146
 147 u64 kvm_lapic_readable_reg_mask(struct kvm_lapic *apic);
 148
 149 #define VEC_POS(v) ((v) & (32 - 1))
 150 #define REG_POS(v) (((v) >> 5) << 4)
 151
 152 static inline void kvm_lapic_clear_vector(int vec, void *bitmap)
 153 {
 154         clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
 155 }
 156
 157 static inline void kvm_lapic_set_vector(int vec, void *bitmap)
 158 {
 159         set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
 160 }
 161
 162 static inline void kvm_lapic_set_irr(int vec, struct kvm_lapic *apic)
 163 {
 164         kvm_lapic_set_vector(vec, apic->regs + APIC_IRR);
 165         /*
 166          * irr_pending must be true if any interrupt is pending; set it after
 167          * APIC_IRR to avoid race with apic_clear_irr
 168          */
 169         apic->irr_pending = true;
 170 }
 171
 172 static inline u32 __kvm_lapic_get_reg(char *regs, int reg_off)
 173 {
 174         return *((u32 *) (regs + reg_off));
 175 }
 176
 177 static inline u32 kvm_lapic_get_reg(struct kvm_lapic *apic, int reg_off)
 178 {
 179         return __kvm_lapic_get_reg(apic->regs, reg_off);
 180 }
 181
 182 DECLARE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
 183
 184 static inline bool lapic_in_kernel(struct kvm_vcpu *vcpu)
 185 {
 186         if (static_branch_unlikely(&kvm_has_noapic_vcpu))
 187                 return vcpu->arch.apic;
 188         return true;
 189 }
 190
 191 extern struct static_key_false_deferred apic_hw_disabled;
 192
 193 static inline bool kvm_apic_hw_enabled(struct kvm_lapic *apic)
 194 {
 195         if (static_branch_unlikely(&apic_hw_disabled.key))
 196                 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
 197         return true;
 198 }
 199
 200 extern struct static_key_false_deferred apic_sw_disabled;
 201
 202 static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
 203 {
 204         if (static_branch_unlikely(&apic_sw_disabled.key))
 205                 return apic->sw_enabled;
 206         return true;
 207 }
 208
 209 static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
 210 {
 211         return lapic_in_kernel(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
 212 }
 213
 214 static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
 215 {
 216         return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
 217 }
 218
 219 static inline int apic_x2apic_mode(struct kvm_lapic *apic)
 220 {
 221         return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
 222 }
 223
 224 static inline bool kvm_vcpu_apicv_active(struct kvm_vcpu *vcpu)
 225 {
 226         return lapic_in_kernel(vcpu) && vcpu->arch.apic->apicv_active;
 227 }
 228
 229 static inline bool kvm_apic_has_pending_init_or_sipi(struct kvm_vcpu *vcpu)
 230 {
 231         return lapic_in_kernel(vcpu) && vcpu->arch.apic->pending_events;
 232 }
 233
 234 static inline bool kvm_apic_init_sipi_allowed(struct kvm_vcpu *vcpu)
 235 {
 236         return !is_smm(vcpu) &&
 237                !kvm_x86_call(apic_init_signal_blocked)(vcpu);
 238 }
 239
 240 static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)
 241 {
 242         return (irq->delivery_mode == APIC_DM_LOWEST ||
 243                         irq->msi_redir_hint);
 244 }
 245
 246 static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
 247 {
 248         return lapic_in_kernel(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
 249 }
 250
 251 bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
 252
 253 void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu);
 254
 255 void kvm_bitmap_or_dest_vcpus(struct kvm *kvm, struct kvm_lapic_irq *irq,
 256                               unsigned long *vcpu_bitmap);
 257
 258 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
 259                         struct kvm_vcpu **dest_vcpu);
 260 int kvm_vector_to_index(u32 vector, u32 dest_vcpus,
 261                         const unsigned long *bitmap, u32 bitmap_size);
 262 void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu);
 263 void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu);
 264 void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
 265 bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);
 266 void kvm_lapic_restart_hv_timer(struct kvm_vcpu *vcpu);
 267 bool kvm_can_use_hv_timer(struct kvm_vcpu *vcpu);
 268
 269 static inline enum lapic_mode kvm_apic_mode(u64 apic_base)
 270 {
 271         return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 272 }
 273
 274 static inline u8 kvm_xapic_id(struct kvm_lapic *apic)
 275 {
 276         return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
 277 }
 278
 279 #endif