1 /* SPDX-License-Identifier: GPL-2.0 */
3 /*---------------------------------------------------------------------------+
6 | Divide one FPU_REG by another and put the result in a destination FPU_REG.|
8 | Copyright (C) 1992,1993,1995,1997 |
9 | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
10 | E-mail billm@suburbia.net |
13 +---------------------------------------------------------------------------*/
15 /*---------------------------------------------------------------------------+
17 | int FPU_u_div(FPU_REG *a, FPU_REG *b, FPU_REG *dest, |
18 | unsigned int control_word, char *sign) |
20 | Does not compute the destination exponent, but does adjust it. |
22 | Return value is the tag of the answer, or-ed with FPU_Exception if |
23 | one was raised, or -1 on internal error. |
24 +---------------------------------------------------------------------------*/
26 #include "exception.h"
28 #include "control_w.h"
31 /* #define dSIGL(x) (x) */
32 /* #define dSIGH(x) 4(x) */
35 #ifndef NON_REENTRANT_FPU
37 Local storage on the stack:
38 Result: FPU_accum_3:FPU_accum_2:FPU_accum_1:FPU_accum_0
39 Overflow flag: ovfl_flag
41 #define FPU_accum_3 -4(%ebp)
42 #define FPU_accum_2 -8(%ebp)
43 #define FPU_accum_1 -12(%ebp)
44 #define FPU_accum_0 -16(%ebp)
45 #define FPU_result_1 -20(%ebp)
46 #define FPU_result_2 -24(%ebp)
47 #define FPU_ovfl_flag -28(%ebp)
52 Local storage in a static area:
53 Result: FPU_accum_3:FPU_accum_2:FPU_accum_1:FPU_accum_0
54 Overflow flag: ovfl_flag
71 #endif /* NON_REENTRANT_FPU */
78 SYM_FUNC_START(FPU_u_div)
81 #ifndef NON_REENTRANT_FPU
83 #endif /* NON_REENTRANT_FPU */
98 /* A denormal and a large number can cause an exponent underflow */
99 cmpl EXP_WAY_UNDER,%edx
100 jg xExp_not_underflow
102 /* Set to a really low value allow correct handling */
103 movl EXP_WAY_UNDER,%edx
110 /* testl $0x80000000, SIGH(%esi) // Dividend */
112 testl $0x80000000, SIGH(%ebx) /* Divisor */
114 #endif /* PARANOID */
116 /* Check if the divisor can be treated as having just 32 bits */
118 jnz L_Full_Division /* Can't do a quick divide */
120 /* We should be able to zip through the division here */
121 movl SIGH(%ebx),%ecx /* The divisor */
122 movl SIGH(%esi),%edx /* Dividend */
123 movl SIGL(%esi),%eax /* Dividend */
126 setaeb FPU_ovfl_flag /* Keep a record */
129 subl %ecx,%edx /* Prevent the overflow */
132 /* Divide the 64 bit number by the 32 bit denominator */
134 movl %eax,FPU_result_2
136 /* Work on the remainder of the first division */
139 movl %eax,FPU_result_1
141 /* Work on the remainder of the 64 bit division */
145 testb $255,FPU_ovfl_flag /* was the num > denom ? */
148 /* Do the shifting here */
149 /* increase the exponent */
152 /* shift the mantissa right one bit */
153 stc /* To set the ms bit */
159 jmp LRound_precision /* Do the rounding as required */
162 /*---------------------------------------------------------------------------+
163 | Divide: Return arg1/arg2 to arg3. |
165 | This routine does not use the exponents of arg1 and arg2, but does |
166 | adjust the exponent of arg3. |
168 | The maximum returned value is (ignoring exponents) |
169 | .ffffffff ffffffff |
170 | ------------------ = 1.ffffffff fffffffe |
171 | .80000000 00000000 |
172 | and the minimum is |
173 | .80000000 00000000 |
174 | ------------------ = .80000000 00000001 (rounded) |
175 | .ffffffff ffffffff |
177 +---------------------------------------------------------------------------*/
181 /* Save extended dividend in local register */
183 movl %eax,FPU_accum_2
185 movl %eax,FPU_accum_3
187 movl %eax,FPU_accum_1 /* zero the extension */
188 movl %eax,FPU_accum_0 /* zero the extension */
190 movl SIGL(%esi),%eax /* Get the current num */
193 /*----------------------------------------------------------------------*/
194 /* Initialization done.
195 Do the first 32 bits. */
197 movb $0,FPU_ovfl_flag
198 cmpl SIGH(%ebx),%edx /* Test for imminent overflow */
206 /* The dividend is greater or equal, would cause overflow */
207 setaeb FPU_ovfl_flag /* Keep a record */
210 sbbl SIGH(%ebx),%edx /* Prevent the overflow */
211 movl %eax,FPU_accum_2
212 movl %edx,FPU_accum_3
215 /* At this point, we have a dividend < divisor, with a record of
216 adjustment in FPU_ovfl_flag */
218 /* We will divide by a number which is too large */
223 /* here we need to divide by 100000000h,
224 i.e., no division at all.. */
229 divl %ecx /* Divide the numerator by the augmented
233 movl %eax,FPU_result_2 /* Put the result in the answer */
235 mull SIGH(%ebx) /* mul by the ms dw of the denom */
237 subl %eax,FPU_accum_2 /* Subtract from the num local reg */
238 sbbl %edx,FPU_accum_3
240 movl FPU_result_2,%eax /* Get the result back */
241 mull SIGL(%ebx) /* now mul the ls dw of the denom */
243 subl %eax,FPU_accum_1 /* Subtract from the num local reg */
244 sbbl %edx,FPU_accum_2
246 je LDo_2nd_32_bits /* Must check for non-zero result here */
250 #endif /* PARANOID */
252 /* need to subtract another once of the denom */
253 incl FPU_result_2 /* Correct the answer */
257 subl %eax,FPU_accum_1 /* Subtract from the num local reg */
258 sbbl %edx,FPU_accum_2
262 jne L_bugged_1 /* Must check for non-zero result here */
263 #endif /* PARANOID */
265 /*----------------------------------------------------------------------*/
266 /* Half of the main problem is done, there is just a reduced numerator
268 Work with the second 32 bits, FPU_accum_0 not used from now on */
270 movl FPU_accum_2,%edx /* get the reduced num */
271 movl FPU_accum_1,%eax
273 /* need to check for possible subsequent overflow */
276 ja LPrevent_2nd_overflow
281 LPrevent_2nd_overflow:
282 /* The numerator is greater or equal, would cause overflow */
283 /* prevent overflow */
286 movl %edx,FPU_accum_2
287 movl %eax,FPU_accum_1
289 incl FPU_result_2 /* Reflect the subtraction in the answer */
292 je L_bugged_2 /* Can't bump the result to 1.0 */
293 #endif /* PARANOID */
296 cmpl $0,%ecx /* augmented denom msw */
297 jnz LSecond_div_not_1
299 /* %ecx == 0, we are dividing by 1.0 */
304 divl %ecx /* Divide the numerator by the denom ms dw */
307 movl %eax,FPU_result_1 /* Put the result in the answer */
309 mull SIGH(%ebx) /* mul by the ms dw of the denom */
311 subl %eax,FPU_accum_1 /* Subtract from the num local reg */
312 sbbl %edx,FPU_accum_2
316 #endif /* PARANOID */
318 movl FPU_result_1,%eax /* Get the result back */
319 mull SIGL(%ebx) /* now mul the ls dw of the denom */
321 subl %eax,FPU_accum_0 /* Subtract from the num local reg */
322 sbbl %edx,FPU_accum_1 /* Subtract from the num local reg */
327 #endif /* PARANOID */
334 #endif /* PARANOID */
336 /* need to subtract another once of the denom */
339 subl %eax,FPU_accum_0 /* Subtract from the num local reg */
340 sbbl %edx,FPU_accum_1
346 #endif /* PARANOID */
348 addl $1,FPU_result_1 /* Correct the answer */
352 jc L_bugged_2 /* Must check for non-zero result here */
353 #endif /* PARANOID */
355 /*----------------------------------------------------------------------*/
356 /* The division is essentially finished here, we just need to perform
358 Deal with the 3rd 32 bits */
360 movl FPU_accum_1,%edx /* get the reduced num */
361 movl FPU_accum_0,%eax
363 /* need to check for possible subsequent overflow */
364 cmpl SIGH(%ebx),%edx /* denom */
366 ja LPrevent_3rd_overflow
368 cmpl SIGL(%ebx),%eax /* denom */
371 LPrevent_3rd_overflow:
372 /* prevent overflow */
375 movl %edx,FPU_accum_1
376 movl %eax,FPU_accum_0
378 addl $1,FPU_result_1 /* Reflect the subtraction in the answer */
383 /* This is a tricky spot, there is an overflow of the answer */
384 movb $255,FPU_ovfl_flag /* Overflow -> 1.000 */
388 * Prepare for rounding.
389 * To test for rounding, we just need to compare 2*accum with the
392 movl FPU_accum_0,%ecx
393 movl FPU_accum_1,%edx
396 jz LRound_ovfl /* The accumulator contains zero. */
402 jc LRound_large /* No need to compare, denom smaller */
408 movl $0x70000000,%eax /* Denom was larger */
414 movl $0x80000000,%eax /* Remainder was exactly 1/2 denom */
418 movl $0xff000000,%eax /* Denom was smaller */
421 /* We are now ready to deal with rounding, but first we must get
422 the bits properly aligned */
423 testb $255,FPU_ovfl_flag /* was the num > denom ? */
428 /* shift the mantissa right one bit */
429 stc /* Will set the ms bit */
434 /* Round the result as required */
436 decw EXP(%edi) /* binary point between 1st & 2nd bits */
439 movl FPU_result_1,%ebx
440 movl FPU_result_2,%eax
445 /* The logic is wrong if we got here */
447 pushl EX_INTERNAL|0x202
453 pushl EX_INTERNAL|0x203
459 pushl EX_INTERNAL|0x204
472 #endif /* PARANOID */
474 SYM_FUNC_END(FPU_u_div)