2 L 300 1100 600 1100 3 0 0 0 -1 -1
3 L 300 500 600 500 3 0 0 0 -1 -1
4 A 40 800 400 312 97 3 0 0 0 -1 -1
5 A 600 900 400 270 76 3 0 0 0 -1 -1
6 A 600 700 400 14 76 3 0 0 0 -1 -1
7 L 300 1100 300 1600 3 0 0 0 -1 -1
8 L 300 500 300 0 3 0 0 0 -1 -1
9 V 1050 800 50 6 0 0 0 -1 -1 0 0 -1 -1 -1 -1
10 P 1100 800 1300 800 1 0 1
12 T 1000 800 5 8 0 0 0 0 1
14 T 1000 800 5 8 0 0 0 0 1
19 T 300 100 5 8 0 0 0 0 1
21 T 300 100 5 8 0 0 0 0 1
26 T 300 300 5 8 0 0 0 0 1
28 T 300 300 5 8 0 0 0 0 1
33 T 300 500 5 8 0 0 0 0 1
35 T 300 500 5 8 0 0 0 0 1
40 T 300 700 5 8 0 0 0 0 1
42 T 300 700 5 8 0 0 0 0 1
47 T 300 900 5 8 0 0 0 0 1
49 T 300 900 5 8 0 0 0 0 1
52 P 300 1100 0 1100 1 0 1
54 T 300 1100 5 8 0 0 0 0 1
56 T 300 1100 5 8 0 0 0 0 1
59 P 300 1300 0 1300 1 0 1
61 T 300 1300 5 8 0 0 0 0 1
63 T 300 1300 5 8 0 0 0 0 1
66 P 300 1500 0 1500 1 0 1
68 T 300 1500 5 8 0 0 0 0 1
70 T 300 1500 5 8 0 0 0 0 1
73 T 400 400 5 10 1 1 0 2 1
75 T 400 100 5 8 0 0 0 0 1
77 T 400 200 5 8 0 0 0 0 1
78 VERILOG_PORTS=POSITIONAL