src/add-ons/kernel/drivers/network/dp83815/dp83815_regs.h

   1 /*
   2  *      DP83815 Register #defines
   3  *
   4  *      Created: 12/10/02
   5  *      By: Antonio Carpio
   6  *      E-Mail: BolivianTONE@nc.rr.com
   7  *
   8  *      This file is free to be used for anything by anyone at anytime
   9  *
  10  */
  11
  12
  13 #ifndef _DP83815_REGISTER_DEFINITIONS_H_
  14 #define _DP83815_REGISTER_DEFINITIONS_H_
  15
  16
  17
  18
  19 #define REG_PMSCR       0x0044
  20
  21
  22
  23 #define REG_CR          0x0000
  24 #define REG_CFG         0x0004
  25 #define REG_MEAR        0x0008
  26 #define REG_ISR         0x0010
  27 #define REG_IMR         0x0014
  28 #define REG_IER         0x0018
  29 #define REG_TXDP        0x0020
  30 #define REG_TXCFG       0x0024
  31 #define REG_RXDP        0x0030
  32 #define REG_RXCFG       0x0034
  33 #define REG_CCSR        0x003c
  34 #define REG_WCSR        0x0040
  35 #define REG_RFCR        0x0048
  36 #define REG_RFDR        0x004c
  37 #define REG_MIBC        0x005c
  38 #define REG_SRR         0x0058
  39
  40 #define REG_BMCR        0x0080
  41
  42 #define CR_RST  0x00000100
  43 #define CR_SWI  0x00000080
  44 #define CR_RXR  0x00000020
  45 #define CR_TXR  0x00000010
  46 #define CR_RXD  0x00000008
  47 #define CR_RXE  0x00000004
  48 #define CR_TXD  0x00000002
  49 #define CR_TXE  0x00000001
  50
  51
  52 #define TXCFG_CSI               0x80000000
  53 #define TXCFG_HBI               0x40000000
  54 #define TXCFG_MLB               0x20000000
  55 #define TXCFG_ATP               0x10000000
  56
  57 #define TXCFG_MXDMA_256 0x00700000
  58 #define TXCFG_MXDMA_128 0x00600000
  59 #define TXCFG_MXDMA_64  0x00500000
  60 #define TXCFG_MXDMA_32  0x00400000
  61 #define TXCFG_MXDMA_16  0x00300000
  62 #define TXCFG_MXDMA_8   0x00200000
  63 #define TXCFG_MXDMA_4   0x00100000
  64 #define TXCFG_MXDMA_512 0x00000000
  65 #define TXCFG_FLTH(a)   ((a&0x0000001F)<<8)
  66 #define TXCFG_DRTH(a)   ((a&0x0000001F)<<0)
  67
  68 #define RXCFG_AEP               0x80000000
  69 #define RXCFG_ARP               0x40000000
  70 #define RXCFG_ATP               0x10000000
  71 #define RXCFG_ALP               0x08000000
  72
  73 #define RXCFG_DRTH(a)   ((a&0x0000001F)<<1)
  74
  75
  76 #define DESC_OWN        0x80000000
  77 #define DESC_MORE       0x40000000
  78 #define DESC_INTR       0x20000000
  79 #define DESC_CRC        0x10000000
  80 #define DESC_OK         0x08000000
  81 #define DESC_LENGTH     0x00000FFF
  82
  83 #define DESC_TXA        0x04000000
  84 #define DESC_TFU        0x02000000
  85 #define DESC_CRS        0x01000000
  86 #define DESC_TD         0x00800000
  87 #define DESC_ED         0x00400000
  88 #define DESC_OWC        0x00200000
  89 #define DESC_EC         0x00100000
  90 #define DESC_CCNT       0x000F0000
  91
  92 #define DESC_RXA        0x04000000
  93 #define DESC_RXO        0x02000000
  94 #define DESC_DEST       0x01800000
  95 #define DESC_LONG       0x00400000
  96 #define DESC_RUNT       0x00200000
  97 #define DESC_ISE        0x00100000
  98 #define DESC_CRCE       0x00080000
  99 #define DESC_FAE        0x00040000
 100 #define DESC_LBP        0x00020000
 101 #define DESC_COL        0x00010000
 102
 103
 104
 105
 106
 107 #define ISR_TXRCMP      0x02000000
 108 #define ISR_RXRCMP      0x01000000
 109 #define ISR_DPERR       0x00800000
 110 #define ISR_SSERR       0x00400000
 111 #define ISR_RMABT       0x00200000
 112 #define ISR_RTABT       0x00100000
 113 #define ISR_RXSOVR      0x00010000
 114 #define ISR_HIBERR      0x00008000
 115 #define ISR_PHY         0x00004000
 116 #define ISR_PME         0x00002000
 117 #define ISR_SWI         0x00001000
 118 #define ISR_MIB         0x00000800
 119 #define ISR_TXURN       0x00000400
 120 #define ISR_TXIDLE      0x00000200
 121 #define ISR_TXERR       0x00000100
 122 #define ISR_TXDESC      0x00000080
 123 #define ISR_TXOK        0x00000040
 124 #define ISR_RXORN       0x00000020
 125 #define ISR_RXIDLE      0x00000010
 126 #define ISR_RXEARLY     0x00000008
 127 #define ISR_RXERR       0x00000004
 128 #define ISR_RXDESC      0x00000002
 129 #define ISR_RXOK        0x00000001
 130
 131 #define RFCR_RFEN       0x80000000
 132 #define RFCR_AAB        0x40000000
 133 #define RFCR_AAM        0x20000000
 134 #define RFCR_AAU        0x10000000
 135 #define RFCR_AARP       0x00400000
 136
 137 #define BMCR_ANE        0x1000
 138 #define BMCR_ANR        0x0200
 139
 140
 141 #endif