src/main/drivers/dma_stm32f3xx.c

   1 /*
   2  * This file is part of Cleanflight.
   3  *
   4  * Cleanflight is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * Cleanflight is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with Cleanflight.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <stdbool.h>
  19 #include <string.h>
  20 #include <stdint.h>
  21
  22 #include <platform.h>
  23
  24 #include "build/debug.h"
  25 #include "common/utils.h"
  26 #include "drivers/nvic.h"
  27 #include "drivers/dma.h"
  28 #include "drivers/rcc.h"
  29
  30 /*
  31  * DMA descriptors.
  32  */
  33 static dmaChannelDescriptor_t dmaDescriptors[] = {
  34     [0]  = DEFINE_DMA_CHANNEL(1, 1, 0),         // DMA1_CH1
  35     [1]  = DEFINE_DMA_CHANNEL(1, 2, 4),         // DMA1_CH2
  36     [2]  = DEFINE_DMA_CHANNEL(1, 3, 8),         // DMA1_CH3
  37     [3]  = DEFINE_DMA_CHANNEL(1, 4, 12),        // DMA1_CH4
  38     [4]  = DEFINE_DMA_CHANNEL(1, 5, 16),        // DMA1_CH5
  39     [5]  = DEFINE_DMA_CHANNEL(1, 6, 20),        // DMA1_CH6
  40     [6]  = DEFINE_DMA_CHANNEL(1, 7, 24),        // DMA1_CH7
  41
  42     [7]  = DEFINE_DMA_CHANNEL(2, 1, 0),         // DMA2_CH1
  43     [8]  = DEFINE_DMA_CHANNEL(2, 2, 4),         // DMA2_CH2
  44     [9]  = DEFINE_DMA_CHANNEL(2, 3, 8),         // DMA2_CH3
  45     [10] = DEFINE_DMA_CHANNEL(2, 4, 12),        // DMA2_CH4
  46     [11] = DEFINE_DMA_CHANNEL(2, 5, 16),        // DMA2_CH5
  47 };
  48
  49 /*
  50  * DMA IRQ Handlers
  51  */
  52 DEFINE_DMA_IRQ_HANDLER(1, 1, 0)     // // DMA1_CH1 = dmaDescriptors[0]
  53 DEFINE_DMA_IRQ_HANDLER(1, 2, 1)
  54 DEFINE_DMA_IRQ_HANDLER(1, 3, 2)
  55 DEFINE_DMA_IRQ_HANDLER(1, 4, 3)
  56 DEFINE_DMA_IRQ_HANDLER(1, 5, 4)
  57 DEFINE_DMA_IRQ_HANDLER(1, 6, 5)
  58 DEFINE_DMA_IRQ_HANDLER(1, 7, 6)
  59 DEFINE_DMA_IRQ_HANDLER(2, 1, 7)
  60 DEFINE_DMA_IRQ_HANDLER(2, 2, 8)
  61 DEFINE_DMA_IRQ_HANDLER(2, 3, 9)
  62 DEFINE_DMA_IRQ_HANDLER(2, 4, 10)
  63 DEFINE_DMA_IRQ_HANDLER(2, 5, 11)
  64
  65 DMA_t dmaGetByTag(dmaTag_t tag)
  66 {
  67     for (unsigned i = 0; i < ARRAYLEN(dmaDescriptors); i++) {
  68         // On F3 we match DMA and Channel, stream not used
  69         if (DMATAG_GET_DMA(dmaDescriptors[i].tag) == DMATAG_GET_DMA(tag) && DMATAG_GET_CHANNEL(dmaDescriptors[i].tag) == DMATAG_GET_CHANNEL(tag)) {
  70             return (DMA_t)&dmaDescriptors[i];
  71         }
  72     }
  73
  74     return (DMA_t) NULL;
  75 }
  76
  77 void dmaEnableClock(DMA_t dma)
  78 {
  79     if (dma->dma == DMA1) {
  80         RCC_ClockCmd(RCC_AHB(DMA1), ENABLE);
  81     }
  82     else {
  83         RCC_ClockCmd(RCC_AHB(DMA2), ENABLE);
  84     }
  85 }
  86
  87 resourceOwner_e dmaGetOwner(DMA_t dma)
  88 {
  89     return dma->owner;
  90 }
  91
  92 void dmaInit(DMA_t dma, resourceOwner_e owner, uint8_t resourceIndex)
  93 {
  94     dmaEnableClock(dma);
  95     dma->owner = owner;
  96     dma->resourceIndex = resourceIndex;
  97 }
  98
  99 void dmaSetHandler(DMA_t dma, dmaCallbackHandlerFuncPtr callback, uint32_t priority, uint32_t userParam)
 100 {
 101     dmaEnableClock(dma);
 102
 103     dma->irqHandlerCallback = callback;
 104     dma->userParam = userParam;
 105
 106     NVIC_SetPriority(dma->irqNumber, priority);
 107     NVIC_EnableIRQ(dma->irqNumber);
 108 }
 109
 110 DMA_t dmaGetByRef(const DMA_Channel_TypeDef * ref)
 111 {
 112     for (unsigned i = 0; i < (sizeof(dmaDescriptors) / sizeof(dmaDescriptors[0])); i++) {
 113         if (ref == dmaDescriptors[i].ref) {
 114             return &dmaDescriptors[i];
 115         }
 116     }
 117
 118     return NULL;
 119 }