Merge remote-tracking branch 'upstream/master' into abo_RTH_sanity_fix
[inav.git] / src / main / drivers / dma_stm32f4xx.c
blob955c70f3fefdd4905ead99d0fbc8b64ea79dc3d0
1 /*
2 * This file is part of Cleanflight.
4 * Cleanflight is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 3 of the License, or
7 * (at your option) any later version.
9 * Cleanflight is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
18 #include <stdbool.h>
19 #include <stdint.h>
20 #include <string.h>
22 #include <platform.h>
24 #include "build/debug.h"
25 #include "common/utils.h"
26 #include "drivers/nvic.h"
27 #include "drivers/dma.h"
28 #include "drivers/rcc.h"
31 * DMA descriptors.
33 static dmaChannelDescriptor_t dmaDescriptors[] = {
34 [0] = DEFINE_DMA_CHANNEL(1, 0, 0), // DMA1_ST0
35 [1] = DEFINE_DMA_CHANNEL(1, 1, 6), // DMA1_ST1
36 [2] = DEFINE_DMA_CHANNEL(1, 2, 16), // DMA1_ST2
37 [3] = DEFINE_DMA_CHANNEL(1, 3, 22), // DMA1_ST3
38 [4] = DEFINE_DMA_CHANNEL(1, 4, 32), // DMA1_ST4
39 [5] = DEFINE_DMA_CHANNEL(1, 5, 38), // DMA1_ST5
40 [6] = DEFINE_DMA_CHANNEL(1, 6, 48), // DMA1_ST6
41 [7] = DEFINE_DMA_CHANNEL(1, 7, 54), // DMA1_ST7
43 [8] = DEFINE_DMA_CHANNEL(2, 0, 0), // DMA2_ST0
44 [9] = DEFINE_DMA_CHANNEL(2, 1, 6), // DMA2_ST1
45 [10] = DEFINE_DMA_CHANNEL(2, 2, 16), // DMA2_ST2
46 [11] = DEFINE_DMA_CHANNEL(2, 3, 22), // DMA2_ST3
47 [12] = DEFINE_DMA_CHANNEL(2, 4, 32), // DMA2_ST4
48 [13] = DEFINE_DMA_CHANNEL(2, 5, 38), // DMA2_ST5
49 [14] = DEFINE_DMA_CHANNEL(2, 6, 48), // DMA2_ST6
50 [15] = DEFINE_DMA_CHANNEL(2, 7, 54) // DMA2_ST7
54 * DMA IRQ Handlers
56 DEFINE_DMA_IRQ_HANDLER(1, 0, 0) // DMA1_ST0 = dmaDescriptors[0]
57 DEFINE_DMA_IRQ_HANDLER(1, 1, 1)
58 DEFINE_DMA_IRQ_HANDLER(1, 2, 2)
59 DEFINE_DMA_IRQ_HANDLER(1, 3, 3)
60 DEFINE_DMA_IRQ_HANDLER(1, 4, 4)
61 DEFINE_DMA_IRQ_HANDLER(1, 5, 5)
62 DEFINE_DMA_IRQ_HANDLER(1, 6, 6)
63 DEFINE_DMA_IRQ_HANDLER(1, 7, 7)
64 DEFINE_DMA_IRQ_HANDLER(2, 0, 8)
65 DEFINE_DMA_IRQ_HANDLER(2, 1, 9)
66 DEFINE_DMA_IRQ_HANDLER(2, 2, 10)
67 DEFINE_DMA_IRQ_HANDLER(2, 3, 11)
68 DEFINE_DMA_IRQ_HANDLER(2, 4, 12)
69 DEFINE_DMA_IRQ_HANDLER(2, 5, 13)
70 DEFINE_DMA_IRQ_HANDLER(2, 6, 14)
71 DEFINE_DMA_IRQ_HANDLER(2, 7, 15)
73 DMA_t dmaGetByTag(dmaTag_t tag)
75 for (unsigned i = 0; i < ARRAYLEN(dmaDescriptors); i++) {
76 // On F4/F7 we match only DMA and Stream. Channel is needed when connecting DMA to peripheral
77 if (DMATAG_GET_DMA(dmaDescriptors[i].tag) == DMATAG_GET_DMA(tag) && DMATAG_GET_STREAM(dmaDescriptors[i].tag) == DMATAG_GET_STREAM(tag)) {
78 return (DMA_t)&dmaDescriptors[i];
82 return (DMA_t) NULL;
85 void dmaEnableClock(DMA_t dma)
87 if (dma->dma == DMA1) {
88 RCC_ClockCmd(RCC_AHB1(DMA1), ENABLE);
90 else {
91 RCC_ClockCmd(RCC_AHB1(DMA2), ENABLE);
95 resourceOwner_e dmaGetOwner(DMA_t dma)
97 return dma->owner;
100 void dmaInit(DMA_t dma, resourceOwner_e owner, uint8_t resourceIndex)
102 dmaEnableClock(dma);
103 dma->owner = owner;
104 dma->resourceIndex = resourceIndex;
107 void dmaSetHandler(DMA_t dma, dmaCallbackHandlerFuncPtr callback, uint32_t priority, uint32_t userParam)
109 dmaEnableClock(dma);
111 dma->irqHandlerCallback = callback;
112 dma->userParam = userParam;
114 NVIC_SetPriority(dma->irqNumber, priority);
115 NVIC_EnableIRQ(dma->irqNumber);
118 uint32_t dmaGetChannelByTag(dmaTag_t tag)
120 static const uint32_t dmaChannel[8] = { DMA_Channel_0, DMA_Channel_1, DMA_Channel_2, DMA_Channel_3, DMA_Channel_4, DMA_Channel_5, DMA_Channel_6, DMA_Channel_7 };
121 return dmaChannel[DMATAG_GET_CHANNEL(tag)];
124 DMA_t dmaGetByRef(const DMA_Stream_TypeDef* ref)
126 for (unsigned i = 0; i < (sizeof(dmaDescriptors) / sizeof(dmaDescriptors[0])); i++) {
127 if (ref == dmaDescriptors[i].ref) {
128 return &dmaDescriptors[i];
132 return NULL;