Add EzTune to the settings.yaml
[inav.git] / src / main / drivers / timer_def.h
blobe8c8afad27d5296b4ebbf832df248674720f6959
1 /*
2 * This file is part of INAV.
4 * INAV is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 3 of the License, or
7 * (at your option) any later version.
9 * INAV is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with INAV. If not, see <http://www.gnu.org/licenses/>.
18 #pragma once
20 #include "drivers/dma.h"
22 // Macros expand to keep DMA descriptor table compatible with Betaflight
23 #define DEF_TIM_DMAMAP(variant, timch) CONCAT(DEF_TIM_DMAMAP__, PP_CALL(CONCAT(DEF_TIM_DMAMAP_VARIANT__, variant), CONCAT(DEF_TIM_DMA__, DEF_TIM_TCH2BTCH(timch)), DMA_VARIANT_MISSING, DMA_VARIANT_MISSING))
24 #define DEF_TIM_DMAMAP_VARIANT__0(_0, ...) _0
25 #define DEF_TIM_DMAMAP_VARIANT__1(_0, _1, ...) _1
26 #define DEF_TIM_DMAMAP_VARIANT__2(_0, _1, _2, ...) _2
27 #define DEF_TIM_DMAMAP_VARIANT__3(_0, _1, _2, _3, ...) _3
28 #define DEF_TIM_DMAMAP_VARIANT__4(_0, _1, _2, _3, _4, ...) _4
29 #define DEF_TIM_DMAMAP_VARIANT__5(_0, _1, _2, _3, _4, _5, ...) _5
30 #define DEF_TIM_DMAMAP_VARIANT__6(_0, _1, _2, _3, _4, _5, _6, ...) _6
31 #define DEF_TIM_DMAMAP_VARIANT__7(_0, _1, _2, _3, _4, _5, _6, _7, ...) _7
32 #define DEF_TIM_DMAMAP_VARIANT__8(_0, _1, _2, _3, _4, _5, _6, _7, _8, ...) _8
33 #define DEF_TIM_DMAMAP_VARIANT__9(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, ...) _9
34 #define DEF_TIM_DMAMAP_VARIANT__10(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, ...) _10
35 #define DEF_TIM_DMAMAP_VARIANT__11(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, ...) _11
36 #define DEF_TIM_DMAMAP_VARIANT__12(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, ...) _12
37 #define DEF_TIM_DMAMAP_VARIANT__13(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, ...) _13
38 #define DEF_TIM_DMAMAP_VARIANT__14(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, _14, ...) _14
39 #define DEF_TIM_DMAMAP_VARIANT__15(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, _14, _15, ...) _15
41 // Timer channel indexes
42 #define DEF_TIM_CHNL_CH1 0
43 #define DEF_TIM_CHNL_CH1N 0
44 #define DEF_TIM_CHNL_CH2 1
45 #define DEF_TIM_CHNL_CH2N 1
46 #define DEF_TIM_CHNL_CH3 2
47 #define DEF_TIM_CHNL_CH3N 2
48 #define DEF_TIM_CHNL_CH4 3
49 #define DEF_TIM_CHNL_CH4N 3
51 // map to base channel (strip N from channel); works only when channel N exists
52 #define DEF_TIM_TCH2BTCH(timch) CONCAT(BTCH_, timch)
53 #define BTCH_TIM1_CH1N BTCH_TIM1_CH1
54 #define BTCH_TIM1_CH2N BTCH_TIM1_CH2
55 #define BTCH_TIM1_CH3N BTCH_TIM1_CH3
57 #define BTCH_TIM8_CH1N BTCH_TIM8_CH1
58 #define BTCH_TIM8_CH2N BTCH_TIM8_CH2
59 #define BTCH_TIM8_CH3N BTCH_TIM8_CH3
61 #define BTCH_TIM20_CH1N BTCH_TIM20_CH1
62 #define BTCH_TIM20_CH2N BTCH_TIM20_CH2
63 #define BTCH_TIM20_CH3N BTCH_TIM20_CH3
65 #define BTCH_TIM15_CH1N BTCH_TIM15_CH1
66 #define BTCH_TIM16_CH1N BTCH_TIM16_CH1
68 // Default output flags
69 #define DEF_TIM_OUTPUT(ch) DEF_TIM_OUTPUT__ ## ch
70 #define DEF_TIM_OUTPUT__CH1 (TIMER_OUTPUT_NONE)
71 #define DEF_TIM_OUTPUT__CH2 (TIMER_OUTPUT_NONE)
72 #define DEF_TIM_OUTPUT__CH3 (TIMER_OUTPUT_NONE)
73 #define DEF_TIM_OUTPUT__CH4 (TIMER_OUTPUT_NONE)
74 #define DEF_TIM_OUTPUT__CH1N (TIMER_OUTPUT_N_CHANNEL)
75 #define DEF_TIM_OUTPUT__CH2N (TIMER_OUTPUT_N_CHANNEL)
76 #define DEF_TIM_OUTPUT__CH3N (TIMER_OUTPUT_N_CHANNEL)
77 #define DEF_TIM_OUTPUT__CH4N (TIMER_OUTPUT_N_CHANNEL)
79 #if defined(STM32F4)
80 #include "timer_def_stm32f4xx.h"
81 #elif defined(STM32F7)
82 #include "timer_def_stm32f7xx.h"
83 #elif defined(STM32H7)
84 #include "timer_def_stm32h7xx.h"
85 #else
86 #error "Unknown CPU defined"
87 #endif