examples/des.v

   1 //
   2 //      Name:                   testbench1.vhdl
   3 //
   4 //      Author:                 Chris Eilbeck, chris@yordas.demon.co.uk
   5 //
   6 //      Purpose:                VHDL testbench for a DES encryptor.
   7 //
   8 //      IP Status:              Free use is hereby granted for all civil use including personal, educational and commercial use.
   9 //                                      The use of this code for military, diplomatic or governmental purposes is specifically forbidden.
  10 //
  11 //      Warranty:               There is absolutely no warranty given with this code.  You accept all responsibility for the use
  12 //                                      of this code and any damage so caused.
  13 //
  14 //      Vers Info:              v0.1 14/11/1998 - Creation.
  15 //                                   14/11/1999 - Converted to Verilog (ajb)
  16 //
  17
  18 module top;
  19
  20 reg clk;
  21 reg [1:64] pt, key;
  22 wire [1:64] ct;
  23 integer i;
  24
  25 des des(pt, key, ct, clk);
  26
  27 initial
  28 begin
  29 $dumpfile("des.vcd");
  30 $dumpvars(0, top);
  31
  32 key = 64'h0000000000000000;
  33 pt  = 64'h0000000000000000;
  34 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  35
  36 key = 64'hffffffffffffffff;
  37 pt  = 64'hffffffffffffffff;
  38 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  39
  40 key = 64'h3000000000000000;
  41 pt  = 64'h1000000000000001;
  42 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  43
  44 key = 64'h1111111111111111;
  45 pt  = 64'h1111111111111111;
  46 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  47
  48 key = 64'h0123456789abcdef;
  49 pt  = 64'h1111111111111111;
  50 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  51
  52 key = 64'h1111111111111111;
  53 pt  = 64'h0123456789abcdef;
  54 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  55
  56 key = 64'h0000000000000000;
  57 pt  = 64'h0000000000000000;
  58 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  59
  60 key = 64'hfedcba9876543210;
  61 pt  = 64'h0123456789abcdef;
  62 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  63
  64 key = 64'h7ca110454a1a6e57;
  65 pt  = 64'h01a1d6d039776742;
  66 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  67
  68 key = 64'h0131d9619dc1376e;
  69 pt  = 64'h5cd54ca83def57da;
  70 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  71
  72 key = 64'h07a1133e4a0b2686;
  73 pt  = 64'h0248d43806f67172;
  74 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  75
  76 key = 64'h3849674c2602319e;
  77 pt  = 64'h51454b582ddf440a;
  78 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  79
  80 key = 64'h04b915ba43feb5b6;
  81 pt  = 64'h42fd443059577fa2;
  82 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  83
  84 key = 64'h0113b970fd34f2ce;
  85 pt  = 64'h059b5e0851cf143a;
  86 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  87
  88 key = 64'h0170f175468fb5e6;
  89 pt  = 64'h0756d8e0774761d2;
  90 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  91
  92 key = 64'h43297fad38e373fe;
  93 pt  = 64'h762514b829bf486a;
  94 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  95
  96 key = 64'h07a7137045da2a16;
  97 pt  = 64'h3bdd119049372802;
  98 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
  99
 100 key = 64'h04689104c2fd3b2f;
 101 pt  = 64'h26955f6835af609a;
 102 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
 103
 104 key = 64'h37d06bb516cb7546;
 105 pt  = 64'h164d5e404f275232;
 106 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
 107
 108 key = 64'h1f08260d1ac2465e;
 109 pt  = 64'h6b056e18759f5cca;
 110 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
 111
 112 key = 64'h584023641aba6176;
 113 pt  = 64'h004bd6ef09176062;
 114 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
 115
 116 key = 64'h025816164629b007;
 117 pt  = 64'h480d39006ee762f2;
 118 for(i=0;i<16;i=i+1) begin #1 clk=0; #1 clk=1; end
 119
 120 /*
 121 int testkeys[]= // key, pt, ct
 122 {
 123 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8ca64de9, 0xc1b123a7,
 124 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x7359b216, 0x3e4edc58,
 125 0x30000000, 0x00000000, 0x10000000, 0x00000001, 0x958e6e62, 0x7a05557b,
 126 0x11111111, 0x11111111, 0x11111111, 0x11111111, 0xf40379ab, 0x9e0ec533,
 127 0x01234567, 0x89abcdef, 0x11111111, 0x11111111, 0x17668dfc, 0x7292532d,
 128 0x11111111, 0x11111111, 0x01234567, 0x89abcdef, 0x8a5ae1f8, 0x1ab8f2dd,
 129 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8ca64de9, 0xc1b123a7,
 130 0xfedcba98, 0x76543210, 0x01234567, 0x89abcdef, 0xed39d950, 0xfa74bcc4,
 131 0x7ca11045, 0x4a1a6e57, 0x01a1d6d0, 0x39776742, 0x690f5b0d, 0x9a26939b,
 132 0x0131d961, 0x9dc1376e, 0x5cd54ca8, 0x3def57da, 0x7a389d10, 0x354bd271,
 133 0x07a1133e, 0x4a0b2686, 0x0248d438, 0x06f67172, 0x868ebb51, 0xcab4599a,
 134 0x3849674c, 0x2602319e, 0x51454b58, 0x2ddf440a, 0x7178876e, 0x01f19b2a,
 135 0x04b915ba, 0x43feb5b6, 0x42fd4430, 0x59577fa2, 0xaf37fb42, 0x1f8c4095,
 136 0x0113b970, 0xfd34f2ce, 0x059b5e08, 0x51cf143a, 0x86a560f1, 0x0ec6d85b,
 137 0x0170f175, 0x468fb5e6, 0x0756d8e0, 0x774761d2, 0x0cd3da02, 0x0021dc09,
 138 0x43297fad, 0x38e373fe, 0x762514b8, 0x29bf486a, 0xea676b2c, 0xb7db2b7a,
 139 0x07a71370, 0x45da2a16, 0x3bdd1190, 0x49372802, 0xdfd64a81, 0x5caf1a0f,
 140 0x04689104, 0xc2fd3b2f, 0x26955f68, 0x35af609a, 0x5c513c9c, 0x4886c088,
 141 0x37d06bb5, 0x16cb7546, 0x164d5e40, 0x4f275232, 0x0a2aeeae, 0x3ff4ab77,
 142 0x1f08260d, 0x1ac2465e, 0x6b056e18, 0x759f5cca, 0xef1bf03e, 0x5dfa575a,
 143 0x58402364, 0x1aba6176, 0x004bd6ef, 0x09176062, 0x88bf0db6, 0xd70dee56,
 144 0x02581616, 0x4629b007, 0x480d3900, 0x6ee762f2, 0xa1f99155, 0x41020b56,
 145 0x49793ebc, 0x79b3258f, 0x437540c8, 0x698f3cfa, 0x6fbf1caf, 0xcffd0556,
 146 0x4fb05e15, 0x15ab73a7, 0x072d43a0, 0x77075292, 0x2f22e49b, 0xab7ca1ac,
 147 0x49e95d6d, 0x4ca229bf, 0x02fe5577, 0x8117f12a, 0x5a6b612c, 0xc26cce4a,
 148 0x018310dc, 0x409b26d6, 0x1d9d5c50, 0x18f728c2, 0x5f4c038e, 0xd12b2e41,
 149 0x1c587f1c, 0x13924fef, 0x30553228, 0x6d6f295a, 0x63fac0d0, 0x34d9f793,
 150 0x01010101, 0x01010101, 0x01234567, 0x89abcdef, 0x617b3a0c, 0xe8f07100,
 151 0x1f1f1f1f, 0x0e0e0e0e, 0x01234567, 0x89abcdef, 0xdb958605, 0xf8c8c606,
 152 0xe0fee0fe, 0xf1fef1fe, 0x01234567, 0x89abcdef, 0xedbfd1c6, 0x6c29ccc7,
 153 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x355550b2, 0x150e2451,
 154 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0xcaaaaf4d, 0xeaf1dbae,
 155 0x01234567, 0x89abcdef, 0x00000000, 0x00000000, 0xd5d44ff7, 0x20683d0d,
 156 0xfedcba98, 0x76543210, 0xffffffff, 0xffffffff, 0x2a2bb008, 0xdf97c2f2,
 157 };
 158 */
 159
 160 end
 161
 162 endmodule
 163
 164 module des(pt, key, ct, clk);
 165 input   [1:64] pt;
 166 input   [1:64] key;
 167 output  [1:64] ct;
 168 input   clk;
 169 wire    [1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
 170 wire    [1:32] l0x,l1x,l2x,l3x,l4x,l5x,l6x,l7x,l8x,l9x,l10x,l11x,l12x,l13x,l14x,l15x,l16x;
 171 wire    [1:32] r0x,r1x,r2x,r3x,r4x,r5x,r6x,r7x,r8x,r9x,r10x,r11x,r12x,r13x,r14x,r15x,r16x;
 172
 173 keysched keysched(key, k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x);
 174 ip ip(pt, l0x, r0x);
 175 roundfunc round1(clk, l0x, r0x, l1x, r1x, k1x);
 176 roundfunc round2(clk, l1x, r1x, l2x, r2x, k2x);
 177 roundfunc round3(clk, l2x, r2x, l3x, r3x, k3x);
 178 roundfunc round4(clk, l3x, r3x, l4x, r4x, k4x);
 179 roundfunc round5(clk, l4x, r4x, l5x, r5x, k5x);
 180 roundfunc round6(clk, l5x, r5x, l6x, r6x, k6x);
 181 roundfunc round7(clk, l6x, r6x, l7x, r7x, k7x);
 182 roundfunc round8(clk, l7x, r7x, l8x, r8x, k8x);
 183 roundfunc round9(clk, l8x, r8x, l9x, r9x, k9x);
 184 roundfunc round10(clk, l9x, r9x, l10x, r10x, k10x);
 185 roundfunc round11(clk, l10x, r10x, l11x, r11x, k11x);
 186 roundfunc round12(clk, l11x, r11x, l12x, r12x, k12x);
 187 roundfunc round13(clk, l12x, r12x, l13x, r13x, k13x);
 188 roundfunc round14(clk, l13x, r13x, l14x, r14x, k14x);
 189 roundfunc round15(clk, l14x, r14x, l15x, r15x, k15x);
 190 roundfunc round16(clk, l15x, r15x, l16x, r16x, k16x);
 191 fp fp(r16x, l16x, ct);
 192
 193 endmodule
 194
 195
 196 module pc1(key, c0x, d0x);
 197 input   [1:64] key;
 198 output  [1:28] c0x, d0x;
 199 wire    [1:56] XX;
 200
 201 assign XX[1]=key[57]; assign  XX[2]=key[49]; assign  XX[3]=key[41]; assign  XX[4]=key[33]; assign  XX[5]=key[25]; assign  XX[6]=key[17]; assign  XX[7]=key[9];
 202 assign XX[8]=key[1]; assign  XX[9]=key[58]; assign  XX[10]=key[50]; assign XX[11]=key[42]; assign XX[12]=key[34]; assign XX[13]=key[26]; assign XX[14]=key[18];
 203 assign XX[15]=key[10]; assign XX[16]=key[2]; assign  XX[17]=key[59]; assign XX[18]=key[51]; assign XX[19]=key[43]; assign XX[20]=key[35]; assign XX[21]=key[27];
 204 assign XX[22]=key[19]; assign XX[23]=key[11]; assign XX[24]=key[3]; assign  XX[25]=key[60]; assign XX[26]=key[52]; assign XX[27]=key[44]; assign XX[28]=key[36];
 205 assign XX[29]=key[63]; assign XX[30]=key[55]; assign XX[31]=key[47]; assign XX[32]=key[39]; assign XX[33]=key[31]; assign XX[34]=key[23]; assign XX[35]=key[15];
 206 assign XX[36]=key[7]; assign  XX[37]=key[62]; assign XX[38]=key[54]; assign XX[39]=key[46]; assign XX[40]=key[38]; assign XX[41]=key[30]; assign XX[42]=key[22];
 207 assign XX[43]=key[14]; assign XX[44]=key[6]; assign  XX[45]=key[61]; assign XX[46]=key[53]; assign XX[47]=key[45]; assign XX[48]=key[37]; assign XX[49]=key[29];
 208 assign XX[50]=key[21]; assign XX[51]=key[13]; assign XX[52]=key[5]; assign  XX[53]=key[28]; assign XX[54]=key[20]; assign XX[55]=key[12]; assign XX[56]=key[4];
 209
 210 assign c0x=XX[1:28]; assign d0x=XX[29:56];
 211
 212 endmodule
 213
 214
 215 module pc2(c,d,k);
 216 input   [1:28] c,d;
 217 output  [1:48] k;
 218 wire    [1:56] YY;
 219
 220         assign YY[1:28]=c;         assign YY[29:56]=d;
 221
 222         assign k[1]=YY[14];   assign k[2]=YY[17];   assign k[3]=YY[11];   assign k[4]=YY[24];   assign k[5]=YY[1];    assign k[6]=YY[5];
 223         assign k[7]=YY[3];    assign k[8]=YY[28];   assign k[9]=YY[15];   assign k[10]=YY[6];   assign k[11]=YY[21];  assign k[12]=YY[10];
 224         assign k[13]=YY[23];  assign k[14]=YY[19];  assign k[15]=YY[12];  assign k[16]=YY[4];   assign k[17]=YY[26];  assign k[18]=YY[8];
 225         assign k[19]=YY[16];  assign k[20]=YY[7];   assign k[21]=YY[27];  assign k[22]=YY[20];  assign k[23]=YY[13];  assign k[24]=YY[2];
 226         assign k[25]=YY[41];  assign k[26]=YY[52];  assign k[27]=YY[31];  assign k[28]=YY[37];  assign k[29]=YY[47];  assign k[30]=YY[55];
 227         assign k[31]=YY[30];  assign k[32]=YY[40];  assign k[33]=YY[51];  assign k[34]=YY[45];  assign k[35]=YY[33];  assign k[36]=YY[48];
 228         assign k[37]=YY[44];  assign k[38]=YY[49];  assign k[39]=YY[39];  assign k[40]=YY[56];  assign k[41]=YY[34];  assign k[42]=YY[53];
 229         assign k[43]=YY[46];  assign k[44]=YY[42];  assign k[45]=YY[50];  assign k[46]=YY[36];  assign k[47]=YY[29];  assign k[48]=YY[32];
 230 endmodule
 231
 232
 233 module rol1(o, i);
 234 output  [1:28] o;
 235 input   [1:28] i;
 236
 237 assign o={i[2:28],i[1]};
 238
 239 endmodule
 240
 241
 242 module rol2(o, i);
 243 output  [1:28] o;
 244 input   [1:28] i;
 245
 246 assign o={i[3:28],i[1:2]};
 247 endmodule
 248
 249
 250 module keysched(key,k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x);
 251 input   [1:64] key;
 252 output  [1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
 253 wire    [1:28] c0x,c1x,c2x,c3x,c4x,c5x,c6x,c7x,c8x,c9x,c10x,c11x,c12x,c13x,c14x,c15x,c16x;
 254 wire    [1:28] d0x,d1x,d2x,d3x,d4x,d5x,d6x,d7x,d8x,d9x,d10x,d11x,d12x,d13x,d14x,d15x,d16x;
 255
 256 pc1 pc1(key, c0x, d0x);
 257
 258 rol1 rc1(c1x, c0x); rol1 rd1(d1x, d0x);
 259 rol1 rc2(c2x, c1x); rol1 rd2(d2x, d1x);
 260 rol2 rc3(c3x, c2x); rol2 rd3(d3x, d2x);
 261 rol2 rc4(c4x, c3x); rol2 rd4(d4x, d3x);
 262 rol2 rc5(c5x, c4x); rol2 rd5(d5x, d4x);
 263 rol2 rc6(c6x, c5x); rol2 rd6(d6x, d5x);
 264 rol2 rc7(c7x, c6x); rol2 rd7(d7x, d6x);
 265 rol2 rc8(c8x, c7x); rol2 rd8(d8x, d7x);
 266 rol1 rc9(c9x, c8x); rol1 rd9(d9x, d8x);
 267 rol2 rca(c10x, c9x); rol2 rda(d10x, d9x);
 268 rol2 rcb(c11x, c10x); rol2 rdb(d11x, d10x);
 269 rol2 rcc(c12x, c11x); rol2 rdc(d12x, d11x);
 270 rol2 rcd(c13x, c12x); rol2 rdd(d13x, d12x);
 271 rol2 rce(c14x, c13x); rol2 rde(d14x, d13x);
 272 rol2 rcf(c15x, c14x); rol2 rdf(d15x, d14x);
 273 rol1 rcg(c16x, c15x); rol1 rdg(d16x, d15x);
 274
 275
 276 pc2 pc2x1(c1x,d1x,k1x);
 277 pc2 pc2x2(c2x,d2x,k2x);
 278 pc2 pc2x3(c3x,d3x,k3x);
 279 pc2 pc2x4(c4x,d4x,k4x);
 280 pc2 pc2x5(c5x,d5x,k5x);
 281 pc2 pc2x6(c6x,d6x,k6x);
 282 pc2 pc2x7(c7x,d7x,k7x);
 283 pc2 pc2x8(c8x,d8x,k8x);
 284 pc2 pc2x9(c9x,d9x,k9x);
 285 pc2 pc2x10(c10x,d10x,k10x);
 286 pc2 pc2x11(c11x,d11x,k11x);
 287 pc2 pc2x12(c12x,d12x,k12x);
 288 pc2 pc2x13(c13x,d13x,k13x);
 289 pc2 pc2x14(c14x,d14x,k14x);
 290 pc2 pc2x15(c15x,d15x,k15x);
 291 pc2 pc2x16(c16x,d16x,k16x);
 292
 293 endmodule
 294
 295
 296 module s1(clk, b, so);
 297 input   clk;
 298 input   [1:6] b;
 299 output  [1:4] so;
 300 reg     [1:4] so;
 301
 302         always @(posedge clk)
 303                 casex(b)
 304                                 6'b000000 :     so=4'he;
 305                                 6'b000010 :     so=4'h4;
 306                                 6'b000100 :     so=4'hd;
 307                                 6'b000110 :     so=4'h1;
 308                                 6'b001000 :     so=4'h2;
 309                                 6'b001010 :     so=4'hf;
 310                                 6'b001100 :     so=4'hb;
 311                                 6'b001110 :     so=4'h8;
 312                                 6'b010000 :     so=4'h3;
 313                                 6'b010010 :     so=4'ha;
 314                                 6'b010100 :     so=4'h6;
 315                                 6'b010110 :     so=4'hc;
 316                                 6'b011000 :     so=4'h5;
 317                                 6'b011010 :     so=4'h9;
 318                                 6'b011100 :     so=4'h0;
 319                                 6'b011110 :     so=4'h7;
 320                                 6'b000001 :     so=4'h0;
 321                                 6'b000011 :     so=4'hf;
 322                                 6'b000101 :     so=4'h7;
 323                                 6'b000111 :     so=4'h4;
 324                                 6'b001001 :     so=4'he;
 325                                 6'b001011 :     so=4'h2;
 326                                 6'b001101 :     so=4'hd;
 327                                 6'b001111 :     so=4'h1;
 328                                 6'b010001 :     so=4'ha;
 329                                 6'b010011 :     so=4'h6;
 330                                 6'b010101 :     so=4'hc;
 331                                 6'b010111 :     so=4'hb;
 332                                 6'b011001 :     so=4'h9;
 333                                 6'b011011 :     so=4'h5;
 334                                 6'b011101 :     so=4'h3;
 335                                 6'b011111 :     so=4'h8;
 336                                 6'b100000 :     so=4'h4;
 337                                 6'b100010 :     so=4'h1;
 338                                 6'b100100 :     so=4'he;
 339                                 6'b100110 :     so=4'h8;
 340                                 6'b101000 :     so=4'hd;
 341                                 6'b101010 :     so=4'h6;
 342                                 6'b101100 :     so=4'h2;
 343                                 6'b101110 :     so=4'hb;
 344                                 6'b110000 :     so=4'hf;
 345                                 6'b110010 :     so=4'hc;
 346                                 6'b110100 :     so=4'h9;
 347                                 6'b110110 :     so=4'h7;
 348                                 6'b111000 :     so=4'h3;
 349                                 6'b111010 :     so=4'ha;
 350                                 6'b111100 :     so=4'h5;
 351                                 6'b111110 :     so=4'h0;
 352                                 6'b100001 :     so=4'hf;
 353                                 6'b100011 :     so=4'hc;
 354                                 6'b100101 :     so=4'h8;
 355                                 6'b100111 :     so=4'h2;
 356                                 6'b101001 :     so=4'h4;
 357                                 6'b101011 :     so=4'h9;
 358                                 6'b101101 :     so=4'h1;
 359                                 6'b101111 :     so=4'h7;
 360                                 6'b110001 :     so=4'h5;
 361                                 6'b110011 :     so=4'hb;
 362                                 6'b110101 :     so=4'h3;
 363                                 6'b110111 :     so=4'he;
 364                                 6'b111001 :     so=4'ha;
 365                                 6'b111011 :     so=4'h0;
 366                                 6'b111101 :     so=4'h6;
 367                                 default         so=4'hd;
 368                         endcase
 369 endmodule
 370
 371
 372 module s2(clk, b, so);
 373 input   clk;
 374 input   [1:6] b;
 375 output  [1:4] so;
 376 reg     [1:4] so;
 377
 378         always @(posedge clk)
 379                 casex(b)
 380                                 6'b000000 :        so=4'hf;
 381                                 6'b000010 :        so=4'h1;
 382                                 6'b000100 :        so=4'h8;
 383                                 6'b000110 :        so=4'he;
 384                                 6'b001000 :        so=4'h6;
 385                                 6'b001010 :        so=4'hb;
 386                                 6'b001100 :        so=4'h3;
 387                                 6'b001110 :        so=4'h4;
 388                                 6'b010000 :        so=4'h9;
 389                                 6'b010010 :        so=4'h7;
 390                                 6'b010100 :        so=4'h2;
 391                                 6'b010110 :        so=4'hd;
 392                                 6'b011000 :        so=4'hc;
 393                                 6'b011010 :        so=4'h0;
 394                                 6'b011100 :        so=4'h5;
 395                                 6'b011110 :        so=4'ha;
 396                                 6'b000001 :        so=4'h3;
 397                                 6'b000011 :        so=4'hd;
 398                                 6'b000101 :        so=4'h4;
 399                                 6'b000111 :        so=4'h7;
 400                                 6'b001001 :        so=4'hf;
 401                                 6'b001011 :        so=4'h2;
 402                                 6'b001101 :        so=4'h8;
 403                                 6'b001111 :        so=4'he;
 404                                 6'b010001 :        so=4'hc;
 405                                 6'b010011 :        so=4'h0;
 406                                 6'b010101 :        so=4'h1;
 407                                 6'b010111 :        so=4'ha;
 408                                 6'b011001 :        so=4'h6;
 409                                 6'b011011 :        so=4'h9;
 410                                 6'b011101 :        so=4'hb;
 411                                 6'b011111 :        so=4'h5;
 412                                 6'b100000 :        so=4'h0;
 413                                 6'b100010 :        so=4'he;
 414                                 6'b100100 :        so=4'h7;
 415                                 6'b100110 :        so=4'hb;
 416                                 6'b101000 :        so=4'ha;
 417                                 6'b101010 :        so=4'h4;
 418                                 6'b101100 :        so=4'hd;
 419                                 6'b101110 :        so=4'h1;
 420                                 6'b110000 :        so=4'h5;
 421                                 6'b110010 :        so=4'h8;
 422                                 6'b110100 :        so=4'hc;
 423                                 6'b110110 :        so=4'h6;
 424                                 6'b111000 :        so=4'h9;
 425                                 6'b111010 :        so=4'h3;
 426                                 6'b111100 :        so=4'h2;
 427                                 6'b111110 :        so=4'hf;
 428                                 6'b100001 :        so=4'hd;
 429                                 6'b100011 :        so=4'h8;
 430                                 6'b100101 :        so=4'ha;
 431                                 6'b100111 :        so=4'h1;
 432                                 6'b101001 :        so=4'h3;
 433                                 6'b101011 :        so=4'hf;
 434                                 6'b101101 :        so=4'h4;
 435                                 6'b101111 :        so=4'h2;
 436                                 6'b110001 :        so=4'hb;
 437                                 6'b110011 :        so=4'h6;
 438                                 6'b110101 :        so=4'h7;
 439                                 6'b110111 :        so=4'hc;
 440                                 6'b111001 :        so=4'h0;
 441                                 6'b111011 :        so=4'h5;
 442                                 6'b111101 :        so=4'he;
 443                                 default            so=4'h9;
 444                         endcase
 445 endmodule
 446
 447
 448 module s3(clk, b, so);
 449 input   clk;
 450 input   [1:6] b;
 451 output  [1:4] so;
 452 reg     [1:4] so;
 453
 454         always @(posedge clk)
 455                 casex(b)
 456                                 6'b000000 :        so=4'ha;
 457                                 6'b000010 :        so=4'h0;
 458                                 6'b000100 :        so=4'h9;
 459                                 6'b000110 :        so=4'he;
 460                                 6'b001000 :        so=4'h6;
 461                                 6'b001010 :        so=4'h3;
 462                                 6'b001100 :        so=4'hf;
 463                                 6'b001110 :        so=4'h5;
 464                                 6'b010000 :        so=4'h1;
 465                                 6'b010010 :        so=4'hd;
 466                                 6'b010100 :        so=4'hc;
 467                                 6'b010110 :        so=4'h7;
 468                                 6'b011000 :        so=4'hb;
 469                                 6'b011010 :        so=4'h4;
 470                                 6'b011100 :        so=4'h2;
 471                                 6'b011110 :        so=4'h8;
 472                                 6'b000001 :        so=4'hd;
 473                                 6'b000011 :        so=4'h7;
 474                                 6'b000101 :        so=4'h0;
 475                                 6'b000111 :        so=4'h9;
 476                                 6'b001001 :        so=4'h3;
 477                                 6'b001011 :        so=4'h4;
 478                                 6'b001101 :        so=4'h6;
 479                                 6'b001111 :        so=4'ha;
 480                                 6'b010001 :        so=4'h2;
 481                                 6'b010011 :        so=4'h8;
 482                                 6'b010101 :        so=4'h5;
 483                                 6'b010111 :        so=4'he;
 484                                 6'b011001 :        so=4'hc;
 485                                 6'b011011 :        so=4'hb;
 486                                 6'b011101 :        so=4'hf;
 487                                 6'b011111 :        so=4'h1;
 488                                 6'b100000 :        so=4'hd;
 489                                 6'b100010 :        so=4'h6;
 490                                 6'b100100 :        so=4'h4;
 491                                 6'b100110 :        so=4'h9;
 492                                 6'b101000 :        so=4'h8;
 493                                 6'b101010 :        so=4'hf;
 494                                 6'b101100 :        so=4'h3;
 495                                 6'b101110 :        so=4'h0;
 496                                 6'b110000 :        so=4'hb;
 497                                 6'b110010 :        so=4'h1;
 498                                 6'b110100 :        so=4'h2;
 499                                 6'b110110 :        so=4'hc;
 500                                 6'b111000 :        so=4'h5;
 501                                 6'b111010 :        so=4'ha;
 502                                 6'b111100 :        so=4'he;
 503                                 6'b111110 :        so=4'h7;
 504                                 6'b100001 :        so=4'h1;
 505                                 6'b100011 :        so=4'ha;
 506                                 6'b100101 :        so=4'hd;
 507                                 6'b100111 :        so=4'h0;
 508                                 6'b101001 :        so=4'h6;
 509                                 6'b101011 :        so=4'h9;
 510                                 6'b101101 :        so=4'h8;
 511                                 6'b101111 :        so=4'h7;
 512                                 6'b110001 :        so=4'h4;
 513                                 6'b110011 :        so=4'hf;
 514                                 6'b110101 :        so=4'he;
 515                                 6'b110111 :        so=4'h3;
 516                                 6'b111001 :        so=4'hb;
 517                                 6'b111011 :        so=4'h5;
 518                                 6'b111101 :        so=4'h2;
 519                                 default            so=4'hc;
 520                         endcase
 521 endmodule
 522
 523
 524 module s4(clk, b, so);
 525 input   clk;
 526 input   [1:6] b;
 527 output  [1:4] so;
 528 reg     [1:4] so;
 529
 530         always @(posedge clk)
 531                 casex(b)
 532                                 6'b000000 :        so=4'h7;
 533                                 6'b000010 :        so=4'hd;
 534                                 6'b000100 :        so=4'he;
 535                                 6'b000110 :        so=4'h3;
 536                                 6'b001000 :        so=4'h0;
 537                                 6'b001010 :        so=4'h6;
 538                                 6'b001100 :        so=4'h9;
 539                                 6'b001110 :        so=4'ha;
 540                                 6'b010000 :        so=4'h1;
 541                                 6'b010010 :        so=4'h2;
 542                                 6'b010100 :        so=4'h8;
 543                                 6'b010110 :        so=4'h5;
 544                                 6'b011000 :        so=4'hb;
 545                                 6'b011010 :        so=4'hc;
 546                                 6'b011100 :        so=4'h4;
 547                                 6'b011110 :        so=4'hf;
 548                                 6'b000001 :        so=4'hd;
 549                                 6'b000011 :        so=4'h8;
 550                                 6'b000101 :        so=4'hb;
 551                                 6'b000111 :        so=4'h5;
 552                                 6'b001001 :        so=4'h6;
 553                                 6'b001011 :        so=4'hf;
 554                                 6'b001101 :        so=4'h0;
 555                                 6'b001111 :        so=4'h3;
 556                                 6'b010001 :        so=4'h4;
 557                                 6'b010011 :        so=4'h7;
 558                                 6'b010101 :        so=4'h2;
 559                                 6'b010111 :        so=4'hc;
 560                                 6'b011001 :        so=4'h1;
 561                                 6'b011011 :        so=4'ha;
 562                                 6'b011101 :        so=4'he;
 563                                 6'b011111 :        so=4'h9;
 564                                 6'b100000 :        so=4'ha;
 565                                 6'b100010 :        so=4'h6;
 566                                 6'b100100 :        so=4'h9;
 567                                 6'b100110 :        so=4'h0;
 568                                 6'b101000 :        so=4'hc;
 569                                 6'b101010 :        so=4'hb;
 570                                 6'b101100 :        so=4'h7;
 571                                 6'b101110 :        so=4'hd;
 572                                 6'b110000 :        so=4'hf;
 573                                 6'b110010 :        so=4'h1;
 574                                 6'b110100 :        so=4'h3;
 575                                 6'b110110 :        so=4'he;
 576                                 6'b111000 :        so=4'h5;
 577                                 6'b111010 :        so=4'h2;
 578                                 6'b111100 :        so=4'h8;
 579                                 6'b111110 :        so=4'h4;
 580                                 6'b100001 :        so=4'h3;
 581                                 6'b100011 :        so=4'hf;
 582                                 6'b100101 :        so=4'h0;
 583                                 6'b100111 :        so=4'h6;
 584                                 6'b101001 :        so=4'ha;
 585                                 6'b101011 :        so=4'h1;
 586                                 6'b101101 :        so=4'hd;
 587                                 6'b101111 :        so=4'h8;
 588                                 6'b110001 :        so=4'h9;
 589                                 6'b110011 :        so=4'h4;
 590                                 6'b110101 :        so=4'h5;
 591                                 6'b110111 :        so=4'hb;
 592                                 6'b111001 :        so=4'hc;
 593                                 6'b111011 :        so=4'h7;
 594                                 6'b111101 :        so=4'h2;
 595                                 default            so=4'he;
 596                         endcase
 597 endmodule
 598
 599
 600 module s5(clk, b, so);
 601 input   clk;
 602 input   [1:6] b;
 603 output  [1:4] so;
 604 reg     [1:4] so;
 605
 606         always @(posedge clk)
 607                 casex(b)
 608                                 6'b000000 :        so=4'h2;
 609                                 6'b000010 :        so=4'hc;
 610                                 6'b000100 :        so=4'h4;
 611                                 6'b000110 :        so=4'h1;
 612                                 6'b001000 :        so=4'h7;
 613                                 6'b001010 :        so=4'ha;
 614                                 6'b001100 :        so=4'hb;
 615                                 6'b001110 :        so=4'h6;
 616                                 6'b010000 :        so=4'h8;
 617                                 6'b010010 :        so=4'h5;
 618                                 6'b010100 :        so=4'h3;
 619                                 6'b010110 :        so=4'hf;
 620                                 6'b011000 :        so=4'hd;
 621                                 6'b011010 :        so=4'h0;
 622                                 6'b011100 :        so=4'he;
 623                                 6'b011110 :        so=4'h9;
 624                                 6'b000001 :        so=4'he;
 625                                 6'b000011 :        so=4'hb;
 626                                 6'b000101 :        so=4'h2;
 627                                 6'b000111 :        so=4'hc;
 628                                 6'b001001 :        so=4'h4;
 629                                 6'b001011 :        so=4'h7;
 630                                 6'b001101 :        so=4'hd;
 631                                 6'b001111 :        so=4'h1;
 632                                 6'b010001 :        so=4'h5;
 633                                 6'b010011 :        so=4'h0;
 634                                 6'b010101 :        so=4'hf;
 635                                 6'b010111 :        so=4'ha;
 636                                 6'b011001 :        so=4'h3;
 637                                 6'b011011 :        so=4'h9;
 638                                 6'b011101 :        so=4'h8;
 639                                 6'b011111 :        so=4'h6;
 640                                 6'b100000 :        so=4'h4;
 641                                 6'b100010 :        so=4'h2;
 642                                 6'b100100 :        so=4'h1;
 643                                 6'b100110 :        so=4'hb;
 644                                 6'b101000 :        so=4'ha;
 645                                 6'b101010 :        so=4'hd;
 646                                 6'b101100 :        so=4'h7;
 647                                 6'b101110 :        so=4'h8;
 648                                 6'b110000 :        so=4'hf;
 649                                 6'b110010 :        so=4'h9;
 650                                 6'b110100 :        so=4'hc;
 651                                 6'b110110 :        so=4'h5;
 652                                 6'b111000 :        so=4'h6;
 653                                 6'b111010 :        so=4'h3;
 654                                 6'b111100 :        so=4'h0;
 655                                 6'b111110 :        so=4'he;
 656                                 6'b100001 :        so=4'hb;
 657                                 6'b100011 :        so=4'h8;
 658                                 6'b100101 :        so=4'hc;
 659                                 6'b100111 :        so=4'h7;
 660                                 6'b101001 :        so=4'h1;
 661                                 6'b101011 :        so=4'he;
 662                                 6'b101101 :        so=4'h2;
 663                                 6'b101111 :        so=4'hd;
 664                                 6'b110001 :        so=4'h6;
 665                                 6'b110011 :        so=4'hf;
 666                                 6'b110101 :        so=4'h0;
 667                                 6'b110111 :        so=4'h9;
 668                                 6'b111001 :        so=4'ha;
 669                                 6'b111011 :        so=4'h4;
 670                                 6'b111101 :        so=4'h5;
 671                                 default            so=4'h3;
 672                         endcase
 673 endmodule
 674
 675
 676 module s6(clk, b, so);
 677 input   clk;
 678 input   [1:6] b;
 679 output  [1:4] so;
 680 reg     [1:4] so;
 681
 682         always @(posedge clk)
 683                 casex(b)
 684                                 6'b000000 :        so=4'hc;
 685                                 6'b000010 :        so=4'h1;
 686                                 6'b000100 :        so=4'ha;
 687                                 6'b000110 :        so=4'hf;
 688                                 6'b001000 :        so=4'h9;
 689                                 6'b001010 :        so=4'h2;
 690                                 6'b001100 :        so=4'h6;
 691                                 6'b001110 :        so=4'h8;
 692                                 6'b010000 :        so=4'h0;
 693                                 6'b010010 :        so=4'hd;
 694                                 6'b010100 :        so=4'h3;
 695                                 6'b010110 :        so=4'h4;
 696                                 6'b011000 :        so=4'he;
 697                                 6'b011010 :        so=4'h7;
 698                                 6'b011100 :        so=4'h5;
 699                                 6'b011110 :        so=4'hb;
 700                                 6'b000001 :        so=4'ha;
 701                                 6'b000011 :        so=4'hf;
 702                                 6'b000101 :        so=4'h4;
 703                                 6'b000111 :        so=4'h2;
 704                                 6'b001001 :        so=4'h7;
 705                                 6'b001011 :        so=4'hc;
 706                                 6'b001101 :        so=4'h9;
 707                                 6'b001111 :        so=4'h5;
 708                                 6'b010001 :        so=4'h6;
 709                                 6'b010011 :        so=4'h1;
 710                                 6'b010101 :        so=4'hd;
 711                                 6'b010111 :        so=4'he;
 712                                 6'b011001 :        so=4'h0;
 713                                 6'b011011 :        so=4'hb;
 714                                 6'b011101 :        so=4'h3;
 715                                 6'b011111 :        so=4'h8;
 716                                 6'b100000 :        so=4'h9;
 717                                 6'b100010 :        so=4'he;
 718                                 6'b100100 :        so=4'hf;
 719                                 6'b100110 :        so=4'h5;
 720                                 6'b101000 :        so=4'h2;
 721                                 6'b101010 :        so=4'h8;
 722                                 6'b101100 :        so=4'hc;
 723                                 6'b101110 :        so=4'h3;
 724                                 6'b110000 :        so=4'h7;
 725                                 6'b110010 :        so=4'h0;
 726                                 6'b110100 :        so=4'h4;
 727                                 6'b110110 :        so=4'ha;
 728                                 6'b111000 :        so=4'h1;
 729                                 6'b111010 :        so=4'hd;
 730                                 6'b111100 :        so=4'hb;
 731                                 6'b111110 :        so=4'h6;
 732                                 6'b100001 :        so=4'h4;
 733                                 6'b100011 :        so=4'h3;
 734                                 6'b100101 :        so=4'h2;
 735                                 6'b100111 :        so=4'hc;
 736                                 6'b101001 :        so=4'h9;
 737                                 6'b101011 :        so=4'h5;
 738                                 6'b101101 :        so=4'hf;
 739                                 6'b101111 :        so=4'ha;
 740                                 6'b110001 :        so=4'hb;
 741                                 6'b110011 :        so=4'he;
 742                                 6'b110101 :        so=4'h1;
 743                                 6'b110111 :        so=4'h7;
 744                                 6'b111001 :        so=4'h6;
 745                                 6'b111011 :        so=4'h0;
 746                                 6'b111101 :        so=4'h8;
 747                                 default            so=4'hd;
 748                         endcase
 749 endmodule
 750
 751
 752 module s7(clk, b, so);
 753 input   clk;
 754 input   [1:6] b;
 755 output  [1:4] so;
 756 reg     [1:4] so;
 757
 758         always @(posedge clk)
 759                 casex(b)
 760                                 6'b000000 :        so=4'h4;
 761                                 6'b000010 :        so=4'hb;
 762                                 6'b000100 :        so=4'h2;
 763                                 6'b000110 :        so=4'he;
 764                                 6'b001000 :        so=4'hf;
 765                                 6'b001010 :        so=4'h0;
 766                                 6'b001100 :        so=4'h8;
 767                                 6'b001110 :        so=4'hd;
 768                                 6'b010000 :        so=4'h3;
 769                                 6'b010010 :        so=4'hc;
 770                                 6'b010100 :        so=4'h9;
 771                                 6'b010110 :        so=4'h7;
 772                                 6'b011000 :        so=4'h5;
 773                                 6'b011010 :        so=4'ha;
 774                                 6'b011100 :        so=4'h6;
 775                                 6'b011110 :        so=4'h1;
 776                                 6'b000001 :        so=4'hd;
 777                                 6'b000011 :        so=4'h0;
 778                                 6'b000101 :        so=4'hb;
 779                                 6'b000111 :        so=4'h7;
 780                                 6'b001001 :        so=4'h4;
 781                                 6'b001011 :        so=4'h9;
 782                                 6'b001101 :        so=4'h1;
 783                                 6'b001111 :        so=4'ha;
 784                                 6'b010001 :        so=4'he;
 785                                 6'b010011 :        so=4'h3;
 786                                 6'b010101 :        so=4'h5;
 787                                 6'b010111 :        so=4'hc;
 788                                 6'b011001 :        so=4'h2;
 789                                 6'b011011 :        so=4'hf;
 790                                 6'b011101 :        so=4'h8;
 791                                 6'b011111 :        so=4'h6;
 792                                 6'b100000 :        so=4'h1;
 793                                 6'b100010 :        so=4'h4;
 794                                 6'b100100 :        so=4'hb;
 795                                 6'b100110 :        so=4'hd;
 796                                 6'b101000 :        so=4'hc;
 797                                 6'b101010 :        so=4'h3;
 798                                 6'b101100 :        so=4'h7;
 799                                 6'b101110 :        so=4'he;
 800                                 6'b110000 :        so=4'ha;
 801                                 6'b110010 :        so=4'hf;
 802                                 6'b110100 :        so=4'h6;
 803                                 6'b110110 :        so=4'h8;
 804                                 6'b111000 :        so=4'h0;
 805                                 6'b111010 :        so=4'h5;
 806                                 6'b111100 :        so=4'h9;
 807                                 6'b111110 :        so=4'h2;
 808                                 6'b100001 :        so=4'h6;
 809                                 6'b100011 :        so=4'hb;
 810                                 6'b100101 :        so=4'hd;
 811                                 6'b100111 :        so=4'h8;
 812                                 6'b101001 :        so=4'h1;
 813                                 6'b101011 :        so=4'h4;
 814                                 6'b101101 :        so=4'ha;
 815                                 6'b101111 :        so=4'h7;
 816                                 6'b110001 :        so=4'h9;
 817                                 6'b110011 :        so=4'h5;
 818                                 6'b110101 :        so=4'h0;
 819                                 6'b110111 :        so=4'hf;
 820                                 6'b111001 :        so=4'he;
 821                                 6'b111011 :        so=4'h2;
 822                                 6'b111101 :        so=4'h3;
 823                                 default            so=4'hc;
 824                         endcase
 825 endmodule
 826
 827
 828 module s8(clk, b, so);
 829 input   clk;
 830 input   [1:6] b;
 831 output  [1:4] so;
 832 reg     [1:4] so;
 833
 834         always @(posedge clk)
 835                 casex(b)
 836                                 6'b000000 :        so=4'hd;
 837                                 6'b000010 :        so=4'h2;
 838                                 6'b000100 :        so=4'h8;
 839                                 6'b000110 :        so=4'h4;
 840                                 6'b001000 :        so=4'h6;
 841                                 6'b001010 :        so=4'hf;
 842                                 6'b001100 :        so=4'hb;
 843                                 6'b001110 :        so=4'h1;
 844                                 6'b010000 :        so=4'ha;
 845                                 6'b010010 :        so=4'h9;
 846                                 6'b010100 :        so=4'h3;
 847                                 6'b010110 :        so=4'he;
 848                                 6'b011000 :        so=4'h5;
 849                                 6'b011010 :        so=4'h0;
 850                                 6'b011100 :        so=4'hc;
 851                                 6'b011110 :        so=4'h7;
 852                                 6'b000001 :        so=4'h1;
 853                                 6'b000011 :        so=4'hf;
 854                                 6'b000101 :        so=4'hd;
 855                                 6'b000111 :        so=4'h8;
 856                                 6'b001001 :        so=4'ha;
 857                                 6'b001011 :        so=4'h3;
 858                                 6'b001101 :        so=4'h7;
 859                                 6'b001111 :        so=4'h4;
 860                                 6'b010001 :        so=4'hc;
 861                                 6'b010011 :        so=4'h5;
 862                                 6'b010101 :        so=4'h6;
 863                                 6'b010111 :        so=4'hb;
 864                                 6'b011001 :        so=4'h0;
 865                                 6'b011011 :        so=4'he;
 866                                 6'b011101 :        so=4'h9;
 867                                 6'b011111 :        so=4'h2;
 868                                 6'b100000 :        so=4'h7;
 869                                 6'b100010 :        so=4'hb;
 870                                 6'b100100 :        so=4'h4;
 871                                 6'b100110 :        so=4'h1;
 872                                 6'b101000 :        so=4'h9;
 873                                 6'b101010 :        so=4'hc;
 874                                 6'b101100 :        so=4'he;
 875                                 6'b101110 :        so=4'h2;
 876                                 6'b110000 :        so=4'h0;
 877                                 6'b110010 :        so=4'h6;
 878                                 6'b110100 :        so=4'ha;
 879                                 6'b110110 :        so=4'hd;
 880                                 6'b111000 :        so=4'hf;
 881                                 6'b111010 :        so=4'h3;
 882                                 6'b111100 :        so=4'h5;
 883                                 6'b111110 :        so=4'h8;
 884                                 6'b100001 :        so=4'h2;
 885                                 6'b100011 :        so=4'h1;
 886                                 6'b100101 :        so=4'he;
 887                                 6'b100111 :        so=4'h7;
 888                                 6'b101001 :        so=4'h4;
 889                                 6'b101011 :        so=4'ha;
 890                                 6'b101101 :        so=4'h8;
 891                                 6'b101111 :        so=4'hd;
 892                                 6'b110001 :        so=4'hf;
 893                                 6'b110011 :        so=4'hc;
 894                                 6'b110101 :        so=4'h9;
 895                                 6'b110111 :        so=4'h0;
 896                                 6'b111001 :        so=4'h3;
 897                                 6'b111011 :        so=4'h5;
 898                                 6'b111101 :        so=4'h6;
 899                                 default            so=4'hb;
 900                         endcase
 901 endmodule
 902
 903
 904 module ip(pt, l0x, r0x);
 905 input   [1:64] pt;
 906 output  [1:32] l0x, r0x;
 907
 908 assign l0x[1]=pt[58];         assign l0x[2]=pt[50];         assign l0x[3]=pt[42];         assign l0x[4]=pt[34];
 909 assign l0x[5]=pt[26];         assign l0x[6]=pt[18];         assign l0x[7]=pt[10];         assign l0x[8]=pt[2];
 910 assign l0x[9]=pt[60];         assign l0x[10]=pt[52];        assign l0x[11]=pt[44];        assign l0x[12]=pt[36];
 911 assign l0x[13]=pt[28];        assign l0x[14]=pt[20];        assign l0x[15]=pt[12];        assign l0x[16]=pt[4];
 912 assign l0x[17]=pt[62];        assign l0x[18]=pt[54];        assign l0x[19]=pt[46];        assign l0x[20]=pt[38];
 913 assign l0x[21]=pt[30];        assign l0x[22]=pt[22];        assign l0x[23]=pt[14];        assign l0x[24]=pt[6];
 914 assign l0x[25]=pt[64];        assign l0x[26]=pt[56];        assign l0x[27]=pt[48];        assign l0x[28]=pt[40];
 915 assign l0x[29]=pt[32];        assign l0x[30]=pt[24];        assign l0x[31]=pt[16];        assign l0x[32]=pt[8];
 916
 917 assign r0x[1]=pt[57];         assign r0x[2]=pt[49];         assign r0x[3]=pt[41];         assign r0x[4]=pt[33];
 918 assign r0x[5]=pt[25];         assign r0x[6]=pt[17];         assign r0x[7]=pt[9];          assign r0x[8]=pt[1];
 919 assign r0x[9]=pt[59];         assign r0x[10]=pt[51];        assign r0x[11]=pt[43];        assign r0x[12]=pt[35];
 920 assign r0x[13]=pt[27];        assign r0x[14]=pt[19];        assign r0x[15]=pt[11];        assign r0x[16]=pt[3];
 921 assign r0x[17]=pt[61];        assign r0x[18]=pt[53];        assign r0x[19]=pt[45];        assign r0x[20]=pt[37];
 922 assign r0x[21]=pt[29];        assign r0x[22]=pt[21];        assign r0x[23]=pt[13];        assign r0x[24]=pt[5];
 923 assign r0x[25]=pt[63];        assign r0x[26]=pt[55];        assign r0x[27]=pt[47];        assign r0x[28]=pt[39];
 924 assign r0x[29]=pt[31];        assign r0x[30]=pt[23];        assign r0x[31]=pt[15];        assign r0x[32]=pt[7];
 925
 926 endmodule
 927
 928
 929 module xp(ri, e);
 930 input [1:32] ri;
 931 output [1:48] e;
 932
 933 assign e[1]=ri[32];   assign e[2]=ri[1];    assign e[3]=ri[2];    assign e[4]=ri[3];    assign e[5]=ri[4];    assign e[6]=ri[5];    assign e[7]=ri[4];    assign e[8]=ri[5];
 934 assign e[9]=ri[6];    assign e[10]=ri[7];   assign e[11]=ri[8];   assign e[12]=ri[9];   assign e[13]=ri[8];   assign e[14]=ri[9];   assign e[15]=ri[10];  assign e[16]=ri[11];
 935 assign e[17]=ri[12];  assign e[18]=ri[13];  assign e[19]=ri[12];  assign e[20]=ri[13];  assign e[21]=ri[14];  assign e[22]=ri[15];  assign e[23]=ri[16];  assign e[24]=ri[17];
 936 assign e[25]=ri[16];  assign e[26]=ri[17];  assign e[27]=ri[18];  assign e[28]=ri[19];  assign e[29]=ri[20];  assign e[30]=ri[21];  assign e[31]=ri[20];  assign e[32]=ri[21];
 937 assign e[33]=ri[22];  assign e[34]=ri[23];  assign e[35]=ri[24];  assign e[36]=ri[25];  assign e[37]=ri[24];  assign e[38]=ri[25];  assign e[39]=ri[26];  assign e[40]=ri[27];
 938 assign e[41]=ri[28];  assign e[42]=ri[29];  assign e[43]=ri[28];  assign e[44]=ri[29];  assign e[45]=ri[30];  assign e[46]=ri[31];  assign e[47]=ri[32];  assign e[48]=ri[1];
 939
 940 endmodule
 941
 942
 943 module desxor1(e,b1x,b2x,b3x,b4x,b5x,b6x,b7x,b8x,k);
 944 input   [1:48] e;
 945 output  [1:6] b1x,b2x,b3x,b4x,b5x,b6x,b7x,b8x;
 946 input   [1:48] k;
 947 wire    [1:48] XX;
 948
 949 assign         XX = k ^ e;
 950 assign        b1x = XX[1:6];
 951 assign        b2x = XX[7:12];
 952 assign        b3x = XX[13:18];
 953 assign        b4x = XX[19:24];
 954 assign        b5x = XX[25:30];
 955 assign        b6x = XX[31:36];
 956 assign        b7x = XX[37:42];
 957 assign        b8x = XX[43:48];
 958
 959 endmodule
 960
 961
 962 module pp(so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x,ppo);
 963 input   [1:4] so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x;
 964 output  [1:32] ppo;
 965 wire    [1:32] XX;
 966
 967         assign XX[1:4]=so1x;       assign XX[5:8]=so2x;       assign XX[9:12]=so3x;      assign XX[13:16]=so4x;
 968         assign XX[17:20]=so5x;     assign XX[21:24]=so6x;     assign XX[25:28]=so7x;     assign XX[29:32]=so8x;
 969
 970         assign ppo[1]=XX[16];         assign ppo[2]=XX[7];          assign ppo[3]=XX[20];         assign ppo[4]=XX[21];
 971         assign ppo[5]=XX[29];         assign ppo[6]=XX[12];         assign ppo[7]=XX[28];         assign ppo[8]=XX[17];
 972         assign ppo[9]=XX[1];          assign ppo[10]=XX[15];        assign ppo[11]=XX[23];        assign ppo[12]=XX[26];
 973         assign ppo[13]=XX[5];         assign ppo[14]=XX[18];        assign ppo[15]=XX[31];        assign ppo[16]=XX[10];
 974         assign ppo[17]=XX[2];         assign ppo[18]=XX[8];         assign ppo[19]=XX[24];        assign ppo[20]=XX[14];
 975         assign ppo[21]=XX[32];        assign ppo[22]=XX[27];        assign ppo[23]=XX[3];         assign ppo[24]=XX[9];
 976         assign ppo[25]=XX[19];        assign ppo[26]=XX[13];        assign ppo[27]=XX[30];        assign ppo[28]=XX[6];
 977         assign ppo[29]=XX[22];        assign ppo[30]=XX[11];        assign ppo[31]=XX[4];         assign ppo[32]=XX[25];
 978
 979 endmodule
 980
 981
 982 module desxor2(d,l,q);
 983 input   [1:32] d,l;
 984 output  [1:32] q;
 985
 986 assign q = d ^ l;
 987
 988 endmodule
 989
 990
 991 module roundfunc(clk, li, ri, lo, ro, k);
 992 input   clk;
 993 input   [1:32] li, ri;
 994 input   [1:48] k;
 995 output  [1:32] lo, ro;
 996
 997 wire    [1:48] e;
 998 wire    [1:6] b1x,b2x,b3x,b4x,b5x,b6x,b7x,b8x;
 999 wire    [1:4] so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x;
1000 wire    [1:32] ppo;
1001
1002 xp xp(ri, e);
1003 desxor1 desxor1(e, b1x, b2x, b3x, b4x, b5x, b6x, b7x, b8x, k);
1004 s1 s1(clk, b1x, so1x);
1005 s2 s2(clk, b2x, so2x);
1006 s3 s3(clk, b3x, so3x);
1007 s4 s4(clk, b4x, so4x);
1008 s5 s5(clk, b5x, so5x);
1009 s6 s6(clk, b6x, so6x);
1010 s7 s7(clk, b7x, so7x);
1011 s8 s8(clk, b8x, so8x);
1012 pp pp(so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x, ppo);
1013 desxor2 desxor2(ppo, li, ro);
1014
1015 assign lo=ri;
1016
1017 endmodule
1018
1019
1020 module fp(l,r,ct);
1021 input   [1:32] l,r;
1022 output  [1:64] ct;
1023
1024         assign ct[1]=r[8];      assign ct[2]=l[8];      assign ct[3]=r[16];     assign ct[4]=l[16];     assign ct[5]=r[24];     assign ct[6]=l[24];     assign ct[7]=r[32];     assign ct[8]=l[32];
1025         assign ct[9]=r[7];      assign ct[10]=l[7];     assign ct[11]=r[15];    assign ct[12]=l[15];    assign ct[13]=r[23];    assign ct[14]=l[23];    assign ct[15]=r[31];    assign ct[16]=l[31];
1026         assign ct[17]=r[6];     assign ct[18]=l[6];     assign ct[19]=r[14];    assign ct[20]=l[14];    assign ct[21]=r[22];    assign ct[22]=l[22];    assign ct[23]=r[30];    assign ct[24]=l[30];
1027         assign ct[25]=r[5];     assign ct[26]=l[5];     assign ct[27]=r[13];    assign ct[28]=l[13];    assign ct[29]=r[21];    assign ct[30]=l[21];    assign ct[31]=r[29];    assign ct[32]=l[29];
1028         assign ct[33]=r[4];     assign ct[34]=l[4];     assign ct[35]=r[12];    assign ct[36]=l[12];    assign ct[37]=r[20];    assign ct[38]=l[20];    assign ct[39]=r[28];    assign ct[40]=l[28];
1029         assign ct[41]=r[3];     assign ct[42]=l[3];     assign ct[43]=r[11];    assign ct[44]=l[11];    assign ct[45]=r[19];    assign ct[46]=l[19];    assign ct[47]=r[27];    assign ct[48]=l[27];
1030         assign ct[49]=r[2];     assign ct[50]=l[2];     assign ct[51]=r[10];    assign ct[52]=l[10];    assign ct[53]=r[18];    assign ct[54]=l[18];    assign ct[55]=r[26];    assign ct[56]=l[26];
1031         assign ct[57]=r[1];     assign ct[58]=l[1];     assign ct[59]=r[9];     assign ct[60]=l[9];     assign ct[61]=r[17];    assign ct[62]=l[17];    assign ct[63]=r[25];    assign ct[64]=l[25];
1032
1033 endmodule
1034
1035