include/jitcs_machine.h

   1 //===-- jitcs_machine.h - Machine info --------------------------*- C++ -*-===//
   2 //
   3 // MachineInfo holds the complete state necessary for the compiler component
   4 // to handle machine instructions for a particular machine. Particular
   5 // architectures (e.g. x86) are defined in different header files and will fill
   6 // in all fields with the relevant values.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 #ifndef _JITCS_MACHINE_H_
  11 #define _JITCS_MACHINE_H_
  12
  13 #include "jitcs_adt_ref.h"
  14 #include "jitcs_adt_slice.h"
  15 #include "jitcs_base.h"
  16 #include "jitcs_cpu.h"
  17
  18 namespace jitcs {
  19 //struct Instruction;
  20 //class BBlock;
  21 //class Function;
  22 //class BBlockCodeGenMap;
  23 //struct CCInfo;
  24
  25 class MachineInfo {
  26 protected:
  27   MachineInfo(const CPUInfo&);
  28 private:
  29   MachineInfo() = delete;
  30   MachineInfo(const MachineInfo&) = delete;
  31   MachineInfo& operator =(const MachineInfo&) = delete;
  32 public:
  33   CPUInfo cpu;
  34   //u32 numRes;
  35   //u8 numRegClass, numResClass;
  36
  37   //virtual size_t estimateCodeSizeFast(Slice<Instruction*>, const Function&) = 0;
  38   //virtual size_t estimateCodeSize(Slice<Instruction*>, const Function&) = 0;
  39   //virtual u8* generateCode(u8*, Slice<Instruction*>, const Function&, BBlockCodeGenMap&) = 0;
  40   //virtual RefOrNull<CallingConvention> getCC(const CCInfo&) = 0;
  41
  42   //virtual bool hasCtrlFlowIns(Slice<Instruction*>) = 0;
  43   //virtual bool isRetIns(Ref<Instruction>) = 0;
  44   //virtual void updateCtrlFlow(Ref<Instruction>, BBlock* src, Function& b);
  45
  46   //inline u32 GetInsNextSize(InsPtr ip, Function& b) {
  47   //inline void AnalyzePreDefUse(InsPtr ip, PreDefUseData& ud, u32 idx) {
  48   //inline void AnalyzeDefUse(InsPtr ip, DefUseData& ud, u32& idx, NextData* next) {
  49   //inline ResId GetResOfReg(RegId r) { return evm::x86::GetResOfReg(r); }
  50   //inline ResClassId GetResClassOfReg(RegId r) { return evm::x86::GetResClassOfReg(r); }
  51   //inline ResClassId GetResClassOfRes(ResId r) { return evm::x86::GetResClassOfRes(r); }
  52   //inline u32 GetResIndexOfResClass(ResClassId r) { return evm::x86::GetResIndexOfResClass(r); }
  53   //inline ResClassId GetResClassOfRegClass(RegClassId rc) { return evm::x86::GetResClassOfRegClass(rc); }
  54   //inline u32 GetSizeOfRegClass(RegClassId rc) { return evm::x86::GetSizeOfRegClass(rc); }
  55   //inline u32 GetDontAllocOfRegClass(RegClassId rc) { return evm::x86::GetDontAllocOfRegClass(rc); }
  56   //inline RegClassId GetRegClassOfReg(RegId r) { return evm::x86::GetRegClassOfReg(r); }
  57
  58   //inline void RegAlloc1P(InsPtr ip, RegAlloc1PData& ra, Function& b, NextData* next) {
  59   //inline void ReserveRegisters(BitmapRef res, bool requireSuperAlignment) {
  60   //inline void CreatePrologueAndEpilogue(PrologueEpilogueData & ped) {
  61   //inline void CreateMove(RegAlloc1PData &ra, VRegRef dest, VRegRef src) {
  62   //inline void CreateMove(RegAlloc1PData &ra, VRegRef dest, MemRef src) {
  63   //inline void CreateMove(RegAlloc1PData &ra, MemRef dest, VRegRef src) {
  64   //inline RegId GetRegForRes(RegClassId rc, ResId res) {
  65   //inline VRegRef GetRRefForRes(RegClassId rc, ResId res) {
  66   //inline ResId evm::DefUseData::reg2resV(RegId r) const { return evm::platform::GetResOfReg(r); }
  67   //inline bool IsHWReg(RegId r) { return r.id < R_HardwareLimit; }
  68   //inline bool  IsHWRes(ResId r) { return r.id < evm::platform::GetResCount(); }
  69   //inline RegClassId GetRegClassOfReg(RegId r, Function const &f);
  70   //inline u32 GetMaskOfReg(RegId r, Function const &f) {
  71     //return IsHWReg(r) ? 0 : evm::platform::GetDontAllocOfRegClass(GetRegClassOfReg(r, f));
  72   //}
  73
  74   //void DumpMem(evm::IDumper& o, evm::MemPtr mp, bool vsib);
  75   /*
  76   template <typename T>
  77   const CallConv& GetCC() {
  78     static CallConv* cc = 0;
  79     if (!cc) {
  80       typedef FncType<T> F;
  81       static_assert(AcceptableType<F::ResultType>::OK);
  82       static_assert(AcceptableType<F::Param1Type>::OK);
  83       static_assert(AcceptableType<F::Param2Type>::OK);
  84       static_assert(AcceptableType<F::Param3Type>::OK);
  85       static_assert(AcceptableType<F::Param4Type>::OK);
  86       static_assert(AcceptableType<F::Param5Type>::OK);
  87       static_assert(AcceptableType<F::Param6Type>::OK);
  88       teCCTypeParam params[6] = {
  89         AcceptableType<F::Param1Type>::Val,
  90         AcceptableType<F::Param2Type>::Val,
  91         AcceptableType<F::Param3Type>::Val,
  92         AcceptableType<F::Param4Type>::Val,
  93         AcceptableType<F::Param5Type>::Val,
  94         AcceptableType<F::Param6Type>::Val,
  95       };
  96       cc = evm::platform::GetCC(AcceptableType<F::ResultType>::Val, params, F::ParamNo, F::CCType);
  97     }
  98     return *cc;
  99   }*/
 100 };
 101
 102 } // end namespace jitcs
 103
 104 #endif
 105 // _JITCS_MACHINE_H_