Added updating of lua generated header files for X86 architecture.
[jitcs.git] / include / jitcs_x86_32_regs.h
blob1de37a2b9519a536156690dfcdde5642a6ddc239
1 // DO NOT EDIT. this file was autogenerated from include/jitcs_x86_xx_regs.lh
2 //===-- jitcs_x86_32_regs.h C++ -----------------------------------------*-===//
3 //
4 // Register definitions for 32bit x86 code.
5 //
6 //===----------------------------------------------------------------------===//
8 #ifndef _JITCS_X86_32_REGS_H_
9 #define _JITCS_X86_32_REGS_H_
11 #include "jitcs_base.h"
12 #include "jitcs_ids.h"
15 namespace jitcs {
16 struct VirtualRegister;
17 namespace x86_32 {
19 enum {
20 RC_Count = 8,
23 // special regs
24 #define RCLID(ID) static_cast<RegClassId>((ID))
25 static const RegClassId RC_GR8 = RCLID(1);
26 static const RegClassId RC_GR16 = RCLID(2);
27 static const RegClassId RC_GR32 = RCLID(3);
28 static const RegClassId RC_VR128 = RCLID(4);
29 static const RegClassId RC_VR256 = RCLID(5);
30 static const RegClassId RC_VR512 = RCLID(6);
31 static const RegClassId RC_FLAGS = RCLID(8);
32 static const RegClassId RC_GR = RC_GR32;
33 #undef RCLID
35 enum RegSubClassEnum {
36 RSC_FLAGSR,
37 RSC_GR8L,
38 RSC_GR8H,
39 RSC_GR16,
40 RSC_GR32,
41 RSC_VR128,
42 RSC_VR256,
43 RSC_VR512,
44 RSC_Count,
47 enum FLAGSREnum {
48 R_FLAGS = 0x01,
50 enum GR8LEnum {
51 R_AL = 0x20,
52 R_CL = 0x21,
53 R_DL = 0x22,
54 R_BL = 0x23,
55 // aliases
56 R_R0L = R_AL,
57 R_R1L = R_CL,
58 R_R2L = R_DL,
59 R_R3L = R_BL,
61 enum GR8HEnum {
62 R_AH = 0x24,
63 R_CH = 0x25,
64 R_DH = 0x26,
65 R_BH = 0x27,
66 // aliases
67 R_R0H = R_AH,
68 R_R1H = R_CH,
69 R_R2H = R_DH,
70 R_R3H = R_BH,
72 enum GR16Enum {
73 R_AX = 0x40,
74 R_CX = 0x41,
75 R_DX = 0x42,
76 R_BX = 0x43,
77 R_SP = 0x44,
78 R_BP = 0x45,
79 R_SI = 0x46,
80 R_DI = 0x47,
81 // aliases
82 R_R0W = R_AX,
83 R_R1W = R_CX,
84 R_R2W = R_DX,
85 R_R3W = R_BX,
86 R_R4W = R_SP,
87 R_R5W = R_BP,
88 R_R6W = R_SI,
89 R_R7W = R_DI,
91 enum GR32Enum {
92 R_EAX = 0x10,
93 R_ECX = 0x11,
94 R_EDX = 0x12,
95 R_EBX = 0x13,
96 R_ESP = 0x14,
97 R_EBP = 0x15,
98 R_ESI = 0x16,
99 R_EDI = 0x17,
100 // aliases
101 R_R0D = R_EAX,
102 R_R1D = R_ECX,
103 R_R2D = R_EDX,
104 R_R3D = R_EBX,
105 R_R4D = R_ESP,
106 R_R5D = R_EBP,
107 R_R6D = R_ESI,
108 R_R7D = R_EDI,
109 R_R0 = R_EAX,
110 R_R1 = R_ECX,
111 R_R2 = R_EDX,
112 R_R3 = R_EBX,
113 R_R4 = R_ESP,
114 R_R5 = R_EBP,
115 R_R6 = R_ESI,
116 R_R7 = R_EDI,
117 R_RAX = R_EAX,
118 R_RBP = R_EBP,
119 R_RBX = R_EBX,
120 R_RCX = R_ECX,
121 R_RDI = R_EDI,
122 R_RDX = R_EDX,
123 R_RSI = R_ESI,
124 R_RSP = R_ESP,
126 enum VR128Enum {
127 R_XMM0 = 0x60,
128 R_XMM1 = 0x61,
129 R_XMM2 = 0x62,
130 R_XMM3 = 0x63,
131 R_XMM4 = 0x64,
132 R_XMM5 = 0x65,
133 R_XMM6 = 0x66,
134 R_XMM7 = 0x67,
136 enum VR256Enum {
137 R_YMM0 = 0x80,
138 R_YMM1 = 0x81,
139 R_YMM2 = 0x82,
140 R_YMM3 = 0x83,
141 R_YMM4 = 0x84,
142 R_YMM5 = 0x85,
143 R_YMM6 = 0x86,
144 R_YMM7 = 0x87,
146 enum VR512Enum {
147 R_ZMM0 = 0xa0,
148 R_ZMM1 = 0xa1,
149 R_ZMM2 = 0xa2,
150 R_ZMM3 = 0xa3,
151 R_ZMM4 = 0xa4,
152 R_ZMM5 = 0xa5,
153 R_ZMM6 = 0xa6,
154 R_ZMM7 = 0xa7,
156 typedef GR32Enum GREnum;
159 extern const VirtualRegister _fixedRegister0;
160 extern const VirtualRegister _fixedRegister1;
161 extern const VirtualRegister _fixedRegister2;
162 extern const VirtualRegister _fixedRegister3;
163 extern const VirtualRegister _fixedRegister4;
164 extern const VirtualRegister _fixedRegister5;
165 extern const VirtualRegister _fixedRegister6;
166 extern const VirtualRegister _fixedRegister7;
167 extern const VirtualRegister _fixedRegister8;
168 extern const VirtualRegister _fixedRegister9;
169 extern const VirtualRegister _fixedRegister10;
170 extern const VirtualRegister _fixedRegister11;
171 extern const VirtualRegister _fixedRegister12;
172 extern const VirtualRegister _fixedRegister13;
173 extern const VirtualRegister _fixedRegister14;
174 extern const VirtualRegister _fixedRegister15;
175 extern const VirtualRegister _fixedRegister16;
176 extern const VirtualRegister _fixedRegister17;
177 extern const VirtualRegister _fixedRegister18;
178 extern const VirtualRegister _fixedRegister19;
179 extern const VirtualRegister _fixedRegister20;
180 extern const VirtualRegister _fixedRegister21;
181 extern const VirtualRegister _fixedRegister22;
182 extern const VirtualRegister _fixedRegister23;
183 extern const VirtualRegister _fixedRegister24;
184 extern const VirtualRegister _fixedRegister25;
185 extern const VirtualRegister _fixedRegister26;
186 extern const VirtualRegister _fixedRegister27;
187 extern const VirtualRegister _fixedRegister28;
188 extern const VirtualRegister _fixedRegister29;
189 extern const VirtualRegister _fixedRegister30;
190 extern const VirtualRegister _fixedRegister31;
191 extern const VirtualRegister _fixedRegister32;
192 extern const VirtualRegister _fixedRegister33;
193 extern const VirtualRegister _fixedRegister34;
194 extern const VirtualRegister _fixedRegister35;
195 extern const VirtualRegister _fixedRegister36;
196 extern const VirtualRegister _fixedRegister37;
197 extern const VirtualRegister _fixedRegister38;
198 extern const VirtualRegister _fixedRegister39;
199 extern const VirtualRegister _fixedRegister40;
200 extern const VirtualRegister _fixedRegister41;
201 extern const VirtualRegister _fixedRegister42;
202 extern const VirtualRegister _fixedRegister43;
203 extern const VirtualRegister _fixedRegister44;
204 extern const VirtualRegister _fixedRegister45;
205 extern const VirtualRegister _fixedRegister46;
206 extern const VirtualRegister _fixedRegister47;
207 extern const VirtualRegister _fixedRegister48;
208 template <const VirtualRegister *VR, RegSubClassEnum RSC>
209 struct RegLookup {
210 operator const VirtualRegister *() const { return VR; }
212 // FLAGSR
213 static const RegLookup<_fixedRegister0, RSC_FLAGSR> FLAGS;
214 // GR8L
215 static const RegLookup<_fixedRegister1, RSC_GR8L> AL;
216 static const RegLookup<_fixedRegister2, RSC_GR8L> CL;
217 static const RegLookup<_fixedRegister3, RSC_GR8L> DL;
218 static const RegLookup<_fixedRegister4, RSC_GR8L> BL;
219 // aliases
220 static const RegLookup<_fixedRegister1, RSC_GR8L> R0L;
221 static const RegLookup<_fixedRegister2, RSC_GR8L> R1L;
222 static const RegLookup<_fixedRegister3, RSC_GR8L> R2L;
223 static const RegLookup<_fixedRegister4, RSC_GR8L> R3L;
224 // GR8H
225 static const RegLookup<_fixedRegister5, RSC_GR8H> AH;
226 static const RegLookup<_fixedRegister6, RSC_GR8H> CH;
227 static const RegLookup<_fixedRegister7, RSC_GR8H> DH;
228 static const RegLookup<_fixedRegister8, RSC_GR8H> BH;
229 // aliases
230 static const RegLookup<_fixedRegister5, RSC_GR8H> R0H;
231 static const RegLookup<_fixedRegister6, RSC_GR8H> R1H;
232 static const RegLookup<_fixedRegister7, RSC_GR8H> R2H;
233 static const RegLookup<_fixedRegister8, RSC_GR8H> R3H;
234 // GR16
235 static const RegLookup<_fixedRegister9, RSC_GR16> AX;
236 static const RegLookup<_fixedRegister10, RSC_GR16> CX;
237 static const RegLookup<_fixedRegister11, RSC_GR16> DX;
238 static const RegLookup<_fixedRegister12, RSC_GR16> BX;
239 static const RegLookup<_fixedRegister13, RSC_GR16> SP;
240 static const RegLookup<_fixedRegister14, RSC_GR16> BP;
241 static const RegLookup<_fixedRegister15, RSC_GR16> SI;
242 static const RegLookup<_fixedRegister16, RSC_GR16> DI;
243 // aliases
244 static const RegLookup<_fixedRegister9, RSC_GR16> R0W;
245 static const RegLookup<_fixedRegister10, RSC_GR16> R1W;
246 static const RegLookup<_fixedRegister11, RSC_GR16> R2W;
247 static const RegLookup<_fixedRegister12, RSC_GR16> R3W;
248 static const RegLookup<_fixedRegister13, RSC_GR16> R4W;
249 static const RegLookup<_fixedRegister14, RSC_GR16> R5W;
250 static const RegLookup<_fixedRegister15, RSC_GR16> R6W;
251 static const RegLookup<_fixedRegister16, RSC_GR16> R7W;
252 // GR32
253 static const RegLookup<_fixedRegister17, RSC_GR32> EAX;
254 static const RegLookup<_fixedRegister18, RSC_GR32> ECX;
255 static const RegLookup<_fixedRegister19, RSC_GR32> EDX;
256 static const RegLookup<_fixedRegister20, RSC_GR32> EBX;
257 static const RegLookup<_fixedRegister21, RSC_GR32> ESP;
258 static const RegLookup<_fixedRegister22, RSC_GR32> EBP;
259 static const RegLookup<_fixedRegister23, RSC_GR32> ESI;
260 static const RegLookup<_fixedRegister24, RSC_GR32> EDI;
261 // aliases
262 static const RegLookup<_fixedRegister17, RSC_GR32> R0D;
263 static const RegLookup<_fixedRegister18, RSC_GR32> R1D;
264 static const RegLookup<_fixedRegister19, RSC_GR32> R2D;
265 static const RegLookup<_fixedRegister20, RSC_GR32> R3D;
266 static const RegLookup<_fixedRegister21, RSC_GR32> R4D;
267 static const RegLookup<_fixedRegister22, RSC_GR32> R5D;
268 static const RegLookup<_fixedRegister23, RSC_GR32> R6D;
269 static const RegLookup<_fixedRegister24, RSC_GR32> R7D;
270 static const RegLookup<_fixedRegister17, RSC_GR32> R0;
271 static const RegLookup<_fixedRegister18, RSC_GR32> R1;
272 static const RegLookup<_fixedRegister19, RSC_GR32> R2;
273 static const RegLookup<_fixedRegister20, RSC_GR32> R3;
274 static const RegLookup<_fixedRegister21, RSC_GR32> R4;
275 static const RegLookup<_fixedRegister22, RSC_GR32> R5;
276 static const RegLookup<_fixedRegister23, RSC_GR32> R6;
277 static const RegLookup<_fixedRegister24, RSC_GR32> R7;
278 static const RegLookup<_fixedRegister17, RSC_GR32> RAX;
279 static const RegLookup<_fixedRegister22, RSC_GR32> RBP;
280 static const RegLookup<_fixedRegister20, RSC_GR32> RBX;
281 static const RegLookup<_fixedRegister18, RSC_GR32> RCX;
282 static const RegLookup<_fixedRegister24, RSC_GR32> RDI;
283 static const RegLookup<_fixedRegister19, RSC_GR32> RDX;
284 static const RegLookup<_fixedRegister23, RSC_GR32> RSI;
285 static const RegLookup<_fixedRegister21, RSC_GR32> RSP;
286 // VR128
287 static const RegLookup<_fixedRegister25, RSC_VR128> XMM0;
288 static const RegLookup<_fixedRegister26, RSC_VR128> XMM1;
289 static const RegLookup<_fixedRegister27, RSC_VR128> XMM2;
290 static const RegLookup<_fixedRegister28, RSC_VR128> XMM3;
291 static const RegLookup<_fixedRegister29, RSC_VR128> XMM4;
292 static const RegLookup<_fixedRegister30, RSC_VR128> XMM5;
293 static const RegLookup<_fixedRegister31, RSC_VR128> XMM6;
294 static const RegLookup<_fixedRegister32, RSC_VR128> XMM7;
295 // VR256
296 static const RegLookup<_fixedRegister33, RSC_VR256> YMM0;
297 static const RegLookup<_fixedRegister34, RSC_VR256> YMM1;
298 static const RegLookup<_fixedRegister35, RSC_VR256> YMM2;
299 static const RegLookup<_fixedRegister36, RSC_VR256> YMM3;
300 static const RegLookup<_fixedRegister37, RSC_VR256> YMM4;
301 static const RegLookup<_fixedRegister38, RSC_VR256> YMM5;
302 static const RegLookup<_fixedRegister39, RSC_VR256> YMM6;
303 static const RegLookup<_fixedRegister40, RSC_VR256> YMM7;
304 // VR512
305 static const RegLookup<_fixedRegister41, RSC_VR512> ZMM0;
306 static const RegLookup<_fixedRegister42, RSC_VR512> ZMM1;
307 static const RegLookup<_fixedRegister43, RSC_VR512> ZMM2;
308 static const RegLookup<_fixedRegister44, RSC_VR512> ZMM3;
309 static const RegLookup<_fixedRegister45, RSC_VR512> ZMM4;
310 static const RegLookup<_fixedRegister46, RSC_VR512> ZMM5;
311 static const RegLookup<_fixedRegister47, RSC_VR512> ZMM6;
312 static const RegLookup<_fixedRegister48, RSC_VR512> ZMM7;
314 inline bool IsGR8(RegId r) { return (r >= 32 && r <= 35) || (r >= 36 && r <= 39) || ((r >= 52 && r <= 63)); }
315 inline bool IsGR8(RegClassId rc) { return rc == RC_GR8; }
316 inline bool IsGR16(RegId r) { return ((r >= 64 && r <= 71)) || ((r >= 16 && r <= 23)) || ((r >= 80 && r <= 95)); }
317 inline bool IsGR16(RegClassId rc) { return rc == RC_GR16 || rc == RC_GR32 || (rc == RC_GR64); }
318 inline bool IsGR32(RegId r) { return ((r >= 16 && r <= 23)) || ((r >= 80 && r <= 95)); }
319 inline bool IsGR32(RegClassId rc) { return rc == RC_GR32 || (rc == RC_GR64); }
320 inline bool IsVR128(RegId r) { return ((r >= 96 && r <= 103)) || ((r >= 128 && r <= 135)) || ((r >= 160 && r <= 167)); }
321 inline bool IsVR128(RegClassId rc) { return rc == RC_VR128 || rc == RC_VR256 || rc == RC_VR512; }
322 inline bool IsVR256(RegId r) { return ((r >= 128 && r <= 135)) || ((r >= 160 && r <= 167)); }
323 inline bool IsVR256(RegClassId rc) { return rc == RC_VR256 || rc == RC_VR512; }
324 inline bool IsVR512(RegId r) { return ((r >= 160 && r <= 167)); }
325 inline bool IsVR512(RegClassId rc) { return rc == RC_VR512; }
326 inline bool IsFLAGS(RegId r) { return ((r >= 1 && r <= 8)); }
327 inline bool IsFLAGS(RegClassId rc) { return rc == RC_FLAGS; }
329 struct GR8Ref : public Ref<VirtualRegister> {
330 GR8Ref() = delete;
331 GR8Ref(const GR8Ref& other) = default;
332 void operator =(const GR8Ref& other) = default;
333 template<const VirtualRegister * VR>
334 GR8Ref(RegLookup<VR, RSC_GR8L> r) : Ref<VirtualRegister>(VR) {}
335 template<const VirtualRegister * VR>
336 GR8Ref(RegLookup<VR, RSC_GR8H> r) : Ref<VirtualRegister>(VR) {}
337 GR8Ref(const VirtualRegister *r) : Reg<VirtualRegister>(r) { assert(IsGR8(getRegClass())); }
338 GR8Ref(Ref<VirtualRegister> r) : Ref<VirtualRegister>(r) { assert(IsGR8(getRegClass())); }
340 struct GR16Ref : public Ref<VirtualRegister> {
341 GR16Ref() = delete;
342 GR16Ref(const GR16Ref& other) = default;
343 void operator =(const GR16Ref& other) = default;
344 template<const VirtualRegister * VR>
345 GR16Ref(RegLookup<VR, RSC_GR16> r) : Ref<VirtualRegister>(VR) {}
346 template<const VirtualRegister * VR>
347 GR16Ref(RegLookup<VR, RSC_GR32> r) : Ref<VirtualRegister>(VR) {}
348 GR16Ref(const VirtualRegister *r) : Reg<VirtualRegister>(r) { assert(IsGR16(getRegClass())); }
349 GR16Ref(Ref<VirtualRegister> r) : Ref<VirtualRegister>(r) { assert(IsGR16(getRegClass())); }
351 struct GR32Ref : public Ref<VirtualRegister> {
352 GR32Ref() = delete;
353 GR32Ref(const GR32Ref& other) = default;
354 void operator =(const GR32Ref& other) = default;
355 template<const VirtualRegister * VR>
356 GR32Ref(RegLookup<VR, RSC_GR32> r) : Ref<VirtualRegister>(VR) {}
357 GR32Ref(const VirtualRegister *r) : Reg<VirtualRegister>(r) { assert(IsGR32(getRegClass())); }
358 GR32Ref(Ref<VirtualRegister> r) : Ref<VirtualRegister>(r) { assert(IsGR32(getRegClass())); }
360 struct VR128Ref : public Ref<VirtualRegister> {
361 VR128Ref() = delete;
362 VR128Ref(const VR128Ref& other) = default;
363 void operator =(const VR128Ref& other) = default;
364 template<const VirtualRegister * VR>
365 VR128Ref(RegLookup<VR, RSC_VR128> r) : Ref<VirtualRegister>(VR) {}
366 template<const VirtualRegister * VR>
367 VR128Ref(RegLookup<VR, RSC_VR256> r) : Ref<VirtualRegister>(VR) {}
368 template<const VirtualRegister * VR>
369 VR128Ref(RegLookup<VR, RSC_VR512> r) : Ref<VirtualRegister>(VR) {}
370 VR128Ref(const VirtualRegister *r) : Reg<VirtualRegister>(r) { assert(IsVR128(getRegClass())); }
371 VR128Ref(Ref<VirtualRegister> r) : Ref<VirtualRegister>(r) { assert(IsVR128(getRegClass())); }
373 struct VR256Ref : public Ref<VirtualRegister> {
374 VR256Ref() = delete;
375 VR256Ref(const VR256Ref& other) = default;
376 void operator =(const VR256Ref& other) = default;
377 template<const VirtualRegister * VR>
378 VR256Ref(RegLookup<VR, RSC_VR256> r) : Ref<VirtualRegister>(VR) {}
379 template<const VirtualRegister * VR>
380 VR256Ref(RegLookup<VR, RSC_VR512> r) : Ref<VirtualRegister>(VR) {}
381 VR256Ref(const VirtualRegister *r) : Reg<VirtualRegister>(r) { assert(IsVR256(getRegClass())); }
382 VR256Ref(Ref<VirtualRegister> r) : Ref<VirtualRegister>(r) { assert(IsVR256(getRegClass())); }
384 struct VR512Ref : public Ref<VirtualRegister> {
385 VR512Ref() = delete;
386 VR512Ref(const VR512Ref& other) = default;
387 void operator =(const VR512Ref& other) = default;
388 template<const VirtualRegister * VR>
389 VR512Ref(RegLookup<VR, RSC_VR512> r) : Ref<VirtualRegister>(VR) {}
390 VR512Ref(const VirtualRegister *r) : Reg<VirtualRegister>(r) { assert(IsVR512(getRegClass())); }
391 VR512Ref(Ref<VirtualRegister> r) : Ref<VirtualRegister>(r) { assert(IsVR512(getRegClass())); }
393 struct FLAGSRef : public Ref<VirtualRegister> {
394 FLAGSRef() = delete;
395 FLAGSRef(const FLAGSRef& other) = default;
396 void operator =(const FLAGSRef& other) = default;
397 template<const VirtualRegister * VR>
398 FLAGSRef(RegLookup<VR, RSC_FLAGSR> r) : Ref<VirtualRegister>(VR) {}
399 FLAGSRef(const VirtualRegister *r) : Reg<VirtualRegister>(r) { assert(IsFLAGS(getRegClass())); }
400 FLAGSRef(Ref<VirtualRegister> r) : Ref<VirtualRegister>(r) { assert(IsFLAGS(getRegClass())); }
403 typedef GR32Ref GRRef;
405 } // end of namespace jitcs::x86_32
406 } // end of namespace jitcs
407 #endif
408 // _JITCS_X86_32_REGS_H_