From 389f73d2f8b0459153b401807f688a375da0075f Mon Sep 17 00:00:00 2001 From: Dirk Steinke Date: Thu, 4 Sep 2014 01:43:00 +0200 Subject: [PATCH] Adding copyright notices to most files. Also add readme file, and some others. --- COPYRIGHT | 33 ++++++++++ HOW-TO-BUILD | 16 +++++ HOW-TO-USE | 6 ++ README | 104 ++++++++++++++++++++++++++++++ REGISTER-ALLOCATION | 8 +++ include/jitcs.h | 34 +++++++++- include/jitcs_adt_bitstore.h | 7 +- include/jitcs_adt_enumerator.h | 8 ++- include/jitcs_adt_range.h | 8 ++- include/jitcs_adt_ref.h | 17 +++-- include/jitcs_adt_refcounter.h | 6 +- include/jitcs_adt_slice.h | 6 ++ include/jitcs_base.h | 7 +- include/jitcs_bblock.h | 9 +-- include/jitcs_callingconvention.h | 10 ++- include/jitcs_cpu.h | 11 ++-- include/jitcs_dumper.h | 10 ++- include/jitcs_fnctypeinfo.h | 6 ++ include/jitcs_function.h | 9 +-- include/jitcs_ids.h | 7 +- include/jitcs_instruction.h | 10 ++- include/jitcs_instructionstream.h | 7 +- include/jitcs_machine.h | 14 ++-- include/jitcs_memmgr.h | 8 ++- include/jitcs_memref.h | 13 ++-- include/jitcs_refs.h | 26 -------- include/jitcs_spillslotinfo.h | 13 ++-- include/jitcs_tmpalloc.h | 12 ++-- include/jitcs_typefuncs.h | 19 ------ include/jitcs_x86_xx_cons.lh | 9 ++- include/jitcs_x86_xx_insids.lh | 8 ++- include/jitcs_x86_xx_machine.lh | 7 +- include/jitcs_x86_xx_regs.lh | 8 ++- openissues.txt | 2 - src/data/x86_insalias.ltxt | 11 +++- src/data/x86_inslist.ltxt | 10 ++- src/data/x86_reglist.ltxt | 7 +- src/jitcs_int.h | 8 ++- src/jitcs_int_adt_bitmap.h | 13 ++-- src/jitcs_int_adt_dynslice.h | 11 ++-- src/jitcs_int_adt_heap.h | 10 +-- src/jitcs_int_adt_smallheap.h | 10 +-- src/jitcs_int_adt_tmpvector.h | 10 +-- src/jitcs_int_bblock_impl.h | 8 ++- src/jitcs_int_bitfuncs.h | 10 +++ src/jitcs_int_callingconvention_impl.h | 6 +- src/jitcs_int_cfg_analysis.h | 11 +++- src/jitcs_int_codegenerator.h | 7 +- src/jitcs_int_dfg_analysis.h | 16 ++++- src/jitcs_int_function_impl.h | 7 +- src/jitcs_int_machine.h | 11 ++-- src/jitcs_int_power2funcs.h | 7 ++ src/jitcs_int_virtualregister.h | 11 ++-- src/src/adt_bitmap.cpp | 12 ++++ src/src/bblock.cpp | 7 ++ src/src/bblock_impl.cpp | 10 +++ src/src/callingconvention.cpp | 7 ++ src/src/callingconvention_impl.cpp | 7 ++ src/src/cfg_analysis.cpp | 13 ++++ src/src/codegenerator.cpp | 7 ++ src/src/cpu.cpp | 11 ++++ src/src/dfg_analysis.cpp | 18 ++++++ src/src/dumper.cpp | 10 ++- src/src/function.cpp | 7 ++ src/src/function_impl.cpp | 7 ++ src/src/host.cpp | 7 ++ src/src/machine.cpp | 10 +++ src/src/main.cpp | 6 -- src/src/memmgr.cpp | 16 ++++- src/src/spillslotinfo.cpp | 13 ++++ src/src/tmpalloc.cpp | 11 +++- src/src/virtualregister.cpp | 10 +++ src/x86/jitcs_int_x86_xx_dumper.lh | 7 +- src/x86/jitcs_int_x86_xx_machine.lh | 5 +- src/x86/jitcs_int_x86_xx_regs.lh | 7 +- src/x86/src/x86_xx_callingconvention.lcpp | 7 ++ src/x86/src/x86_xx_codegen.lcpp | 18 ++++-- src/x86/src/x86_xx_dumper.lcpp | 7 ++ src/x86/src/x86_xx_ins2reg.lcpp | 7 ++ src/x86/src/x86_xx_insinfo.lcpp | 8 +++ src/x86/src/x86_xx_machine.lcpp | 7 ++ src/x86/src/x86_xx_regs.lcpp | 7 ++ tests/cpuinfo.cpp | 9 +++ tests/test_adt_bitmap.cpp | 7 ++ tests/test_adt_heap.cpp | 7 ++ tests/test_adt_range.cpp | 7 ++ tests/test_adt_slice.cpp | 7 ++ tests/test_adt_smallheap.cpp | 7 ++ tests/test_adt_tmpvector.cpp | 7 ++ tests/test_allinstructions.cpp | 12 ++++ tests/test_asm.cpp | 9 +++ tests/test_asm.h | 9 +++ tests/test_asm_x86_xx.lh | 11 ++++ tests/test_asm_x86_xx_ext.lcpp | 10 +++ tests/test_asm_x86_xx_ins.lcpp | 9 +++ tests/test_asm_x86_xx_reg.lcpp | 9 +++ tests/test_bitfuncs.cpp | 7 ++ tests/test_callingconvention.cpp | 7 ++ tests/test_cfg_analysis.cpp | 7 ++ tests/test_dfg_analysis.cpp | 7 ++ tests/test_fnctypeinfo.cpp | 7 ++ tests/test_main.cpp | 10 +++ tests/test_power2funcs.cpp | 7 ++ tests/test_simplecodegen.cpp | 7 ++ tests/test_simplefunction.cpp | 7 ++ tests/test_unittest.cpp | 7 ++ tests/unittest.h | 7 ++ tools/emblua.lua | 12 ++++ tools/template2source.lua | 11 ++++ tools/x86_insalias2data.lua | 9 +++ tools/x86_inslist2data.lua | 9 +++ tools/x86_instool.lua | 9 +++ tools/x86_reglist2data.lua | 11 ++++ 113 files changed, 1006 insertions(+), 186 deletions(-) create mode 100644 COPYRIGHT create mode 100644 HOW-TO-BUILD create mode 100644 HOW-TO-USE create mode 100644 README create mode 100644 REGISTER-ALLOCATION delete mode 100644 include/jitcs_refs.h delete mode 100644 include/jitcs_typefuncs.h delete mode 100644 src/src/main.cpp diff --git a/COPYRIGHT b/COPYRIGHT new file mode 100644 index 0000000..f0b3742 --- /dev/null +++ b/COPYRIGHT @@ -0,0 +1,33 @@ +=============================================================================== +JITCS - Just-In-Time Compiler System. + +Copyright (C) 2013-2014 Dirk Steinke. All rights reserved. + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + +[ MIT license: http://www.opensource.org/licenses/mit-license.php ] + +=============================================================================== +[ JITCS contains code based on Doug Leah's dlmalloc. ] + +This is a version (aka dlmalloc) of malloc/free/realloc written by +Doug Lea and released to the public domain, as explained at +http://creativecommons.org/licenses/publicdomain + +=============================================================================== diff --git a/HOW-TO-BUILD b/HOW-TO-BUILD new file mode 100644 index 0000000..9f13eea --- /dev/null +++ b/HOW-TO-BUILD @@ -0,0 +1,16 @@ +How to build JITCS 0.01 +----------------------- + +WARNING: +Don't. REALLY. +The build process is currently only run on a Win7 box, with a MingW 32-bit gcc +compiler, and additionally requires a Lua installation and a recent NASM +installation. + +The build process is currently based on a makefile, but switching to cmake is +at least considered. + +JITCS requires a fully compatible C++11 compiler, so a recent gcc or clang +compiler will do, but MSVC 2012 or MSVC 2013 might not. Compatibility with +several compilers, make tools, Lua and NASM versions will be tested and +provided here at a later point. diff --git a/HOW-TO-USE b/HOW-TO-USE new file mode 100644 index 0000000..e419011 --- /dev/null +++ b/HOW-TO-USE @@ -0,0 +1,6 @@ +How to use JITCS 0.01 +--------------------- + +Since it's still incomplete, you can't really use it. Once that is fixed, +this file will contain information on how to compile assembler functions +at runtime for your favorite platform (if it is supported). diff --git a/README b/README new file mode 100644 index 0000000..0ad8168 --- /dev/null +++ b/README @@ -0,0 +1,104 @@ +README for JITCS 0.01 +--------------------- + +JITCS a.k.a. Just-In-Time-Compiler-System will become a just-in-time assembler +on all platforms where this service is plausible (e.g. Windows, MacOS X, Linux, +and Android, but NOT iOS or Windows Phone). Usage is targeted at applications +where compilation speed and code quality are both important, e.g. emulation. + +JITCS is Copyright (C) 2013-2014 Dirk Steinke. +JITCS is free software, released under the MIT license. +See full Copyright Notice in the COPYRIGHT file or in include/jitcs.h. + +WARNING: The library is currently not fit for ANY purpose, and is severely +lacking documention. You MAY study its general design principles, but +unfortunately, the most interesting parts are still to come. + +The goals of JITCS are simple: +- require minimal overhead +- provide fast compilation time +- provide good code quality +- generate as much target dependent source code as possible from data + descriptions +- be available on all platforms supporting JIT compiling + +Concerning multithreading: JITCS is reentrant, so different compiler objects +can be used by different threads, BUT JITCS is not using mutexes for anything, +so DO NOT share a compiler object across threads unless you do the +synchronizaton yourself. + +At the moment, the scope of JITCS is limited to JIT assembly. There are three +subproblems concerning assembly: instruction selection, instruction scheduling +and register selection. +- Instruction selection: the type of operation is in most cases already + determined by the code developper (e.g. addition or multiplation), and most + of the time also the data on which the operation is working (e.g. int, float + or vector of bytes). + Using an IR to abstract from the actual hardware makes hardly sense in a + situation where the target hardware is mostly already determined (e.g. x86 on + Windows/Linux, ARM on Android/iOS). Due to its abstract nature, IR is better + suited for instruction combining, especially on 32-bit ARM, where many shift + instructions can be combined with arithmetic or logical operations. + The JITCS assembly stage assumes, that the best possibly instruction for the + current operation has already been selected. +- Instruction scheduling: while out-of-order architectures like x86 and modern + ARM do not benefit as greatly as older architectures from latency-based + scheduling, there are cases where they do. on the other hand, latency and + port-usage differs greatly between different versions of x86 for the same + instruction. so a JIT assembler should MEASURE the current architecture's + instruction latencies and port-usage, and NOT rely on built-in tables. + While there are ideas, on how to achieve that, JITCS just assumes that the + out-of-order target architecture will do the job good enough. +- Register selection: register allocation is basically a caching scheme. + Concerning the latencies for memory accesses (especially, if the memory is + NOT in L1 cache), it is good practice to avoid having to reload registers + from memory more often than necessary. If the exact size of the available + register file is not known to the code developper, or if he DOES NOT WANT to + worry about it, a good assembler should provide for a reasonably good + allocation scheme. Of course, the better the scheme, the longer the required + compilation times. + JITCS will provide for several levels of allocation quality. NONE of them + will beat the allocation quality of gcc or LLVM, but the best level should be + at least close, while still taking less time. + +To do a good job on register allocation for native instructions, JITCS provides +data files describing all necessary information required for any native +instruction to be handled by JITCS. During the build process, these data files +are transformed into C++ source code meant to handle the native instructions. +The required information for each instruction comprises: +- type and names of parameters (for instruction constructors) +- usage of register parameters : used and/or defined (for dataflow analysis) +- usage of implicit registers (e.g. EFLAGS on x86, for dataflow analysis) +- ISA requirements (to test if a certain instruction can be run on the current + host cpu) +- description of instruction encoding (to turn the instruction object into + machine code) +- operand folding (e.g. folding a memory load operation into a + register-register operation on x86) + +Alternatives: +------------- +Concerning just-in-time compilation, there are several alternatives available. +Examples are: +- xbyak: + It is a very fast, directly encoding, just-in-time assembler for x86 with + minimal overhead. The user is responsible for choosing instruction, + scheduling and registers. + The Library is header files only. +- LLVM/MCJIT: + A just-in-time compiler based on the popular LLVM library. It provides target + independence, a full-fledged optimization support, superior code generation + and a vast developper community. + Disadvantages are a rather low compilation speed and large library + dependencies (several megabyte). +- AsmJit: + X86. Instructions are temporarily stored with their operands, before the + machine code is generated in the second phase. It does not provide help with + instruction selection or scheduling, but offers help with register selection + (a.k.a. allocation). The allocator uses a rather naive scheme, and needs help + for good code generation. + The Library size is small (maybe 100-200k?). + +JITCS resembles in design AsmJit. It is slower than xbyak, and produces worse +code than LLVM. JITCS will employ a much more sophisticated register allocator +than AsmJit. \ No newline at end of file diff --git a/REGISTER-ALLOCATION b/REGISTER-ALLOCATION new file mode 100644 index 0000000..ebd8e2c --- /dev/null +++ b/REGISTER-ALLOCATION @@ -0,0 +1,8 @@ +Register allocation in JITCS +---------------------------- + +This file will contain the description of the register allocation scheme as +is provided by JITCS, at some point in the future. + +JITCS is more or less a library written around that register allocator, so it +deserves a detailed description, even if the rest of JITCS does not. diff --git a/include/jitcs.h b/include/jitcs.h index a8d1c01..f8639a1 100644 --- a/include/jitcs.h +++ b/include/jitcs.h @@ -1,5 +1,37 @@ -//===-- jitcs.h - Glue for JITCS --------------------------------*- C++ -*-===// +//===-- jitcs.h -------------------------------------------------*- C++ -*-===// +/* +Copyright (C) 2013-2014 Dirk Steinke. All rights reserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +[ MIT license: http://www.opensource.org/licenses/mit-license.php ] +*/ +//===----------------------------------------------------------------------===// +// Glue for JITCS. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Clients may simply include this file if all they want is building functions +// for the host architecture. Register names and instructions will be available +// in the jitcs::host namespace. //===----------------------------------------------------------------------===// #ifndef _JITCS_H_ diff --git a/include/jitcs_adt_bitstore.h b/include/jitcs_adt_bitstore.h index 707dc13..b429edd 100644 --- a/include/jitcs_adt_bitstore.h +++ b/include/jitcs_adt_bitstore.h @@ -1,8 +1,11 @@ -//===-- jitcs_adt_bitstore.h - bit vector type ------------------*- C++ -*-===// +//===-- jitcs_adt_bitstore.h ------------------------------------*- C++ -*-===// +// A fixed-size bit array class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // // A BitStore contains a fixed number of bits, and uses either an array // of bytes or a single integer variable for storage. -// //===----------------------------------------------------------------------===// #ifndef _JITCS_ADT_BITSTORE_H_ diff --git a/include/jitcs_adt_enumerator.h b/include/jitcs_adt_enumerator.h index 3f77c05..fbfaa59 100644 --- a/include/jitcs_adt_enumerator.h +++ b/include/jitcs_adt_enumerator.h @@ -1,6 +1,12 @@ -//===-- jitcs_adt_enumerator.h - --------------------------------*- C++ -*-===// +//===-- jitcs_adt_enumerator.h ----------------------------------*- C++ -*-===// +// An abstract enumeration helper for object lists. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// The point of an enumerator is to provide the means to enumerate lists of +// objects, while hiding the implementation detail on the exact structure of +// the list. The enumeration is done like in the D Language input range. //===----------------------------------------------------------------------===// #ifndef _JITCS_ADT_ENUMERATOR_H_ diff --git a/include/jitcs_adt_range.h b/include/jitcs_adt_range.h index ea42603..faec935 100644 --- a/include/jitcs_adt_range.h +++ b/include/jitcs_adt_range.h @@ -1,13 +1,17 @@ -//===-- jitcs_adt_slice.h ---------------------------------------*- C++ -*-===// +//===-- jitcs_adt_range.h ---------------------------------------*- C++ -*-===// +// A not so abstract enumeration helper for object lists. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// The interface of Range is based on D Language input range. In principle, it +// is just a pair of iterators. //===----------------------------------------------------------------------===// #ifndef _JITCS_ADT_RANGE_H_ #define _JITCS_ADT_RANGE_H_ #include "jitcs_base.h" -#include "jitcs_typefuncs.h" namespace jitcs { // simple range for array-like slices diff --git a/include/jitcs_adt_ref.h b/include/jitcs_adt_ref.h index 1ea25a2..0de49a8 100644 --- a/include/jitcs_adt_ref.h +++ b/include/jitcs_adt_ref.h @@ -1,12 +1,15 @@ -//===-- jitcs_adt_ref.h - pointer helper type -------------------*- C++ -*-===// +//===-- jitcs_adt_ref.h -----------------------------------------*- C++ -*-===// +// An attributed pointer class. // -// This file contains two pointer types. The first, Ref, represents a single -// pointer, which CANNOT be NULL. Data access is possible thru the use of -// the -> operator. The second type, RefOrNull, represents a pointer which -// CAN be NULL. Access to the pointed-to data by usage of the method -// removeNullType. (The principle of this is taken from the language Ceylon -// which, according to my understanding, handles null pointer quite nicely.) +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// A Ref or RefOrNull pointer object NEVER owns the object pointed to. +// A Ref pointer can never contain a null pointer. A RefOrNull object cannot +// directly use the -> operator. You can check for isNull(), and +// removeNullType() if it is not. +// (The principle of this is taken from the language Ceylon which, according +// to my understanding, handles null pointers quite nicely.) //===----------------------------------------------------------------------===// #ifndef _JITCS_ADT_REF_H_ diff --git a/include/jitcs_adt_refcounter.h b/include/jitcs_adt_refcounter.h index 3d4ec03..8a8a7ef 100644 --- a/include/jitcs_adt_refcounter.h +++ b/include/jitcs_adt_refcounter.h @@ -1,6 +1,10 @@ -//===-- jitcs_adt_refcounter.h - pointer helper type ------------*- C++ -*-===// +//===-- jitcs_adt_refcounter.h ----------------------------------*- C++ -*-===// +// A reference-counted, object owning, not-thread-safe pointer class. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Do NOT share a RefCounter handled object across threads. //===----------------------------------------------------------------------===// #ifndef _JITCS_ADT_REFCOUNTER_H_ diff --git a/include/jitcs_adt_slice.h b/include/jitcs_adt_slice.h index 33c0421..05b29aa 100644 --- a/include/jitcs_adt_slice.h +++ b/include/jitcs_adt_slice.h @@ -1,6 +1,12 @@ //===-- jitcs_adt_slice.h ---------------------------------------*- C++ -*-===// +// A reference to a array of objects. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// A Slice is a pure reference type. It NEVER owns the memory it points to. +// A Slice is pair of pointer and size/count, and is based on the D Language +// array slice. //===----------------------------------------------------------------------===// #ifndef _JITCS_ADT_SLICE_H_ diff --git a/include/jitcs_base.h b/include/jitcs_base.h index 626d2f9..6ded143 100644 --- a/include/jitcs_base.h +++ b/include/jitcs_base.h @@ -1,7 +1,10 @@ -//===-- jitcs_base.h C++ ------------------------------------------------*-===// -// +//===-- jitcs_base.h --------------------------------------------*- C++ -*-===// // Definition of basic types and basic macros. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Almost all other source files of JITCS include this header. //===----------------------------------------------------------------------===// #ifndef _JITCS_BASE_H_ diff --git a/include/jitcs_bblock.h b/include/jitcs_bblock.h index b773c3d..ce4c393 100644 --- a/include/jitcs_bblock.h +++ b/include/jitcs_bblock.h @@ -1,10 +1,11 @@ -//===-- jitcs_bblock.h - a representation of a basic block ------*- C++ -*-===// +//===-- jitcs_bblock.h ------------------------------------------*- C++ -*-===// +// The public representation of a BasicBlock as used in JITCS. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // -// The BasicBlock class is an interface to the actual basic block used inside -// the library. All implementation details are hidden from outside users. // Enumeration of predecessors, successors and instructions is possible, but // slow. -// //===----------------------------------------------------------------------===// #ifndef _JITCS_BBLOCK_H_ diff --git a/include/jitcs_callingconvention.h b/include/jitcs_callingconvention.h index fab7959..280f336 100644 --- a/include/jitcs_callingconvention.h +++ b/include/jitcs_callingconvention.h @@ -1,6 +1,14 @@ -//===-- jitcs_callconv.h - --------------------------------------*- C++ -*-===// +//===-- jitcs_callingconvention.h -------------------------------*- C++ -*-===// +// Public interface to a function ABI object. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// The calling convention object defines all relevant information necessary +// for the code generators to generate functions of the given type, and calls +// to functions of the given type. +// Calling convention objects are currently created only thru the MachineInfo +// objects. //===----------------------------------------------------------------------===// #ifndef _JITCS_CALLINGCONVENTION_H_ diff --git a/include/jitcs_cpu.h b/include/jitcs_cpu.h index ef94ddb..a91afab 100644 --- a/include/jitcs_cpu.h +++ b/include/jitcs_cpu.h @@ -1,9 +1,12 @@ -//===-- jitcs_cpu.h - CPU feature detection ---------------------*- C++ -*-===// +//===-- jitcs_cpu.h ---------------------------------------------*- C++ -*-===// +// CPU feature description and detection. // -// Helper object allowing the detecting of instruction set features of the -// host cpu. -// TODO: Think of a way to handle cross compilation! +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Sets up an architecture and relevant feature flags. Has the architecture +// A_Host, which will run a feature detection of the host running the +// applicaton. //===----------------------------------------------------------------------===// #ifndef _JITCS_CPU_H_ diff --git a/include/jitcs_dumper.h b/include/jitcs_dumper.h index c2d69f2..c8a9d26 100644 --- a/include/jitcs_dumper.h +++ b/include/jitcs_dumper.h @@ -1,6 +1,14 @@ -//===-- jitcs_dumper.h - ----------------------------------------*- C++ -*-===// +//===-- jitcs_dumper.h ------------------------------------------*- C++ -*-===// +// Helper for printing information for debug purposes. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// A lot of classes of JITCS accept an IDumper interface for writing +// information, which e.g. PrintFDumper implements. MachineDumper dumper +// provides target specific dumping support. Using it will pull in some big +// data tables into the application, so it should be avoided except for +// debug purposes. //===----------------------------------------------------------------------===// #ifndef _JITCS_DUMPER_H_ diff --git a/include/jitcs_fnctypeinfo.h b/include/jitcs_fnctypeinfo.h index 074cca6..12c1a9c 100644 --- a/include/jitcs_fnctypeinfo.h +++ b/include/jitcs_fnctypeinfo.h @@ -1,5 +1,11 @@ //===-- jitcs_fnctypeinfo.h - -----------------------------------*- C++ -*-===// +// Function type deconstructor. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// The helper functions in this header are used by the code constructing +// default calling convention objects. //===----------------------------------------------------------------------===// #ifndef _JITCS_FNCTYPEINFO_H_ diff --git a/include/jitcs_function.h b/include/jitcs_function.h index 2dbc4ed..41c27cc 100644 --- a/include/jitcs_function.h +++ b/include/jitcs_function.h @@ -1,9 +1,10 @@ -//===-- jitcs_function.h - a representation of a function -------*- C++ -*-===// +//===-- jitcs_function.h ----------------------------------------*- C++ -*-===// +// The public representation of a Function as used in JITCS. // -// The Function class is an interface to the actual function provided by the -// library. All implementation details are hidden from outside users. -// Enumeration of basic blocks and virtual registers is possible, but slow. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Enumeration of basic blocks and virtual registers is possible, but slow. //===----------------------------------------------------------------------===// #ifndef _JITCS_FUNCTION_H_ diff --git a/include/jitcs_ids.h b/include/jitcs_ids.h index 234a8d5..03ce5b9 100644 --- a/include/jitcs_ids.h +++ b/include/jitcs_ids.h @@ -1,7 +1,10 @@ -//===-- jitcs_ids.h - ID types for instructions et al. ----------*- C++ -*-===// -// +//===-- jitcs_ids.h ---------------------------------------------*- C++ -*-===// +// ID types for instructions et al. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Defining these types here avoids certain include-order problems. //===----------------------------------------------------------------------===// #ifndef _JITCS_IDS_H_ diff --git a/include/jitcs_instruction.h b/include/jitcs_instruction.h index f3e99e1..3ace21c 100644 --- a/include/jitcs_instruction.h +++ b/include/jitcs_instruction.h @@ -1,7 +1,13 @@ -//===-- jitcs_instruction.h - interface to single instruction ---*- C++ -*-===// -// +//===-- jitcs_instruction.h -------------------------------------*- C++ -*-===// +// Interface to a single instruction object. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Actually, multiple instructions are stored as an array of iptr, and +// Instruction is only used as a typecast from a pointer to those iptr. +// Instructions are never hand-constructed by the application, but the +// application uses helper functions in jitcs_{arch}_cons.h. //===----------------------------------------------------------------------===// #ifndef _JITCS_INSTRUCTION_H_ diff --git a/include/jitcs_instructionstream.h b/include/jitcs_instructionstream.h index 8b88cee..0547d41 100644 --- a/include/jitcs_instructionstream.h +++ b/include/jitcs_instructionstream.h @@ -1,7 +1,10 @@ -//===-- jitcs_instructionstream.h - blockwise instructions ------*- C++ -*-===// -// +//===-- jitcs_instructionstream.h -------------------------------*- C++ -*-===// +// Helper to construct instructions en bloc. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Used by e.g. jitcs_{arch}_cons.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INSTRUCTIONSTREAM_H_ diff --git a/include/jitcs_machine.h b/include/jitcs_machine.h index 517f1cb..2d6b011 100644 --- a/include/jitcs_machine.h +++ b/include/jitcs_machine.h @@ -1,10 +1,14 @@ -//===-- jitcs_machine.h - Machine info --------------------------*- C++ -*-===// +//===-- jitcs_machine.h -----------------------------------------*- C++ -*-===// +// Target machine info // -// IMachineInfo holds the complete state necessary for the compiler component -// to handle machine instructions for a particular machine. Particular -// architectures (e.g. x86) are defined in different header files and will fill -// in all fields with the relevant values. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// IMachineInfo provides helpers to create calling convention objects and +// function. Particular architectures (e.g. x86) are defined in different +// header files and will fill in especially IMachineDetails. IMachineDetails +// contains all information necessary for the compiler component, but is of no +// interest to clients. //===----------------------------------------------------------------------===// #ifndef _JITCS_MACHINE_H_ diff --git a/include/jitcs_memmgr.h b/include/jitcs_memmgr.h index a79ff0f..5b29567 100644 --- a/include/jitcs_memmgr.h +++ b/include/jitcs_memmgr.h @@ -1,9 +1,11 @@ -//===-- jitcs_memmgr.h - A memory manager for code and data -----*- C++ -*-===// +//===-- jitcs_memmgr.h ------------------------------------------*- C++ -*-===// +// A memory manager for code and data +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // // The manager is an allocator based on Doug Leah's malloc. Memory is allocated // from the system with execution permission. -// TODO: -// //===----------------------------------------------------------------------===// #ifndef _JITCS_MEMMGR_H_ diff --git a/include/jitcs_memref.h b/include/jitcs_memref.h index e5bb799..cbdecf9 100644 --- a/include/jitcs_memref.h +++ b/include/jitcs_memref.h @@ -1,12 +1,13 @@ -//===-- jitcs_memref.h - memory parameters in instructions -----*- C++ -*-===// +//===-- jitcs_memref.h ------------------------------------------*- C++ -*-===// +// Memory operands in instructions +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // // A MemoryReference contains all data necessary to describe the memory -// parameter of a single hardware instruction. If a MemoryReference contains +// operand of a single hardware instruction. If a MemoryReference contains // uses of a non-fixed virtual register, and is used in more than one -// instruction, copies will be created at register allocation time. -// -// TODO: The source looks rather ugly right now. -// +// instruction, copies might be created at register allocation time. //===----------------------------------------------------------------------===// #ifndef _JITCS_MEMREF_H_ diff --git a/include/jitcs_refs.h b/include/jitcs_refs.h deleted file mode 100644 index 8e194a4..0000000 --- a/include/jitcs_refs.h +++ /dev/null @@ -1,26 +0,0 @@ -//===-- jitcs_ids.h - ID types for instructions et al. ----------*- C++ -*-===// -// -// -// -//===----------------------------------------------------------------------===// - -#ifndef _JITCS_REFS_H_ -#define _JITCS_REFS_H_ - -#include "jitcs_base.h" -#include "jitcs_adt_ref.h" - -namespace jitcs { - -class IFunction; -class IBasicBlock; -class Instruction; - -typedef Ref IFunctionRef; -typedef Ref IFunctionRef; -typedef Ref InstructionRef; - -} // end of namespace jitcs - -#endif -// _JITCS_REFS_H_ diff --git a/include/jitcs_spillslotinfo.h b/include/jitcs_spillslotinfo.h index 849f72d..10be8e5 100644 --- a/include/jitcs_spillslotinfo.h +++ b/include/jitcs_spillslotinfo.h @@ -1,9 +1,14 @@ -//===-- evm/registers.h - Class to represent a single basic block --*- C++ -*-===// +//===-- jitcs_spillslotinfo.h -----------------------------------*- C++ -*-===// +// Description of the spill slot position for virtual registers. // -// A basicblock contains nodes, and must end in a terminal instruction node. -// Nodes can be instructions, constants. Each node may produce more than one -// result. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// SpillSlotInfo can be used for all virtual registers, whose spill slot +// is at a memory location relative to one of the frame pointer registers, +// e.g. the stack pointer. For emulators it will be possible, to define +// virtual registers being spilled to and reloaded from the virtual machine +// state. //===----------------------------------------------------------------------===// #ifndef _JITCS_SPILLSLOTINFO_H_ diff --git a/include/jitcs_tmpalloc.h b/include/jitcs_tmpalloc.h index 9b61a58..d4ce9bd 100644 --- a/include/jitcs_tmpalloc.h +++ b/include/jitcs_tmpalloc.h @@ -1,9 +1,13 @@ -//===-- jitcs_tmpalloc.h - Never-free allocator class -----------*- C++ -*-===// +//===-- jitcs_tmpalloc.h ----------------------------------------*- C++ -*-===// +// Never-free allocator classes. // -// TempAllocator is a never-free allocator. All allocated data is written into -// a list of memory blocks. All data is freed en bloc. No destructors are -// called! +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// TempAllocator allocates data en bloc, and releases it all at once. +// No destructors are called on release. +// StreamAllocator speeds up allocating multiple objects with enhanced +// alignment requirements. //===----------------------------------------------------------------------===// #ifndef _JITCS_TMPALLOC_H_ diff --git a/include/jitcs_typefuncs.h b/include/jitcs_typefuncs.h deleted file mode 100644 index cbb2c7d..0000000 --- a/include/jitcs_typefuncs.h +++ /dev/null @@ -1,19 +0,0 @@ -//===-- jitcs_typefuncs.h ---------------------------------------*- C++ -*-===// -// -// -//===----------------------------------------------------------------------===// - -#ifndef _JITCS_TYPEFUNCS_H_ -#define _JITCS_TYPEFUNCS_H_ - -#include "jitcs_base.h" - -namespace jitcs { - -template struct ConstType; -template struct ConstType { typedef T Type; }; -template struct ConstType { typedef const T Type; }; - -} // end jitcs namespace -#endif -// _JITCS_TYPEFUNCS_H_ diff --git a/include/jitcs_x86_xx_cons.lh b/include/jitcs_x86_xx_cons.lh index 6e07b17..671a88e 100644 --- a/include/jitcs_x86_xx_cons.lh +++ b/include/jitcs_x86_xx_cons.lh @@ -15,11 +15,16 @@ /*| end, t, 0 /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end -//===-- jitcs_x86_%(N)_cons.h C++ -----------------------------------------*-===// +//===-- jitcs_x86_%(N)_cons.h -------------------------------------*- C++ -*-===// +// Helper functions to construct instruction objects for X86, %(N)-bit // -// Instruction constructors for %(N)bit x86 code. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Also contains helper functions to get the number of iptrs for a particular +// instruction or instruction class. //===----------------------------------------------------------------------===// + #ifndef _JITCS_X86_%(N)_CONS_H_ #define _JITCS_X86_%(N)_CONS_H_ diff --git a/include/jitcs_x86_xx_insids.lh b/include/jitcs_x86_xx_insids.lh index 45d91f3..8ce245d 100644 --- a/include/jitcs_x86_xx_insids.lh +++ b/include/jitcs_x86_xx_insids.lh @@ -14,10 +14,14 @@ /*| end, t, 0 /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end -//===-- jitcs_x86_%(N)_regs.h C++ -----------------------------------------*-===// +//===-- jitcs_x86_%(N)_insids.h -----------------------------------*- C++ -*-===// +// Instruction IDs for X86, %(N)-bit // -// Instruction and instruction class ids (+ condition codes) for %(N)bit x86 code. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Instructions are grouped as Instruction classes. This header adds some +// convenience functions for handling the instruction and class IDs. //===----------------------------------------------------------------------===// #ifndef _JITCS_X86_%(N)_INSIDS_H_ diff --git a/include/jitcs_x86_xx_machine.lh b/include/jitcs_x86_xx_machine.lh index 645dfc0..33d29f2 100644 --- a/include/jitcs_x86_xx_machine.lh +++ b/include/jitcs_x86_xx_machine.lh @@ -15,8 +15,13 @@ /*| end, t, 0 /*| end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end -//===-- jitcs_x86_%(N)_machine.h - Machine info -------------------*- C++ -*-===// +//===-- jitcs_x86_%(N)_machine.h ----------------------------------*- C++ -*-===// +// Helper function to retrieve the target machine info for X86, %(N)-bit // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// The details of the target info is not relevant to clients. //===----------------------------------------------------------------------===// #ifndef _JITCS_X86_%(N)_MACHINE_H_ diff --git a/include/jitcs_x86_xx_regs.lh b/include/jitcs_x86_xx_regs.lh index ea0107c..cee85d1 100644 --- a/include/jitcs_x86_xx_regs.lh +++ b/include/jitcs_x86_xx_regs.lh @@ -15,10 +15,14 @@ /*| end, t, 0 /*| end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end -//===-- jitcs_x86_%(N)_regs.h C++ -----------------------------------------*-===// +//===-- jitcs_x86_%(N)_regs.h C++ ---------------------------------*- C++ -*-===// +// Definition of register types and classes for X86, %(N)-bit // -// Register definitions for %(N)bit x86 code. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// Declares VirtualRegister objects for fixed register operands +// e.g. ADD_RR(is, EAX, EAX) //===----------------------------------------------------------------------===// #ifndef _JITCS_X86_%(N)_REGS_H_ diff --git a/openissues.txt b/openissues.txt index 52636b4..76662d5 100644 --- a/openissues.txt +++ b/openissues.txt @@ -1,6 +1,4 @@ todo: -- check opcode of ALL instructions -- reenable dataflow analysis local/global - reenable register allocation local (linearscan) - implement basic block clustering - create cross basic block live variables diff --git a/src/data/x86_insalias.ltxt b/src/data/x86_insalias.ltxt index 0e396c5..26f3fd0 100644 --- a/src/data/x86_insalias.ltxt +++ b/src/data/x86_insalias.ltxt @@ -1,7 +1,16 @@ #/bin/emblua LUAPREFIX=| |--VARDELIM=% |--CMTDELIM=// -| ------------------------------------ +| --=== src/data/x86_insalias.ltxt --------------------------------*- ? -*-===// +| -- Instruction alias descriptions for X86. +| -- +| -- Copyright (C) 2013-2014 Dirk Steinke. +| -- See copyright and license notice in COPYRIGHT or include/jitcs.h +| -- +| -- This handles only instruction names which need to behave differently on +| -- 32-bit and on 64-bit. e.g. MOV_RI, which sets a 32-bit register in +| -- 32-bit mode, and sets a 64-bit register in 64-bit mode. +| --===--------------------------------------------------------------------===// | ccs = {"O", "NO", "B", "AE", "E", "NE", "BE", "A", "S", "NS", "PE", "PO", "L", "GE", "LE", "G"} | ccalias={C = "B", NAE = "B", NB = "AE", NC = "AE", Z = "E", NZ = "NE", NA = "BE", NBE = "A", | P = "PE", NP = "PO", NGE = "L", NL = "GE", NG = "LE", NLE = "G"} diff --git a/src/data/x86_inslist.ltxt b/src/data/x86_inslist.ltxt index 8d2f31a..3fca7f5 100644 --- a/src/data/x86_inslist.ltxt +++ b/src/data/x86_inslist.ltxt @@ -2,7 +2,15 @@ |--VARDELIM=% |--CMTDELIM=// |--XDUMPSCRIPT=true -| ----------------------------------- +| --=== src/data/x86_inslist.ltxt --------------------------------*- ? -*-===// +| -- Instruction descriptions for X86. +| -- +| -- Copyright (C) 2013-2014 Dirk Steinke. +| -- See copyright and license notice in COPYRIGHT or include/jitcs.h +| -- +| -- To reduce the number of lines, a lot of loops and variables are used. +| -- Maybe a closer description will be placed here at a later time. +| --===--------------------------------------------------------------------===// | function imm(bits) return "i"..(bits <= 32 and bits or 32) end | function immv(bits) return imm(bits)..(bits > 8 and "_8" or "") end | function IMM(bits) return "!I"..(bits <= 32 and bits or 32) end diff --git a/src/data/x86_reglist.ltxt b/src/data/x86_reglist.ltxt index 2c7b689..602ea8e 100644 --- a/src/data/x86_reglist.ltxt +++ b/src/data/x86_reglist.ltxt @@ -2,7 +2,12 @@ /*| --VARDELIM=% /*| --CMTDELIM=// /*| --XDUMPSCRIPT=true -/*| ----------------------------------- +/*| --=== src/data/x86_reglist.ltxt -------------------------------*- ? -*-===// +/*| -- Register descriptions for X86. Currently UNUSED. +/*| -- +/*| -- Copyright (C) 2013-2014 Dirk Steinke. +/*| -- See copyright and license notice in COPYRIGHT or include/jitcs.h +/*| --===--------------------------------------------------------------------===// /*| local regsacdb = { "A", "C", "D", "B" } /*| local regsx = { "SP", "BP", "SI", "DI" } /*| local function hex2(n) return string.format("%02x", n) end diff --git a/src/jitcs_int.h b/src/jitcs_int.h index 39eace0..c6d28ae 100644 --- a/src/jitcs_int.h +++ b/src/jitcs_int.h @@ -1,5 +1,11 @@ -//===-- jitcs.h - Glue for JITCS --------------------------------*- C++ -*-===// +//===-- src/jitcs_int.h -----------------------------------------*- C++ -*-===// +// More glue for JITCS. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// This adds more target specific types, enums, etc. into the +// jitcs::host namespace. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_H_ diff --git a/src/jitcs_int_adt_bitmap.h b/src/jitcs_int_adt_bitmap.h index 5127eb9..df3c307 100644 --- a/src/jitcs_int_adt_bitmap.h +++ b/src/jitcs_int_adt_bitmap.h @@ -1,9 +1,13 @@ -//===-- evm/function.h - Class to represent a single basic block --*- C++ -*-===// +//===-- src/jitcs_int_adt_bitmap.h ------------------------------*- C++ -*-===// +// BitSlice class. // -// A basicblock contains nodes, and must end in a terminal instruction node. -// Nodes can be instructions, constants. Each node may produce more than one -// result. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// A BitSlice is a view to an array of words, and allows checking and setting +// single bits. A BitSlice does NOT own the data it points to. +// A DynBitSlice provides the data array for the BitSlice. It will use a +// fixed size array, or allocate the space from the heap. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_ADT_BITMAP_H_ @@ -13,7 +17,6 @@ #include "jitcs_adt_ref.h" #include "jitcs_int_bitfuncs.h" #include "jitcs_int_power2funcs.h" -#include "jitcs_typefuncs.h" #include diff --git a/src/jitcs_int_adt_dynslice.h b/src/jitcs_int_adt_dynslice.h index df02e9c..8d590e7 100644 --- a/src/jitcs_int_adt_dynslice.h +++ b/src/jitcs_int_adt_dynslice.h @@ -1,16 +1,17 @@ -//===-- evm/function.h - Class to represent a single basic block --*- C++ -*-===// +//===-- src/jitcs_int_adt_dynslice.h ----------------------------*- C++ -*-===// +// A data container attached to a Slice view. // -// A basicblock contains nodes, and must end in a terminal instruction node. -// Nodes can be instructions, constants. Each node may produce more than one -// result. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// A DynSlice provides the data array for the Slice. It will use a +// fixed size array, or allocate the space from the heap. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_ADT_DYNSLICE_H_ #define _JITCS_INT_ADT_DYNSLICE_H_ #include "jitcs_base.h" -#include "jitcs_typefuncs.h" #include "jitcs_adt_slice.h" namespace jitcs { diff --git a/src/jitcs_int_adt_heap.h b/src/jitcs_int_adt_heap.h index b4ea95b..50e7841 100644 --- a/src/jitcs_int_adt_heap.h +++ b/src/jitcs_int_adt_heap.h @@ -1,9 +1,11 @@ -//===-- evm/function.h - Class to represent a single basic block --*- C++ -*-===// +//===-- src/jitcs_int_adt_heap.h --------------------------------*- C++ -*-===// +// A binary heap object with an unlimited size. // -// A basicblock contains nodes, and must end in a terminal instruction node. -// Nodes can be instructions, constants. Each node may produce more than one -// result. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// While currently unused, it might be used in the cross-basicblock +// register allocation phase. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_ADT_HEAP_H_ diff --git a/src/jitcs_int_adt_smallheap.h b/src/jitcs_int_adt_smallheap.h index dbc7efe..9f2b1f8 100644 --- a/src/jitcs_int_adt_smallheap.h +++ b/src/jitcs_int_adt_smallheap.h @@ -1,9 +1,11 @@ -//===-- evm/function.h - Class to represent a single basic block --*- C++ -*-===// +//===-- src/jitcs_int_adt_smallheap.h ---------------------------*- C++ -*-===// +// A binary heap object with a limited size. // -// A basicblock contains nodes, and must end in a terminal instruction node. -// Nodes can be instructions, constants. Each node may produce more than one -// result. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// While currently unused, it might be used in the register allocator. +// The choice of which register to spill seems to fit this ADT perfectly. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_ADT_SMALLHEAP_H_ diff --git a/src/jitcs_int_adt_tmpvector.h b/src/jitcs_int_adt_tmpvector.h index 9bfa135..8a66992 100644 --- a/src/jitcs_int_adt_tmpvector.h +++ b/src/jitcs_int_adt_tmpvector.h @@ -1,9 +1,9 @@ -//===-- evm/function.h - Class to represent a single basic block --*- C++ -*-===// -// -// A basicblock contains nodes, and must end in a terminal instruction node. -// Nodes can be instructions, constants. Each node may produce more than one -// result. +//===-- src/jitcs_int_adt_tmpvector.h ---------------------------*- C++ -*-===// +// A vector like container object, which uses a TempAllocator for all +// allocations. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_ADT_TMPVECTOR_H_ diff --git a/src/jitcs_int_bblock_impl.h b/src/jitcs_int_bblock_impl.h index 642d01e..ce41b7f 100644 --- a/src/jitcs_int_bblock_impl.h +++ b/src/jitcs_int_bblock_impl.h @@ -1,7 +1,11 @@ -//===-- evm/bblock.h - a single basic block --*- C++ -*-===// +//===-- src/jitcs_int_bblock_impl.h -----------------------------*- C++ -*-===// +// BasicBlock implementation class. // -// A basic block contains a list of instructions. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// BasicBlockImpl objects are allocated from a TempAllocator, and their +// destructor is never called. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_BBLOCK_IMPL_H_ diff --git a/src/jitcs_int_bitfuncs.h b/src/jitcs_int_bitfuncs.h index fc569be..6a89222 100644 --- a/src/jitcs_int_bitfuncs.h +++ b/src/jitcs_int_bitfuncs.h @@ -1,3 +1,13 @@ +//===-- src/jitcs_int_bitfuncs.h --------------------------------*- C++ -*-===// +// Trailing-Zero/One-Count and population count. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Trailing-Zero-Count is used to find bit positions in bitmasks, and +// population count is probably used somewhere too. +//===----------------------------------------------------------------------===// + #ifndef _JITCS_INT_ADT_BITFUNCS_H_ #define _JITCS_INT_ADT_BITFUNCS_H_ diff --git a/src/jitcs_int_callingconvention_impl.h b/src/jitcs_int_callingconvention_impl.h index e9236f9..0343109 100644 --- a/src/jitcs_int_callingconvention_impl.h +++ b/src/jitcs_int_callingconvention_impl.h @@ -1,6 +1,8 @@ -//===-- jitcs_callconv.h - --------------------------------------*- C++ -*-===// -// +//===-- src/jitcs_int_callingconvention_impl.h ------------------*- C++ -*-===// +// Implementation class to handle calling convention object setup. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_CALLINGCONVENTION_IMPL_H_ diff --git a/src/jitcs_int_cfg_analysis.h b/src/jitcs_int_cfg_analysis.h index f4d92cc..4eeca7a 100644 --- a/src/jitcs_int_cfg_analysis.h +++ b/src/jitcs_int_cfg_analysis.h @@ -1,7 +1,14 @@ -//===-- evm/bblock.h - a single basic block --*- C++ -*-===// +//===-- src/jitcs_int_cfg_analysis.h ----------------------------*- C++ -*-===// +// Control flow graph analysis. // -// A basic block contains a list of instructions. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// The point of CFG analysis is twofold: it will generate an order of basic +// blocks for code generation, trying to keep any "fallthru" hint encountered. +// Secondly, it can, on request, try to determine to loop depth for each and +// every basic block. The used algorithm is probably slow for large sets +// of basic blocks with many loops. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_CFGANALYSIS_H_ diff --git a/src/jitcs_int_codegenerator.h b/src/jitcs_int_codegenerator.h index 940d3dc..042f87c 100644 --- a/src/jitcs_int_codegenerator.h +++ b/src/jitcs_int_codegenerator.h @@ -1,7 +1,8 @@ -//===-- evm/bblock.h - a single basic block --*- C++ -*-===// -// -// A basic block contains a list of instructions. +//===-- src/jitcs_int_codegenerator.h ---------------------------*- C++ -*-===// +// Code generation helper. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_CODEGENERATOR_H_ diff --git a/src/jitcs_int_dfg_analysis.h b/src/jitcs_int_dfg_analysis.h index 62c5365..69df45e 100644 --- a/src/jitcs_int_dfg_analysis.h +++ b/src/jitcs_int_dfg_analysis.h @@ -1,7 +1,19 @@ -//===-- evm/bblock.h - a single basic block --*- C++ -*-===// +//===-- src/jitcs_int_dfg_analysis.h ----------------------------*- C++ -*-===// +// Data flow graph analysis. // -// A basic block contains a list of instructions. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// The DFG has a local and a global phase. The local phase has O(I+B*R), with +// I the number of instructions, B the number of basic blocks and R the number +// of virtual registers. It collects all def-use information from all +// instructions in all basic blocks. It results in a set of used and defined +// registers for each basic blocks. (B*R is the result of clearing all bits +// at the start of each basic blocks analysis.) +// The global phase has O(B*R*R) worstcase runtime. (R is for the set of bits +// handled for each iteration, and B*R is the upper limit for increasing the +// number of set bits for each basic block.) The phase calculates the +// live-in bitset as live-out minus defined plus uses. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_DFGANALYSIS_H_ diff --git a/src/jitcs_int_function_impl.h b/src/jitcs_int_function_impl.h index 0219e8c..d37ecc1 100644 --- a/src/jitcs_int_function_impl.h +++ b/src/jitcs_int_function_impl.h @@ -1,7 +1,8 @@ -//===-- evm/bblock.h - a single basic block --*- C++ -*-===// -// -// A basic block contains a list of instructions. +//===-- src/jitcs_int_function_impl.h ---------------------------*- C++ -*-===// +// Function implementation class. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_FUNCTION_IMPL_H_ diff --git a/src/jitcs_int_machine.h b/src/jitcs_int_machine.h index f61c9ae..f0b3534 100644 --- a/src/jitcs_int_machine.h +++ b/src/jitcs_int_machine.h @@ -1,10 +1,11 @@ -//===-- jitcs_machine.h - Machine info --------------------------*- C++ -*-===// +//===-- src/jitcs_int_machine.h ---------------------------------*- C++ -*-===// +// More target machine info. // -// IMachineInfo holds the complete state necessary for the compiler component -// to handle machine instructions for a particular machine. Particular -// architectures (e.g. x86) are defined in different header files and will fill -// in all fields with the relevant values. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// IMachineDetails contain all information and methods necessary for +// target dependent dataflow analysis or register allocation. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_MACHINE_H_ diff --git a/src/jitcs_int_power2funcs.h b/src/jitcs_int_power2funcs.h index 855b891..109e66f 100644 --- a/src/jitcs_int_power2funcs.h +++ b/src/jitcs_int_power2funcs.h @@ -1,3 +1,10 @@ +//===-- src/jitcs_int_power2funcs.h -----------------------------*- C++ -*-===// +// Some helper functions to handle powers of 2 at compile or run time. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #ifndef _JITCS_INT_POWER2FUNCS_H_ #define _JITCS_INT_POWER2FUNCS_H_ diff --git a/src/jitcs_int_virtualregister.h b/src/jitcs_int_virtualregister.h index e3adfed..00671f8 100644 --- a/src/jitcs_int_virtualregister.h +++ b/src/jitcs_int_virtualregister.h @@ -1,10 +1,11 @@ -//===-- jitcs_vreg.h - a representation of a virtual register ---*- C++ -*-===// +//===-- src/jitcs_int_virtualregister.h -------------------------*- C++ -*-===// +// The actual definition of the VirtualRegister class. // -// A VirtualRegister contains all information necessary to handle a single -// hardware or software register inside the library. -// -// TODO: The source looks rather ugly right now. +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// While client code uses VirtualRegister a lot, reference are enough for it. +// The several analysis steps need a bit more information. //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_VIRTUALREGISTER_H_ diff --git a/src/src/adt_bitmap.cpp b/src/src/adt_bitmap.cpp index ba6098f..9ee562b 100644 --- a/src/src/adt_bitmap.cpp +++ b/src/src/adt_bitmap.cpp @@ -1,3 +1,15 @@ +//===-- src/src/adt_bitmap.h ------------------------------------*- C++ -*-===// +// BitSlice class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// A BitSlice is a view to an array of words, and allows checking and setting +// single bits. A BitSlice does NOT own the data it points to. +// A DynBitSlice provides the data array for the BitSlice. It will use a +// fixed size array, or allocate the space from the heap. +//===----------------------------------------------------------------------===// + #include "jitcs_int_adt_bitmap.h" #include "jitcs_dumper.h" diff --git a/src/src/bblock.cpp b/src/src/bblock.cpp index 3a3f0f4..a38174d 100644 --- a/src/src/bblock.cpp +++ b/src/src/bblock.cpp @@ -1,3 +1,10 @@ +//===-- src/src/bblock.cpp ---------------------------------*- C++ -*-===// +// Public BasicBlock interface class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_bblock.h" #include "jitcs_int_bblock_impl.h" diff --git a/src/src/bblock_impl.cpp b/src/src/bblock_impl.cpp index dba34d7..8c955e4 100644 --- a/src/src/bblock_impl.cpp +++ b/src/src/bblock_impl.cpp @@ -1,3 +1,13 @@ +//===-- src/src/bblock_impl.cpp ---------------------------------*- C++ -*-===// +// BasicBlock implementation class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// BasicBlockImpl objects are allocated from a TempAllocator, and their +// destructor is never called. +//===----------------------------------------------------------------------===// + #include "jitcs_int_bblock_impl.h" #include "jitcs_int_function_impl.h" #include "jitcs_dumper.h" diff --git a/src/src/callingconvention.cpp b/src/src/callingconvention.cpp index 552e756..865b3e1 100644 --- a/src/src/callingconvention.cpp +++ b/src/src/callingconvention.cpp @@ -1,3 +1,10 @@ +//===-- src/src/callingconvention.cpp ----------------------*- C++ -*-===// +// Public interface to calling convention object. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_callingconvention.h" #include "jitcs_dumper.h" diff --git a/src/src/callingconvention_impl.cpp b/src/src/callingconvention_impl.cpp index 9fcb7c4..a61ad96 100644 --- a/src/src/callingconvention_impl.cpp +++ b/src/src/callingconvention_impl.cpp @@ -1,3 +1,10 @@ +//===-- src/src/callingconvention_impl.cpp ----------------------*- C++ -*-===// +// Implementation class to handle calling convention object setup. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_callingconvention_impl.h" #include "jitcs_machine.h" diff --git a/src/src/cfg_analysis.cpp b/src/src/cfg_analysis.cpp index 598bd97..c4746ab 100644 --- a/src/src/cfg_analysis.cpp +++ b/src/src/cfg_analysis.cpp @@ -1,3 +1,16 @@ +//===-- src/src/cfg_analysis.cpp --------------------------------*- C++ -*-===// +// Control flow graph analysis. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// The point of CFG analysis is twofold: it will generate an order of basic +// blocks for code generation, trying to keep any "fallthru" hint encountered. +// Secondly, it can, on request, try to determine to loop depth for each and +// every basic block. The used algorithm is probably slow for large sets +// of basic blocks with many loops. +//===----------------------------------------------------------------------===// + #include "jitcs_int_cfg_analysis.h" #include "jitcs_adt_range.h" #include "jitcs_int_function_impl.h" diff --git a/src/src/codegenerator.cpp b/src/src/codegenerator.cpp index 6a2a49f..faaa673 100644 --- a/src/src/codegenerator.cpp +++ b/src/src/codegenerator.cpp @@ -1,3 +1,10 @@ +//===-- src/src/jitcs_int_codegenerator.cpp ---------------------*- C++ -*-===// +// Code generation helper. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_codegenerator.h" #include "jitcs_adt_range.h" #include "jitcs_int_cfg_analysis.h" diff --git a/src/src/cpu.cpp b/src/src/cpu.cpp index cdf8ddf..4603447 100644 --- a/src/src/cpu.cpp +++ b/src/src/cpu.cpp @@ -1,3 +1,14 @@ +//===-- src/src/cpu.cpu -----------------------------------------*- C++ -*-===// +// CPU feature description and detection. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Sets up an architecture and relevant feature flags. Has the architecture +// A_Host, which will run a feature detection of the host running the +// applicaton. +//===----------------------------------------------------------------------===// + #include "jitcs_base.h" #include "jitcs_cpu.h" //#include diff --git a/src/src/dfg_analysis.cpp b/src/src/dfg_analysis.cpp index 716b2d5..6ff9a7d 100644 --- a/src/src/dfg_analysis.cpp +++ b/src/src/dfg_analysis.cpp @@ -1,3 +1,21 @@ +//===-- src/src/dfg_analysis.cpp --------------------------------*- C++ -*-===// +// Data flow graph analysis. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// The DFG has a local and a global phase. The local phase has O(I+B*R), with +// I the number of instructions, B the number of basic blocks and R the number +// of virtual registers. It collects all def-use information from all +// instructions in all basic blocks. It results in a set of used and defined +// registers for each basic blocks. (B*R is the result of clearing all bits +// at the start of each basic blocks analysis.) +// The global phase has O(B*R*R) worstcase runtime. (R is for the set of bits +// handled for each iteration, and B*R is the upper limit for increasing the +// number of set bits for each basic block.) The phase calculates the +// live-in bitset as live-out minus defined plus uses. +//===----------------------------------------------------------------------===// + #include "jitcs_int_dfg_analysis.h" #include "jitcs_adt_range.h" #include "jitcs_int_function_impl.h" diff --git a/src/src/dumper.cpp b/src/src/dumper.cpp index 5c89eba..3301404 100644 --- a/src/src/dumper.cpp +++ b/src/src/dumper.cpp @@ -1,6 +1,14 @@ -//===-- jitcs_dumper.cpp - --------------------------------------*- C++ -*-===// +//===-- src/src/dumper.cpp --------------------------------------*- C++ -*-===// +// Helper for printing information for debug purposes. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// A lot of classes of JITCS accept an IDumper interface for writing +// information, which e.g. PrintFDumper implements. MachineDumper dumper +// provides target specific dumping support. Using it will pull in some big +// data tables into the application, so it should be avoided except for +// debug purposes. //===----------------------------------------------------------------------===// #include "jitcs_adt_ref.h" diff --git a/src/src/function.cpp b/src/src/function.cpp index 726ad16..417f405 100644 --- a/src/src/function.cpp +++ b/src/src/function.cpp @@ -1,3 +1,10 @@ +//===-- src/src/function.cpp ------------------------------------*- C++ -*-===// +// Public Function interface class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_function.h" #include "jitcs_int_function_impl.h" #include "jitcs_int_bblock_impl.h" diff --git a/src/src/function_impl.cpp b/src/src/function_impl.cpp index 44791bd..876008b 100644 --- a/src/src/function_impl.cpp +++ b/src/src/function_impl.cpp @@ -1,3 +1,10 @@ +//===-- src/src/function_impl.cpp -------------------------------*- C++ -*-===// +// Function implementation class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_function_impl.h" #include "jitcs_function.h" #include "jitcs_int_bblock_impl.h" diff --git a/src/src/host.cpp b/src/src/host.cpp index fbe7c6f..6561eba 100644 --- a/src/src/host.cpp +++ b/src/src/host.cpp @@ -1,3 +1,10 @@ +//===-- src/src/host.cpp ----------------------------------------*- C++ -*-===// +// Helper functions concerning the jitcs::host namespace. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs.h" #ifdef JITCS_X86_32 diff --git a/src/src/machine.cpp b/src/src/machine.cpp index 31032c8..ece142f 100644 --- a/src/src/machine.cpp +++ b/src/src/machine.cpp @@ -1,3 +1,13 @@ +//===-- src/src/machine.cpp -------------------------------------*- C++ -*-===// +// More target machine info. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// IMachineDetails contain all information and methods necessary for +// target dependent dataflow analysis or register allocation. +//===----------------------------------------------------------------------===// + #include "jitcs_machine.h" #include "jitcs_int_machine.h" #include "jitcs_function.h" diff --git a/src/src/main.cpp b/src/src/main.cpp deleted file mode 100644 index 8285d50..0000000 --- a/src/src/main.cpp +++ /dev/null @@ -1,6 +0,0 @@ -#include "stdio.h" - -int main() { - puts("Hello, World!"); - return 0; -} diff --git a/src/src/memmgr.cpp b/src/src/memmgr.cpp index 5cd93ec..d6ed8b0 100644 --- a/src/src/memmgr.cpp +++ b/src/src/memmgr.cpp @@ -1,7 +1,19 @@ -// this allocator is based on Doug Leah's malloc. it contains slight modifications such as: +//===-- src/src/memmgr.cpp --------------------------------------*- C++ -*-===// +// A memory manager for code and data +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// The manager is an allocator based on Doug Leah's malloc. Memory is allocated +// from the system with execution permission. +//===----------------------------------------------------------------------===// + +// this allocator is based on Doug Leah's malloc. it contains slight +// modifications such as: // - the returned memory is executable. so don't used it for normal allocations // - allocated blocks always fill whole cache lines -// - allocations are for data and code. data and code do not share cache lines, but pages. +// - allocations are for data and code. data and code do not share cache lines, +// but pages. // TODO: // the code lacks comments diff --git a/src/src/spillslotinfo.cpp b/src/src/spillslotinfo.cpp index cf611f6..4e1bf74 100644 --- a/src/src/spillslotinfo.cpp +++ b/src/src/spillslotinfo.cpp @@ -1,3 +1,16 @@ +//===-- src/src/spillslotinfo.cpp -------------------------------*- C++ -*-===// +// Description of the spill slot position for virtual registers. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// SpillSlotInfo can be used for all virtual registers, whose spill slot +// is at a memory location relative to one of the frame pointer registers, +// e.g. the stack pointer. For emulators it will be possible, to define +// virtual registers being spilled to and reloaded from the virtual machine +// state. +//===----------------------------------------------------------------------===// + #include "jitcs_spillslotinfo.h" #include "jitcs_dumper.h" diff --git a/src/src/tmpalloc.cpp b/src/src/tmpalloc.cpp index a7cd9c7..71b6772 100644 --- a/src/src/tmpalloc.cpp +++ b/src/src/tmpalloc.cpp @@ -1,8 +1,13 @@ -//===-- src/tmpalloc.cpp - Never-free allocator class -----------*- C++ -*-===// +//===-- src/src/tmpalloc.cpp ------------------------------------*- C++ -*-===// +// Never-free allocator classes. // -// This is a never-free allocator. All allocated data is written into -// one memory block. All data are freed en bloc. No destructors are called! +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h // +// TempAllocator allocates data en bloc, and releases it all at once. +// No destructors are called on release. +// StreamAllocator speeds up allocating multiple objects with enhanced +// alignment requirements. //===----------------------------------------------------------------------===// #include "jitcs_tmpalloc.h" diff --git a/src/src/virtualregister.cpp b/src/src/virtualregister.cpp index 6a07307..63fd7ff 100644 --- a/src/src/virtualregister.cpp +++ b/src/src/virtualregister.cpp @@ -1,3 +1,13 @@ +//===-- src/src/virtualregister.cpp -----------------------------*- C++ -*-===// +// The actual definition of the VirtualRegister class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// While client code uses VirtualRegister a lot, reference are enough for it. +// The several analysis steps need a bit more information. +//===----------------------------------------------------------------------===// + #include "jitcs_int_virtualregister.h" #include "jitcs_machine.h" #include "jitcs_int_machine.h" diff --git a/src/x86/jitcs_int_x86_xx_dumper.lh b/src/x86/jitcs_int_x86_xx_dumper.lh index 8f62710..ac10122 100644 --- a/src/x86/jitcs_int_x86_xx_dumper.lh +++ b/src/x86/jitcs_int_x86_xx_dumper.lh @@ -4,10 +4,11 @@ /*| --XDUMPSCRIPT=true /*| --*/ /*| local N = $$$ -//===-- x86/x86_%(N)_regs.h C++ -----------------------------------------*-===// -// -// Register definitions for %(N)bit x86 code. +//===-- src/x86/jitcs_int_x86_%(N)_dumper.h -----------------------*- C++ -*-===// +// X86, %(N)-bit, instruction and register dumping class. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_X86_%(N)_DUMPER_H_ diff --git a/src/x86/jitcs_int_x86_xx_machine.lh b/src/x86/jitcs_int_x86_xx_machine.lh index ddd2593..f647516 100644 --- a/src/x86/jitcs_int_x86_xx_machine.lh +++ b/src/x86/jitcs_int_x86_xx_machine.lh @@ -15,8 +15,11 @@ /*| end, t, 0 /*| end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end -//===-- jitcs_x86_%(N)_machine.h - Machine info -------------------*- C++ -*-===// +//===-- src/x86/jitcs_int_x86_%(N)_machine.h ----------------------*- C++ -*-===// +// X86, %(N)-bit, target machine info. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_X86_%(N)_MACHINE_H_ diff --git a/src/x86/jitcs_int_x86_xx_regs.lh b/src/x86/jitcs_int_x86_xx_regs.lh index 273c099..cd0290d 100644 --- a/src/x86/jitcs_int_x86_xx_regs.lh +++ b/src/x86/jitcs_int_x86_xx_regs.lh @@ -15,10 +15,11 @@ /*| end, t, 0 /*| end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end -//===-- x86/x86_%(N)_regs.h C++ -----------------------------------------*-===// -// -// Register definitions for %(N)bit x86 code. +//===-- src/x86/jitcs_int_x86_%(N)_regs.h -------------------------*- C++ -*-===// +// X86, %(N)-bit, specific register information. // +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h //===----------------------------------------------------------------------===// #ifndef _JITCS_INT_X86_%(N)_REGS_H_ diff --git a/src/x86/src/x86_xx_callingconvention.lcpp b/src/x86/src/x86_xx_callingconvention.lcpp index 8d59713..2e87142 100644 --- a/src/x86/src/x86_xx_callingconvention.lcpp +++ b/src/x86/src/x86_xx_callingconvention.lcpp @@ -4,6 +4,13 @@ /*| --XDUMPSCRIPT=true /*| --*/ /*| local N = $$$ +//===-- src/x86/src/x86_%(N)_callingconvention.cpp ----------------*- C++ -*-===// +// X86, %(N)-bit, calling convention setup. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "x86/jitcs_int_x86_%(N)_machine.h" #include "x86/jitcs_int_x86_%(N)_regs.h" #include "jitcs_int_callingconvention_impl.h" diff --git a/src/x86/src/x86_xx_codegen.lcpp b/src/x86/src/x86_xx_codegen.lcpp index 6f5bab0..67932d9 100644 --- a/src/x86/src/x86_xx_codegen.lcpp +++ b/src/x86/src/x86_xx_codegen.lcpp @@ -16,6 +16,13 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- src/x86/src/x86_%(N)_codegen.cpp --------------------------*- C++ -*-===// +// X86, %(N)-bit, instruction codegen. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "x86/jitcs_int_x86_%(N)_machine.h" #include "jitcs_x86_%(N).h" #include "jitcs_int_virtualregister.h" @@ -72,7 +79,7 @@ /*| result.rmi = p.rex.rmi or 0 /*| result.r64 = p.rex.r64 /*| result.src1 = p.rex.src1 or 0 -/*| result.l = p.rex.l or 0 +/*| result.l = p.rex.l and tonumber(p.rex.l) or 0 /*| result.vex = p.rex.vex /*| result.mode = p.rex.mode -- rm/rr /*| local eff, esf, esr = 0, 0, {} @@ -553,9 +560,12 @@ jitcs::Slice jitcs::x86_%(N)::X86_%(N)MachineInfo::generateCode /*| end /*| if ww.pfxmode == "vex2" or ww.pfxmode == "vex3" or ww.pfxmode == "vex2?" then /*| local v2, v31, v32, r2, r31a, r31b, r32 = 0xff, 0xff, 0xff, nil, nil, nil, nil -/*| v2 = v2 - (1 - ww.l) * 4 - (3 - ww.pp) -/*| v31 = v31 - (31 - ww.mm) -/*| v32 = v32 - (1 - ww.l) * 4 - (3 - ww.pp) - (1 - ww.r64) * 128 +/*| local pp, mm, l, r64 = ww.pp, ww.mm, ww.l, ww.r64 +/*| -- TODO: check mystery bug, where for ww.pp == 1, 3 - ww.pp would return 0 +/*| -- had to load fields to make it disappear. ww.pp + constant was working fine... +/*| v2 = v2 - (1 - l) * 4 - (3 - pp) +/*| v31 = v31 - (31 - mm) +/*| v32 = v32 - (1 - l) * 4 - (3 - pp) - (1 - r64) * 128 /*| if not tonumber(ww.src1) then /*| local s = _fmt("((ins->getConstRRefOp(%d)->id & 15) << 3)", getPos(ww.src1)) /*| r2 = (r2 and (r2 .. " ^ ") or "") .. s; diff --git a/src/x86/src/x86_xx_dumper.lcpp b/src/x86/src/x86_xx_dumper.lcpp index 6f6d615..896adca 100644 --- a/src/x86/src/x86_xx_dumper.lcpp +++ b/src/x86/src/x86_xx_dumper.lcpp @@ -16,6 +16,13 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- src/x86/src/x86_%(N)_dumper.cpp ---------------------------*- C++ -*-===// +// X86, %(N)-bit, instruction and register dumping class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "x86/jitcs_int_x86_%(N)_dumper.h" #include "jitcs_x86_%(N)_cons.h" #include "jitcs_int_virtualregister.h" diff --git a/src/x86/src/x86_xx_ins2reg.lcpp b/src/x86/src/x86_xx_ins2reg.lcpp index 2e37c77..eb882a4 100644 --- a/src/x86/src/x86_xx_ins2reg.lcpp +++ b/src/x86/src/x86_xx_ins2reg.lcpp @@ -16,6 +16,13 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- src/x86/src/x86_%(N)_ins2reg.cpp --------------------------*- C++ -*-===// +// X86, %(N)-bit, extract register usage for dataflow analysis. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "x86/jitcs_int_x86_%(N)_machine.h" #include "x86/jitcs_int_x86_%(N)_regs.h" #include "jitcs_x86_%(N).h" diff --git a/src/x86/src/x86_xx_insinfo.lcpp b/src/x86/src/x86_xx_insinfo.lcpp index d1f0135..2b58667 100644 --- a/src/x86/src/x86_xx_insinfo.lcpp +++ b/src/x86/src/x86_xx_insinfo.lcpp @@ -16,6 +16,14 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- src/x86/src/x86_%(N)_insinfo.cpp --------------------------*- C++ -*-===// +// X86, %(N)-bit, instruction info for validity checks and cf-instruction +// handling. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_x86_%(N)_cons.h" #include "x86/jitcs_int_x86_%(N)_machine.h" #include "jitcs_int_bblock_impl.h" diff --git a/src/x86/src/x86_xx_machine.lcpp b/src/x86/src/x86_xx_machine.lcpp index a818e36..5345cc2 100644 --- a/src/x86/src/x86_xx_machine.lcpp +++ b/src/x86/src/x86_xx_machine.lcpp @@ -15,6 +15,13 @@ /*| end, t, 0 /*| end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- src/x86/src/x86_%(N)_machine.cpp --------------------------*- C++ -*-===// +// X86, %(N)-bit, target machine info. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_x86_%(N)_machine.h" #include "x86/jitcs_int_x86_%(N)_machine.h" #include "x86/jitcs_int_x86_%(N)_regs.h" diff --git a/src/x86/src/x86_xx_regs.lcpp b/src/x86/src/x86_xx_regs.lcpp index 700cd08..23aeb00 100644 --- a/src/x86/src/x86_xx_regs.lcpp +++ b/src/x86/src/x86_xx_regs.lcpp @@ -15,6 +15,13 @@ /*| end, t, 0 /*| end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- src/x86/src/x86_%(N)_regs.cpp -----------------------------*- C++ -*-===// +// X86, %(N)-bit, specific register information. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_x86_%(N)_regs.h" #include "jitcs_int_virtualregister.h" #include "x86/jitcs_int_x86_%(N)_regs.h" diff --git a/tests/cpuinfo.cpp b/tests/cpuinfo.cpp index 8c66ff9..6089287 100644 --- a/tests/cpuinfo.cpp +++ b/tests/cpuinfo.cpp @@ -1,3 +1,12 @@ +//===-- tests/cpuinfo.cpp ---------------------------------------*- C++ -*-===// +// Simple program to detect the host's feature set. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// It is not really much of a test. +//===----------------------------------------------------------------------===// + #include "jitcs_cpu.h" #include diff --git a/tests/test_adt_bitmap.cpp b/tests/test_adt_bitmap.cpp index 66b63bf..0692c39 100644 --- a/tests/test_adt_bitmap.cpp +++ b/tests/test_adt_bitmap.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_adt_bitmap.cpp -------------------------------*- C++ -*-===// +// Test to check the BitSlice class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_adt_bitmap.h" #include "unittest.h" diff --git a/tests/test_adt_heap.cpp b/tests/test_adt_heap.cpp index cd3f424..2f50336 100644 --- a/tests/test_adt_heap.cpp +++ b/tests/test_adt_heap.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_adt_heap.cpp ---------------------------------*- C++ -*-===// +// Test to check the TopHeap class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_adt_heap.h" #include "unittest.h" diff --git a/tests/test_adt_range.cpp b/tests/test_adt_range.cpp index ccbadae..db49ae0 100644 --- a/tests/test_adt_range.cpp +++ b/tests/test_adt_range.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_adt_range.cpp --------------------------------*- C++ -*-===// +// Test to check Range class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_adt_range.h" #include "unittest.h" #include diff --git a/tests/test_adt_slice.cpp b/tests/test_adt_slice.cpp index 30bbe5d..366a260 100644 --- a/tests/test_adt_slice.cpp +++ b/tests/test_adt_slice.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_adt_slice.cpp --------------------------------*- C++ -*-===// +// Test to check Slice class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_adt_slice.h" #include "unittest.h" diff --git a/tests/test_adt_smallheap.cpp b/tests/test_adt_smallheap.cpp index fb08f70..49e20fd 100644 --- a/tests/test_adt_smallheap.cpp +++ b/tests/test_adt_smallheap.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_adt_smallheap.cpp ----------------------------*- C++ -*-===// +// Test to check SmallTopHeap class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_adt_smallheap.h" #include "unittest.h" diff --git a/tests/test_adt_tmpvector.cpp b/tests/test_adt_tmpvector.cpp index edc985c..a820f89 100644 --- a/tests/test_adt_tmpvector.cpp +++ b/tests/test_adt_tmpvector.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_adt_tmpvector.cpp ----------------------------*- C++ -*-===// +// Test to check TmpVector class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_adt_tmpvector.h" #include "jitcs_tmpalloc.h" #include "unittest.h" diff --git a/tests/test_allinstructions.cpp b/tests/test_allinstructions.cpp index 369aa5c..4fdb22f 100644 --- a/tests/test_allinstructions.cpp +++ b/tests/test_allinstructions.cpp @@ -1,3 +1,15 @@ +//===-- tests/test_allinstructions.cpp --------------------------*- C++ -*-===// +// Test all instruction encodings provided by JITCS. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Will report wrong encodings, and instructions which have not been encoded +// at all. For that purpose, we pull in several *.as files from the _bin/{arch} +// directory. These *.as files have been created from *.ins files in +// tests/{arch}, enriched by the target encodings as used by NASM. +//===----------------------------------------------------------------------===// + #include "jitcs.h" #include "unittest.h" #include "jitcs_instructionstream.h" diff --git a/tests/test_asm.cpp b/tests/test_asm.cpp index b91fc8e..002b2e0 100644 --- a/tests/test_asm.cpp +++ b/tests/test_asm.cpp @@ -1,3 +1,12 @@ +//===-- tests/test_asm.cpp --------------------------------------*- C++ -*-===// +// Class of a simple assembler for testing purposes. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// The assembler is used with the _bin/{arch}/*.as files. +//===----------------------------------------------------------------------===// + #include "test_asm.h" #include "jitcs_callingconvention.h" #include "jitcs_machine.h" diff --git a/tests/test_asm.h b/tests/test_asm.h index e3b4c00..4de1079 100644 --- a/tests/test_asm.h +++ b/tests/test_asm.h @@ -1,3 +1,12 @@ +//===-- tests/test_asm.h ----------------------------------------*- C++ -*-===// +// Class of a simple assembler for testing purposes. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// The assembler is used with the _bin/{arch}/*.as files. +//===----------------------------------------------------------------------===// + #ifndef _JITCS_TESTS_TESTASM_H_ #define _JITCS_TESTS_TESTASM_H_ diff --git a/tests/test_asm_x86_xx.lh b/tests/test_asm_x86_xx.lh index bf9afdd..46bba46 100644 --- a/tests/test_asm_x86_xx.lh +++ b/tests/test_asm_x86_xx.lh @@ -16,6 +16,17 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- tests/test_asm_x86_%(N).h ---------------------------------*- C++ -*-===// +// Class derived from TestAssembler, specific to X86, %(N)-bit. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Sets up the names of registers and instruction available on the specific +// platform, and uses the constructors in jitcs_x86_%(N)_const.h to actually +// create the instruction objects. +//===----------------------------------------------------------------------===// + #ifndef _JITCS_TESTS_TESTASM_X86_%(N)_H_ #define _JITCS_TESTS_TESTASM_X86_%(N)_H_ diff --git a/tests/test_asm_x86_xx_ext.lcpp b/tests/test_asm_x86_xx_ext.lcpp index 6bb02a3..eaa80f0 100644 --- a/tests/test_asm_x86_xx_ext.lcpp +++ b/tests/test_asm_x86_xx_ext.lcpp @@ -16,6 +16,16 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- tests/test_asm_x86_%(N)_ext.cpp ---------------------------*- C++ -*-===// +// Class derived from TestAssembler, specific to X86, %(N)-bit. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Provide additional functions to construct operands of the correct register +// class, or memory operands. +//===----------------------------------------------------------------------===// + #include "test_asm_x86_%(N).h" #include "jitcs_machine.h" #include "jitcs_tmpalloc.h" diff --git a/tests/test_asm_x86_xx_ins.lcpp b/tests/test_asm_x86_xx_ins.lcpp index d0e37b8..589ca05 100644 --- a/tests/test_asm_x86_xx_ins.lcpp +++ b/tests/test_asm_x86_xx_ins.lcpp @@ -16,6 +16,15 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- tests/test_asm_x86_%(N)_ins.cpp ---------------------------*- C++ -*-===// +// Class derived from TestAssembler, specific to X86, %(N)-bit. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Sets up the names of instructions. +//===----------------------------------------------------------------------===// + #include "test_asm_x86_%(N).h" #include "jitcs_machine.h" #include "jitcs_tmpalloc.h" diff --git a/tests/test_asm_x86_xx_reg.lcpp b/tests/test_asm_x86_xx_reg.lcpp index 7c3867b..eb4670d 100644 --- a/tests/test_asm_x86_xx_reg.lcpp +++ b/tests/test_asm_x86_xx_reg.lcpp @@ -16,6 +16,15 @@ /*| end /*| function isa(v) return not v[N==32 and "x64" or "x32only"] end /*| function isaN(k,v) return not v[N==32 and "x64" or "x32"] end +//===-- tests/test_asm_x86_%(N)_reg.cpp ---------------------------*- C++ -*-===// +// Class derived from TestAssembler, specific to X86, %(N)-bit. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// Sets up the names of registers. +//===----------------------------------------------------------------------===// + #include "test_asm_x86_%(N).h" #include "jitcs_machine.h" #include "jitcs_tmpalloc.h" diff --git a/tests/test_bitfuncs.cpp b/tests/test_bitfuncs.cpp index 7fdf8fa..ef1a4e7 100644 --- a/tests/test_bitfuncs.cpp +++ b/tests/test_bitfuncs.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_bitfuncs.cpp ---------------------------------*- C++ -*-===// +// Test of the trailing-zero/one-count and population count. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_bitfuncs.h" #include "unittest.h" diff --git a/tests/test_callingconvention.cpp b/tests/test_callingconvention.cpp index ff15863..39958e1 100644 --- a/tests/test_callingconvention.cpp +++ b/tests/test_callingconvention.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_callingconvention.cpp ------------------------*- C++ -*-===// +// Test of calling conventions of several platforms. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_callingconvention.h" #include "unittest.h" #include "jitcs_x86_32_machine.h" diff --git a/tests/test_cfg_analysis.cpp b/tests/test_cfg_analysis.cpp index e024921..3d94086 100644 --- a/tests/test_cfg_analysis.cpp +++ b/tests/test_cfg_analysis.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_cfg_analysis.cpp -----------------------------*- C++ -*-===// +// Test of the loop depth detection. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs.h" #include "unittest.h" #include "jitcs_instructionstream.h" diff --git a/tests/test_dfg_analysis.cpp b/tests/test_dfg_analysis.cpp index 6fa096e..ba7cd1e 100644 --- a/tests/test_dfg_analysis.cpp +++ b/tests/test_dfg_analysis.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_dfg_analysis.cpp -----------------------------*- C++ -*-===// +// Test of the dataflow analysis of a not totally simple function. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int.h" #include "unittest.h" #include "jitcs_instructionstream.h" diff --git a/tests/test_fnctypeinfo.cpp b/tests/test_fnctypeinfo.cpp index 1a55c75..c7f1e71 100644 --- a/tests/test_fnctypeinfo.cpp +++ b/tests/test_fnctypeinfo.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_fnctypeinfo.cpp ------------------------------*- C++ -*-===// +// Test of functions deconstructing function types. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_fnctypeinfo.h" #include "unittest.h" diff --git a/tests/test_main.cpp b/tests/test_main.cpp index b12da1c..a915f10 100644 --- a/tests/test_main.cpp +++ b/tests/test_main.cpp @@ -1,3 +1,13 @@ +//===-- tests/test_main.cpp -------------------------------------*- C++ -*-===// +// Unit test program. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +// +// All tests register themselves when linked in, so the main function only +// needs to start running them. +//===----------------------------------------------------------------------===// + #include "unittest.h" #include diff --git a/tests/test_power2funcs.cpp b/tests/test_power2funcs.cpp index b4a76a6..28929c9 100644 --- a/tests/test_power2funcs.cpp +++ b/tests/test_power2funcs.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_power2funcs.cpp ------------------------------*- C++ -*-===// +// Test of certain compile-time/run-time functions relating to powers of 2. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs_int_power2funcs.h" #include "unittest.h" diff --git a/tests/test_simplecodegen.cpp b/tests/test_simplecodegen.cpp index d67ae71..89f880a 100644 --- a/tests/test_simplecodegen.cpp +++ b/tests/test_simplecodegen.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_simplecodegen.cpp ----------------------------*- C++ -*-===// +// A fixed-size bit array class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs.h" #include "unittest.h" #include "jitcs_instructionstream.h" diff --git a/tests/test_simplefunction.cpp b/tests/test_simplefunction.cpp index 7f207fc..284401a 100644 --- a/tests/test_simplefunction.cpp +++ b/tests/test_simplefunction.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_simplefunction.cpp ---------------------------*- C++ -*-===// +// A fixed-size bit array class. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "jitcs.h" #include "unittest.h" #include "jitcs_instructionstream.h" diff --git a/tests/test_unittest.cpp b/tests/test_unittest.cpp index a2c7224..3920434 100644 --- a/tests/test_unittest.cpp +++ b/tests/test_unittest.cpp @@ -1,3 +1,10 @@ +//===-- tests/test_unittest.cpp ---------------------------------*- C++ -*-===// +// A tiny unit test framework. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #include "unittest.h" #include diff --git a/tests/unittest.h b/tests/unittest.h index 10959cf..129dc39 100644 --- a/tests/unittest.h +++ b/tests/unittest.h @@ -1,3 +1,10 @@ +//===-- tests/unittest.h ----------------------------------------*- C++ -*-===// +// A tiny unit test framework. +// +// Copyright (C) 2013-2014 Dirk Steinke. +// See copyright and license notice in COPYRIGHT or include/jitcs.h +//===----------------------------------------------------------------------===// + #ifndef _JITCS_TESTS_UNITTEST_H_ #define _JITCS_TESTS_UNITTEST_H_ diff --git a/tools/emblua.lua b/tools/emblua.lua index f3dd25f..d46a8c1 100644 --- a/tools/emblua.lua +++ b/tools/emblua.lua @@ -1,3 +1,15 @@ +--[[ + Embedded Lua tool: + Copyright (C) 2013-2014 Dirk Steinke. + See copyright and license notice in COPYRIGHT or include/jitcs.h + + This tool allows the execution of embedded lua code in a source file + template to generate source code tables, functions or classes from + data descriptions. See *.lh, *.lcpp and *.ltxt files to see how the + embedding looks like. + This tool is not used directly in the build chain, but as part of the other + tools in this directory. +]] ---------------------------------------------------- local _setfenv, _ipairs, _pairs, _select, _tostr = setfenv, ipairs, pairs, select, tostring local _loadstr, _pcall, _type = loadstring, pcall, type diff --git a/tools/template2source.lua b/tools/template2source.lua index 8fff207..98a58b3 100644 --- a/tools/template2source.lua +++ b/tools/template2source.lua @@ -1,3 +1,14 @@ +--[[ + Template To Source tool: + Copyright (C) 2013-2014 Dirk Steinke. + See copyright and license notice in COPYRIGHT or include/jitcs.h + + This file turns a source template file (*.lh, *.lcpp) into the desired + source file (*.h, *.cpp). It takes a parameter N, the bitwidth of the + target architecture. This is mostly for x86, where the templates are shared + between 32- and 64-bit versions. +]] + local _setfenv, _ipairs, _loadstr = setfenv, ipairs, loadstring local _open = io.open local _match, _gmatch, _fmt = string.match, string.gmatch, string.format diff --git a/tools/x86_insalias2data.lua b/tools/x86_insalias2data.lua index 211449f..83ca086 100644 --- a/tools/x86_insalias2data.lua +++ b/tools/x86_insalias2data.lua @@ -1,3 +1,12 @@ +--[[ + Instruction Alias To Data tool for X86: + Copyright (C) 2013-2014 Dirk Steinke. + See copyright and license notice in COPYRIGHT or include/jitcs.h + + The tool reads src/data/x86_insalias.ltxt and transforms it into + src/data/x86_insalias.dat. +]] + local _setfenv, _ipairs, _loadstr = setfenv, ipairs, loadstring local _open = io.open local _match, _gmatch, _fmt = string.match, string.gmatch, string.format diff --git a/tools/x86_inslist2data.lua b/tools/x86_inslist2data.lua index 13bdaa2..0c2c180 100644 --- a/tools/x86_inslist2data.lua +++ b/tools/x86_inslist2data.lua @@ -1,3 +1,12 @@ +--[[ + Instruction List To Data tool for X86: + Copyright (C) 2013-2014 Dirk Steinke. + See copyright and license notice in COPYRIGHT or include/jitcs.h + + The tool reads src/data/x86_inslist.ltxt and transforms it into + src/data/x86_inslist.dat. +]] + local _type, _ipairs, _pairs, _tonum, _tostr, _assert, _error = type, ipairs, pairs, tonumber, tostring, assert, error local _loadstr = loadstring local _match, _gmatch, _sub, _lower, _upper = string.match, string.gmatch, string.sub, string.lower, string.upper diff --git a/tools/x86_instool.lua b/tools/x86_instool.lua index ac193e4..88eea09 100644 --- a/tools/x86_instool.lua +++ b/tools/x86_instool.lua @@ -1,3 +1,12 @@ +--[[ + Instruction Tool for X86: + Copyright (C) 2013-2014 Dirk Steinke. + See copyright and license notice in COPYRIGHT or include/jitcs.h + + The tool reads instruction files from tests/x86/*.ins, and transforms them + into _bin/data/*.as files for use in the unit test program. +]] + local _setfenv, _ipairs = setfenv, ipairs local _open = io.open local _match, _gmatch, _fmt = string.match, string.gmatch, string.format diff --git a/tools/x86_reglist2data.lua b/tools/x86_reglist2data.lua index e4ded9e..6ed1b2b 100644 --- a/tools/x86_reglist2data.lua +++ b/tools/x86_reglist2data.lua @@ -1,3 +1,14 @@ +--[[ + Register List To Data tool for X86: + Copyright (C) 2013-2014 Dirk Steinke. + See copyright and license notice in COPYRIGHT or include/jitcs.h + + This tool is NOT used right now. + + The tool reads src/data/x86_reglist.ltxt and transforms it into + src/data/x86_reglist.dat +]] + local _setfenv, _ipairs, _loadstr = setfenv, ipairs, loadstring local _open = io.open local _match, _gmatch, _fmt = string.match, string.gmatch, string.format -- 2.11.4.GIT