qemu/gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "qemu-common.h"
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #include "qemu-kvm.h"
  37 #endif
  38
  39 #include "qemu_socket.h"
  40 #ifdef _WIN32
  41 /* XXX: these constants may be independent of the host ones even for Unix */
  42 #ifndef SIGTRAP
  43 #define SIGTRAP 5
  44 #endif
  45 #ifndef SIGINT
  46 #define SIGINT 2
  47 #endif
  48 #else
  49 #include <signal.h>
  50 #endif
  51
  52 //#define DEBUG_GDB
  53
  54 enum RSState {
  55     RS_IDLE,
  56     RS_GETLINE,
  57     RS_CHKSUM1,
  58     RS_CHKSUM2,
  59     RS_SYSCALL,
  60 };
  61 typedef struct GDBState {
  62     CPUState *env; /* current CPU */
  63     enum RSState state; /* parsing state */
  64     char line_buf[4096];
  65     int line_buf_index;
  66     int line_csum;
  67     uint8_t last_packet[4100];
  68     int last_packet_len;
  69 #ifdef CONFIG_USER_ONLY
  70     int fd;
  71     int running_state;
  72 #else
  73     CharDriverState *chr;
  74 #endif
  75 } GDBState;
  76
  77 #ifdef CONFIG_USER_ONLY
  78 /* XXX: This is not thread safe.  Do we care?  */
  79 static int gdbserver_fd = -1;
  80
  81 /* XXX: remove this hack.  */
  82 static GDBState gdbserver_state;
  83
  84 static int get_char(GDBState *s)
  85 {
  86     uint8_t ch;
  87     int ret;
  88
  89     for(;;) {
  90         ret = recv(s->fd, &ch, 1, 0);
  91         if (ret < 0) {
  92             if (errno != EINTR && errno != EAGAIN)
  93                 return -1;
  94         } else if (ret == 0) {
  95             return -1;
  96         } else {
  97             break;
  98         }
  99     }
 100     return ch;
 101 }
 102 #endif
 103
 104 /* GDB stub state for use by semihosting syscalls.  */
 105 static GDBState *gdb_syscall_state;
 106 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 107
 108 enum {
 109     GDB_SYS_UNKNOWN,
 110     GDB_SYS_ENABLED,
 111     GDB_SYS_DISABLED,
 112 } gdb_syscall_mode;
 113
 114 /* If gdb is connected when the first semihosting syscall occurs then use
 115    remote gdb syscalls.  Otherwise use native file IO.  */
 116 int use_gdb_syscalls(void)
 117 {
 118     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 119         gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
 120                                               : GDB_SYS_DISABLED);
 121     }
 122     return gdb_syscall_mode == GDB_SYS_ENABLED;
 123 }
 124
 125 /* Resume execution.  */
 126 static inline void gdb_continue(GDBState *s)
 127 {
 128 #ifdef CONFIG_USER_ONLY
 129     s->running_state = 1;
 130 #else
 131     vm_start();
 132 #endif
 133 }
 134
 135 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 136 {
 137 #ifdef CONFIG_USER_ONLY
 138     int ret;
 139
 140     while (len > 0) {
 141         ret = send(s->fd, buf, len, 0);
 142         if (ret < 0) {
 143             if (errno != EINTR && errno != EAGAIN)
 144                 return;
 145         } else {
 146             buf += ret;
 147             len -= ret;
 148         }
 149     }
 150 #else
 151     qemu_chr_write(s->chr, buf, len);
 152 #endif
 153 }
 154
 155 static inline int fromhex(int v)
 156 {
 157     if (v >= '0' && v <= '9')
 158         return v - '0';
 159     else if (v >= 'A' && v <= 'F')
 160         return v - 'A' + 10;
 161     else if (v >= 'a' && v <= 'f')
 162         return v - 'a' + 10;
 163     else
 164         return 0;
 165 }
 166
 167 static inline int tohex(int v)
 168 {
 169     if (v < 10)
 170         return v + '0';
 171     else
 172         return v - 10 + 'a';
 173 }
 174
 175 static void memtohex(char *buf, const uint8_t *mem, int len)
 176 {
 177     int i, c;
 178     char *q;
 179     q = buf;
 180     for(i = 0; i < len; i++) {
 181         c = mem[i];
 182         *q++ = tohex(c >> 4);
 183         *q++ = tohex(c & 0xf);
 184     }
 185     *q = '\0';
 186 }
 187
 188 static void hextomem(uint8_t *mem, const char *buf, int len)
 189 {
 190     int i;
 191
 192     for(i = 0; i < len; i++) {
 193         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 194         buf += 2;
 195     }
 196 }
 197
 198 /* return -1 if error, 0 if OK */
 199 static int put_packet(GDBState *s, char *buf)
 200 {
 201     int len, csum, i;
 202     uint8_t *p;
 203
 204 #ifdef DEBUG_GDB
 205     printf("reply='%s'\n", buf);
 206 #endif
 207
 208     for(;;) {
 209         p = s->last_packet;
 210         *(p++) = '$';
 211         len = strlen(buf);
 212         memcpy(p, buf, len);
 213         p += len;
 214         csum = 0;
 215         for(i = 0; i < len; i++) {
 216             csum += buf[i];
 217         }
 218         *(p++) = '#';
 219         *(p++) = tohex((csum >> 4) & 0xf);
 220         *(p++) = tohex((csum) & 0xf);
 221
 222         s->last_packet_len = p - s->last_packet;
 223         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 224
 225 #ifdef CONFIG_USER_ONLY
 226         i = get_char(s);
 227         if (i < 0)
 228             return -1;
 229         if (i == '+')
 230             break;
 231 #else
 232         break;
 233 #endif
 234     }
 235     return 0;
 236 }
 237
 238 #if defined(TARGET_I386)
 239
 240 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 241 {
 242     int i, fpus;
 243     uint32_t *registers = (uint32_t *)mem_buf;
 244
 245 #ifdef TARGET_X86_64
 246     /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
 247     uint64_t *registers64 = (uint64_t *)mem_buf;
 248
 249     if (env->hflags & HF_CS64_MASK) {
 250         registers64[0] = tswap64(env->regs[R_EAX]);
 251         registers64[1] = tswap64(env->regs[R_EBX]);
 252         registers64[2] = tswap64(env->regs[R_ECX]);
 253         registers64[3] = tswap64(env->regs[R_EDX]);
 254         registers64[4] = tswap64(env->regs[R_ESI]);
 255         registers64[5] = tswap64(env->regs[R_EDI]);
 256         registers64[6] = tswap64(env->regs[R_EBP]);
 257         registers64[7] = tswap64(env->regs[R_ESP]);
 258         for(i = 8; i < 16; i++) {
 259             registers64[i] = tswap64(env->regs[i]);
 260         }
 261         registers64[16] = tswap64(env->eip);
 262
 263         registers = (uint32_t *)&registers64[17];
 264         registers[0] = tswap32(env->eflags);
 265         registers[1] = tswap32(env->segs[R_CS].selector);
 266         registers[2] = tswap32(env->segs[R_SS].selector);
 267         registers[3] = tswap32(env->segs[R_DS].selector);
 268         registers[4] = tswap32(env->segs[R_ES].selector);
 269         registers[5] = tswap32(env->segs[R_FS].selector);
 270         registers[6] = tswap32(env->segs[R_GS].selector);
 271         /* XXX: convert floats */
 272         for(i = 0; i < 8; i++) {
 273             memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
 274         }
 275         registers[27] = tswap32(env->fpuc); /* fctrl */
 276         fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 277         registers[28] = tswap32(fpus); /* fstat */
 278         registers[29] = 0; /* ftag */
 279         registers[30] = 0; /* fiseg */
 280         registers[31] = 0; /* fioff */
 281         registers[32] = 0; /* foseg */
 282         registers[33] = 0; /* fooff */
 283         registers[34] = 0; /* fop */
 284         for(i = 0; i < 16; i++) {
 285             memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
 286         }
 287         registers[99] = tswap32(env->mxcsr);
 288
 289         return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
 290     }
 291 #endif
 292
 293     for(i = 0; i < 8; i++) {
 294         registers[i] = env->regs[i];
 295     }
 296     registers[8] = env->eip;
 297     registers[9] = env->eflags;
 298     registers[10] = env->segs[R_CS].selector;
 299     registers[11] = env->segs[R_SS].selector;
 300     registers[12] = env->segs[R_DS].selector;
 301     registers[13] = env->segs[R_ES].selector;
 302     registers[14] = env->segs[R_FS].selector;
 303     registers[15] = env->segs[R_GS].selector;
 304     /* XXX: convert floats */
 305     for(i = 0; i < 8; i++) {
 306         memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
 307     }
 308     registers[36] = env->fpuc;
 309     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 310     registers[37] = fpus;
 311     registers[38] = 0; /* XXX: convert tags */
 312     registers[39] = 0; /* fiseg */
 313     registers[40] = 0; /* fioff */
 314     registers[41] = 0; /* foseg */
 315     registers[42] = 0; /* fooff */
 316     registers[43] = 0; /* fop */
 317
 318     for(i = 0; i < 16; i++)
 319         tswapls(&registers[i]);
 320     for(i = 36; i < 44; i++)
 321         tswapls(&registers[i]);
 322     return 44 * 4;
 323 }
 324
 325 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 326 {
 327     uint32_t *registers = (uint32_t *)mem_buf;
 328     int i;
 329
 330     for(i = 0; i < 8; i++) {
 331         env->regs[i] = tswapl(registers[i]);
 332     }
 333     env->eip = tswapl(registers[8]);
 334     env->eflags = tswapl(registers[9]);
 335 #if defined(CONFIG_USER_ONLY)
 336 #define LOAD_SEG(index, sreg)\
 337             if (tswapl(registers[index]) != env->segs[sreg].selector)\
 338                 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
 339             LOAD_SEG(10, R_CS);
 340             LOAD_SEG(11, R_SS);
 341             LOAD_SEG(12, R_DS);
 342             LOAD_SEG(13, R_ES);
 343             LOAD_SEG(14, R_FS);
 344             LOAD_SEG(15, R_GS);
 345 #endif
 346 }
 347
 348 #elif defined (TARGET_PPC)
 349 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 350 {
 351     uint32_t *registers = (uint32_t *)mem_buf, tmp;
 352     int i;
 353
 354     /* fill in gprs */
 355     for(i = 0; i < 32; i++) {
 356         registers[i] = tswapl(env->gpr[i]);
 357     }
 358     /* fill in fprs */
 359     for (i = 0; i < 32; i++) {
 360         registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 361         registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
 362     }
 363     /* nip, msr, ccr, lnk, ctr, xer, mq */
 364     registers[96] = tswapl(env->nip);
 365     registers[97] = tswapl(env->msr);
 366     tmp = 0;
 367     for (i = 0; i < 8; i++)
 368         tmp |= env->crf[i] << (32 - ((i + 1) * 4));
 369     registers[98] = tswapl(tmp);
 370     registers[99] = tswapl(env->lr);
 371     registers[100] = tswapl(env->ctr);
 372     registers[101] = tswapl(ppc_load_xer(env));
 373     registers[102] = 0;
 374
 375     return 103 * 4;
 376 }
 377
 378 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 379 {
 380     uint32_t *registers = (uint32_t *)mem_buf;
 381     int i;
 382
 383     /* fill in gprs */
 384     for (i = 0; i < 32; i++) {
 385         env->gpr[i] = tswapl(registers[i]);
 386     }
 387     /* fill in fprs */
 388     for (i = 0; i < 32; i++) {
 389         *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
 390         *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
 391     }
 392     /* nip, msr, ccr, lnk, ctr, xer, mq */
 393     env->nip = tswapl(registers[96]);
 394     ppc_store_msr(env, tswapl(registers[97]));
 395     registers[98] = tswapl(registers[98]);
 396     for (i = 0; i < 8; i++)
 397         env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
 398     env->lr = tswapl(registers[99]);
 399     env->ctr = tswapl(registers[100]);
 400     ppc_store_xer(env, tswapl(registers[101]));
 401 }
 402 #elif defined (TARGET_SPARC)
 403 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 404 {
 405     target_ulong *registers = (target_ulong *)mem_buf;
 406     int i;
 407
 408     /* fill in g0..g7 */
 409     for(i = 0; i < 8; i++) {
 410         registers[i] = tswapl(env->gregs[i]);
 411     }
 412     /* fill in register window */
 413     for(i = 0; i < 24; i++) {
 414         registers[i + 8] = tswapl(env->regwptr[i]);
 415     }
 416 #ifndef TARGET_SPARC64
 417     /* fill in fprs */
 418     for (i = 0; i < 32; i++) {
 419         registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 420     }
 421     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 422     registers[64] = tswapl(env->y);
 423     {
 424         target_ulong tmp;
 425
 426         tmp = GET_PSR(env);
 427         registers[65] = tswapl(tmp);
 428     }
 429     registers[66] = tswapl(env->wim);
 430     registers[67] = tswapl(env->tbr);
 431     registers[68] = tswapl(env->pc);
 432     registers[69] = tswapl(env->npc);
 433     registers[70] = tswapl(env->fsr);
 434     registers[71] = 0; /* csr */
 435     registers[72] = 0;
 436     return 73 * sizeof(target_ulong);
 437 #else
 438     /* fill in fprs */
 439     for (i = 0; i < 64; i += 2) {
 440         uint64_t tmp;
 441
 442         tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
 443         tmp |= *(uint32_t *)&env->fpr[i + 1];
 444         registers[i / 2 + 32] = tswap64(tmp);
 445     }
 446     registers[64] = tswapl(env->pc);
 447     registers[65] = tswapl(env->npc);
 448     registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
 449                            ((env->asi & 0xff) << 24) |
 450                            ((env->pstate & 0xfff) << 8) |
 451                            GET_CWP64(env));
 452     registers[67] = tswapl(env->fsr);
 453     registers[68] = tswapl(env->fprs);
 454     registers[69] = tswapl(env->y);
 455     return 70 * sizeof(target_ulong);
 456 #endif
 457 }
 458
 459 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 460 {
 461     target_ulong *registers = (target_ulong *)mem_buf;
 462     int i;
 463
 464     /* fill in g0..g7 */
 465     for(i = 0; i < 7; i++) {
 466         env->gregs[i] = tswapl(registers[i]);
 467     }
 468     /* fill in register window */
 469     for(i = 0; i < 24; i++) {
 470         env->regwptr[i] = tswapl(registers[i + 8]);
 471     }
 472 #ifndef TARGET_SPARC64
 473     /* fill in fprs */
 474     for (i = 0; i < 32; i++) {
 475         *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
 476     }
 477     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 478     env->y = tswapl(registers[64]);
 479     PUT_PSR(env, tswapl(registers[65]));
 480     env->wim = tswapl(registers[66]);
 481     env->tbr = tswapl(registers[67]);
 482     env->pc = tswapl(registers[68]);
 483     env->npc = tswapl(registers[69]);
 484     env->fsr = tswapl(registers[70]);
 485 #else
 486     for (i = 0; i < 64; i += 2) {
 487         uint64_t tmp;
 488
 489         tmp = tswap64(registers[i / 2 + 32]);
 490         *((uint32_t *)&env->fpr[i]) = tmp >> 32;
 491         *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
 492     }
 493     env->pc = tswapl(registers[64]);
 494     env->npc = tswapl(registers[65]);
 495     {
 496         uint64_t tmp = tswapl(registers[66]);
 497
 498         PUT_CCR(env, tmp >> 32);
 499         env->asi = (tmp >> 24) & 0xff;
 500         env->pstate = (tmp >> 8) & 0xfff;
 501         PUT_CWP64(env, tmp & 0xff);
 502     }
 503     env->fsr = tswapl(registers[67]);
 504     env->fprs = tswapl(registers[68]);
 505     env->y = tswapl(registers[69]);
 506 #endif
 507 }
 508 #elif defined (TARGET_ARM)
 509 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 510 {
 511     int i;
 512     uint8_t *ptr;
 513
 514     ptr = mem_buf;
 515     /* 16 core integer registers (4 bytes each).  */
 516     for (i = 0; i < 16; i++)
 517       {
 518         *(uint32_t *)ptr = tswapl(env->regs[i]);
 519         ptr += 4;
 520       }
 521     /* 8 FPA registers (12 bytes each), FPS (4 bytes).
 522        Not yet implemented.  */
 523     memset (ptr, 0, 8 * 12 + 4);
 524     ptr += 8 * 12 + 4;
 525     /* CPSR (4 bytes).  */
 526     *(uint32_t *)ptr = tswapl (cpsr_read(env));
 527     ptr += 4;
 528
 529     return ptr - mem_buf;
 530 }
 531
 532 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 533 {
 534     int i;
 535     uint8_t *ptr;
 536
 537     ptr = mem_buf;
 538     /* Core integer registers.  */
 539     for (i = 0; i < 16; i++)
 540       {
 541         env->regs[i] = tswapl(*(uint32_t *)ptr);
 542         ptr += 4;
 543       }
 544     /* Ignore FPA regs and scr.  */
 545     ptr += 8 * 12 + 4;
 546     cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
 547 }
 548 #elif defined (TARGET_M68K)
 549 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 550 {
 551     int i;
 552     uint8_t *ptr;
 553     CPU_DoubleU u;
 554
 555     ptr = mem_buf;
 556     /* D0-D7 */
 557     for (i = 0; i < 8; i++) {
 558         *(uint32_t *)ptr = tswapl(env->dregs[i]);
 559         ptr += 4;
 560     }
 561     /* A0-A7 */
 562     for (i = 0; i < 8; i++) {
 563         *(uint32_t *)ptr = tswapl(env->aregs[i]);
 564         ptr += 4;
 565     }
 566     *(uint32_t *)ptr = tswapl(env->sr);
 567     ptr += 4;
 568     *(uint32_t *)ptr = tswapl(env->pc);
 569     ptr += 4;
 570     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 571        ColdFire has 8-bit double precision registers.  */
 572     for (i = 0; i < 8; i++) {
 573         u.d = env->fregs[i];
 574         *(uint32_t *)ptr = tswap32(u.l.upper);
 575         *(uint32_t *)ptr = tswap32(u.l.lower);
 576     }
 577     /* FP control regs (not implemented).  */
 578     memset (ptr, 0, 3 * 4);
 579     ptr += 3 * 4;
 580
 581     return ptr - mem_buf;
 582 }
 583
 584 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 585 {
 586     int i;
 587     uint8_t *ptr;
 588     CPU_DoubleU u;
 589
 590     ptr = mem_buf;
 591     /* D0-D7 */
 592     for (i = 0; i < 8; i++) {
 593         env->dregs[i] = tswapl(*(uint32_t *)ptr);
 594         ptr += 4;
 595     }
 596     /* A0-A7 */
 597     for (i = 0; i < 8; i++) {
 598         env->aregs[i] = tswapl(*(uint32_t *)ptr);
 599         ptr += 4;
 600     }
 601     env->sr = tswapl(*(uint32_t *)ptr);
 602     ptr += 4;
 603     env->pc = tswapl(*(uint32_t *)ptr);
 604     ptr += 4;
 605     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 606        ColdFire has 8-bit double precision registers.  */
 607     for (i = 0; i < 8; i++) {
 608         u.l.upper = tswap32(*(uint32_t *)ptr);
 609         u.l.lower = tswap32(*(uint32_t *)ptr);
 610         env->fregs[i] = u.d;
 611     }
 612     /* FP control regs (not implemented).  */
 613     ptr += 3 * 4;
 614 }
 615 #elif defined (TARGET_MIPS)
 616 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 617 {
 618     int i;
 619     uint8_t *ptr;
 620
 621     ptr = mem_buf;
 622     for (i = 0; i < 32; i++)
 623       {
 624         *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
 625         ptr += sizeof(target_ulong);
 626       }
 627
 628     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
 629     ptr += sizeof(target_ulong);
 630
 631     *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
 632     ptr += sizeof(target_ulong);
 633
 634     *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
 635     ptr += sizeof(target_ulong);
 636
 637     *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
 638     ptr += sizeof(target_ulong);
 639
 640     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
 641     ptr += sizeof(target_ulong);
 642
 643     *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
 644     ptr += sizeof(target_ulong);
 645
 646     if (env->CP0_Config1 & (1 << CP0C1_FP))
 647       {
 648         for (i = 0; i < 32; i++)
 649           {
 650             if (env->CP0_Status & (1 << CP0St_FR))
 651               *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
 652             else
 653               *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
 654             ptr += sizeof(target_ulong);
 655           }
 656
 657         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
 658         ptr += sizeof(target_ulong);
 659
 660         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
 661         ptr += sizeof(target_ulong);
 662       }
 663
 664     /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
 665     *(target_ulong *)ptr = 0;
 666     ptr += sizeof(target_ulong);
 667
 668     /* Registers for embedded use, we just pad them. */
 669     for (i = 0; i < 16; i++)
 670       {
 671         *(target_ulong *)ptr = 0;
 672         ptr += sizeof(target_ulong);
 673       }
 674
 675     /* Processor ID. */
 676     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
 677     ptr += sizeof(target_ulong);
 678
 679     return ptr - mem_buf;
 680 }
 681
 682 /* convert MIPS rounding mode in FCR31 to IEEE library */
 683 static unsigned int ieee_rm[] =
 684   {
 685     float_round_nearest_even,
 686     float_round_to_zero,
 687     float_round_up,
 688     float_round_down
 689   };
 690 #define RESTORE_ROUNDING_MODE \
 691     set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
 692
 693 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 694 {
 695     int i;
 696     uint8_t *ptr;
 697
 698     ptr = mem_buf;
 699     for (i = 0; i < 32; i++)
 700       {
 701         env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
 702         ptr += sizeof(target_ulong);
 703       }
 704
 705     env->CP0_Status = tswapl(*(target_ulong *)ptr);
 706     ptr += sizeof(target_ulong);
 707
 708     env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
 709     ptr += sizeof(target_ulong);
 710
 711     env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
 712     ptr += sizeof(target_ulong);
 713
 714     env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
 715     ptr += sizeof(target_ulong);
 716
 717     env->CP0_Cause = tswapl(*(target_ulong *)ptr);
 718     ptr += sizeof(target_ulong);
 719
 720     env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
 721     ptr += sizeof(target_ulong);
 722
 723     if (env->CP0_Config1 & (1 << CP0C1_FP))
 724       {
 725         for (i = 0; i < 32; i++)
 726           {
 727             if (env->CP0_Status & (1 << CP0St_FR))
 728               env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
 729             else
 730               env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
 731             ptr += sizeof(target_ulong);
 732           }
 733
 734         env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
 735         ptr += sizeof(target_ulong);
 736
 737         /* The remaining registers are assumed to be read-only. */
 738
 739         /* set rounding mode */
 740         RESTORE_ROUNDING_MODE;
 741
 742 #ifndef CONFIG_SOFTFLOAT
 743         /* no floating point exception for native float */
 744         SET_FP_ENABLE(env->fcr31, 0);
 745 #endif
 746       }
 747 }
 748 #elif defined (TARGET_SH4)
 749
 750 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 751
 752 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 753 {
 754   uint32_t *ptr = (uint32_t *)mem_buf;
 755   int i;
 756
 757 #define SAVE(x) *ptr++=tswapl(x)
 758   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 759       for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 760   } else {
 761       for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 762   }
 763   for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
 764   SAVE (env->pc);
 765   SAVE (env->pr);
 766   SAVE (env->gbr);
 767   SAVE (env->vbr);
 768   SAVE (env->mach);
 769   SAVE (env->macl);
 770   SAVE (env->sr);
 771   SAVE (env->fpul);
 772   SAVE (env->fpscr);
 773   for (i = 0; i < 16; i++)
 774       SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 775   SAVE (env->ssr);
 776   SAVE (env->spc);
 777   for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 778   for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 779   return ((uint8_t *)ptr - mem_buf);
 780 }
 781
 782 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 783 {
 784   uint32_t *ptr = (uint32_t *)mem_buf;
 785   int i;
 786
 787 #define LOAD(x) (x)=*ptr++;
 788   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 789       for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 790   } else {
 791       for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 792   }
 793   for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
 794   LOAD (env->pc);
 795   LOAD (env->pr);
 796   LOAD (env->gbr);
 797   LOAD (env->vbr);
 798   LOAD (env->mach);
 799   LOAD (env->macl);
 800   LOAD (env->sr);
 801   LOAD (env->fpul);
 802   LOAD (env->fpscr);
 803   for (i = 0; i < 16; i++)
 804       LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 805   LOAD (env->ssr);
 806   LOAD (env->spc);
 807   for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 808   for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 809 }
 810 #elif defined (TARGET_CRIS)
 811
 812 static int cris_save_32 (unsigned char *d, uint32_t value)
 813 {
 814         *d++ = (value);
 815         *d++ = (value >>= 8);
 816         *d++ = (value >>= 8);
 817         *d++ = (value >>= 8);
 818         return 4;
 819 }
 820 static int cris_save_16 (unsigned char *d, uint32_t value)
 821 {
 822         *d++ = (value);
 823         *d++ = (value >>= 8);
 824         return 2;
 825 }
 826 static int cris_save_8 (unsigned char *d, uint32_t value)
 827 {
 828         *d++ = (value);
 829         return 1;
 830 }
 831
 832 /* FIXME: this will bug on archs not supporting unaligned word accesses.  */
 833 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 834 {
 835   uint8_t *ptr = mem_buf;
 836   uint8_t srs;
 837   int i;
 838
 839   for (i = 0; i < 16; i++)
 840           ptr += cris_save_32 (ptr, env->regs[i]);
 841
 842   srs = env->pregs[PR_SRS];
 843
 844   ptr += cris_save_8 (ptr, env->pregs[0]);
 845   ptr += cris_save_8 (ptr, env->pregs[1]);
 846   ptr += cris_save_32 (ptr, env->pregs[2]);
 847   ptr += cris_save_8 (ptr, srs);
 848   ptr += cris_save_16 (ptr, env->pregs[4]);
 849
 850   for (i = 5; i < 16; i++)
 851           ptr += cris_save_32 (ptr, env->pregs[i]);
 852
 853   ptr += cris_save_32 (ptr, env->pc);
 854
 855   for (i = 0; i < 16; i++)
 856           ptr += cris_save_32 (ptr, env->sregs[srs][i]);
 857
 858   return ((uint8_t *)ptr - mem_buf);
 859 }
 860
 861 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 862 {
 863   uint32_t *ptr = (uint32_t *)mem_buf;
 864   int i;
 865
 866 #define LOAD(x) (x)=*ptr++;
 867   for (i = 0; i < 16; i++) LOAD(env->regs[i]);
 868   LOAD (env->pc);
 869 }
 870 #else
 871 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 872 {
 873     return 0;
 874 }
 875
 876 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 877 {
 878 }
 879
 880 #endif
 881
 882 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
 883 {
 884     const char *p;
 885     int ch, reg_size, type;
 886     char buf[4096];
 887     uint8_t mem_buf[4096];
 888     uint32_t *registers;
 889     target_ulong addr, len;
 890
 891 #ifdef DEBUG_GDB
 892     printf("command='%s'\n", line_buf);
 893 #endif
 894     p = line_buf;
 895     ch = *p++;
 896     switch(ch) {
 897     case '?':
 898         /* TODO: Make this return the correct value for user-mode.  */
 899         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
 900         put_packet(s, buf);
 901         break;
 902     case 'c':
 903         if (*p != '\0') {
 904             addr = strtoull(p, (char **)&p, 16);
 905 #if defined(TARGET_I386)
 906             env->eip = addr;
 907             if (kvm_enabled())
 908                 kvm_load_registers(env);
 909 #elif defined (TARGET_PPC)
 910             env->nip = addr;
 911 #elif defined (TARGET_SPARC)
 912             env->pc = addr;
 913             env->npc = addr + 4;
 914 #elif defined (TARGET_ARM)
 915             env->regs[15] = addr;
 916 #elif defined (TARGET_SH4)
 917             env->pc = addr;
 918 #elif defined (TARGET_MIPS)
 919             env->PC[env->current_tc] = addr;
 920 #elif defined (TARGET_CRIS)
 921             env->pc = addr;
 922 #endif
 923         }
 924         gdb_continue(s);
 925         return RS_IDLE;
 926     case 's':
 927         if (*p != '\0') {
 928             addr = strtoull(p, (char **)&p, 16);
 929 #if defined(TARGET_I386)
 930             env->eip = addr;
 931             if (kvm_enabled())
 932                 kvm_load_registers(env);
 933 #elif defined (TARGET_PPC)
 934             env->nip = addr;
 935 #elif defined (TARGET_SPARC)
 936             env->pc = addr;
 937             env->npc = addr + 4;
 938 #elif defined (TARGET_ARM)
 939             env->regs[15] = addr;
 940 #elif defined (TARGET_SH4)
 941             env->pc = addr;
 942 #elif defined (TARGET_MIPS)
 943             env->PC[env->current_tc] = addr;
 944 #elif defined (TARGET_CRIS)
 945             env->pc = addr;
 946 #endif
 947         }
 948         cpu_single_step(env, 1);
 949         gdb_continue(s);
 950         return RS_IDLE;
 951     case 'F':
 952         {
 953             target_ulong ret;
 954             target_ulong err;
 955
 956             ret = strtoull(p, (char **)&p, 16);
 957             if (*p == ',') {
 958                 p++;
 959                 err = strtoull(p, (char **)&p, 16);
 960             } else {
 961                 err = 0;
 962             }
 963             if (*p == ',')
 964                 p++;
 965             type = *p;
 966             if (gdb_current_syscall_cb)
 967                 gdb_current_syscall_cb(s->env, ret, err);
 968             if (type == 'C') {
 969                 put_packet(s, "T02");
 970             } else {
 971                 gdb_continue(s);
 972             }
 973         }
 974         break;
 975     case 'g':
 976         if (kvm_enabled())
 977             kvm_save_registers(env);
 978         reg_size = cpu_gdb_read_registers(env, mem_buf);
 979         memtohex(buf, mem_buf, reg_size);
 980         put_packet(s, buf);
 981         break;
 982     case 'G':
 983         registers = (void *)mem_buf;
 984         len = strlen(p) / 2;
 985         hextomem((uint8_t *)registers, p, len);
 986         cpu_gdb_write_registers(env, mem_buf, len);
 987         if (kvm_enabled())
 988             kvm_load_registers(env);
 989         put_packet(s, "OK");
 990         break;
 991     case 'm':
 992         addr = strtoull(p, (char **)&p, 16);
 993         if (*p == ',')
 994             p++;
 995         len = strtoull(p, NULL, 16);
 996         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
 997             put_packet (s, "E14");
 998         } else {
 999             memtohex(buf, mem_buf, len);
1000             put_packet(s, buf);
1001         }
1002         break;
1003     case 'M':
1004         addr = strtoull(p, (char **)&p, 16);
1005         if (*p == ',')
1006             p++;
1007         len = strtoull(p, (char **)&p, 16);
1008         if (*p == ':')
1009             p++;
1010         hextomem(mem_buf, p, len);
1011         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1012             put_packet(s, "E14");
1013         else
1014             put_packet(s, "OK");
1015         break;
1016     case 'Z':
1017         type = strtoul(p, (char **)&p, 16);
1018         if (*p == ',')
1019             p++;
1020         addr = strtoull(p, (char **)&p, 16);
1021         if (*p == ',')
1022             p++;
1023         len = strtoull(p, (char **)&p, 16);
1024         if (type == 0 || type == 1) {
1025             if (cpu_breakpoint_insert(env, addr) < 0)
1026                 goto breakpoint_error;
1027             put_packet(s, "OK");
1028 #ifndef CONFIG_USER_ONLY
1029         } else if (type == 2) {
1030             if (cpu_watchpoint_insert(env, addr) < 0)
1031                 goto breakpoint_error;
1032             put_packet(s, "OK");
1033 #endif
1034         } else {
1035         breakpoint_error:
1036             put_packet(s, "E22");
1037         }
1038         break;
1039     case 'z':
1040         type = strtoul(p, (char **)&p, 16);
1041         if (*p == ',')
1042             p++;
1043         addr = strtoull(p, (char **)&p, 16);
1044         if (*p == ',')
1045             p++;
1046         len = strtoull(p, (char **)&p, 16);
1047         if (type == 0 || type == 1) {
1048             cpu_breakpoint_remove(env, addr);
1049             put_packet(s, "OK");
1050 #ifndef CONFIG_USER_ONLY
1051         } else if (type == 2) {
1052             cpu_watchpoint_remove(env, addr);
1053             put_packet(s, "OK");
1054 #endif
1055         } else {
1056             goto breakpoint_error;
1057         }
1058         break;
1059 #ifdef CONFIG_LINUX_USER
1060     case 'q':
1061         if (strncmp(p, "Offsets", 7) == 0) {
1062             TaskState *ts = env->opaque;
1063
1064             sprintf(buf,
1065                     "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1066                     ";Bss=" TARGET_ABI_FMT_lx,
1067                     ts->info->code_offset,
1068                     ts->info->data_offset,
1069                     ts->info->data_offset);
1070             put_packet(s, buf);
1071             break;
1072         }
1073         /* Fall through.  */
1074 #endif
1075     default:
1076         //        unknown_command:
1077         /* put empty packet */
1078         buf[0] = '\0';
1079         put_packet(s, buf);
1080         break;
1081     }
1082     return RS_IDLE;
1083 }
1084
1085 extern void tb_flush(CPUState *env);
1086
1087 #ifndef CONFIG_USER_ONLY
1088 static void gdb_vm_stopped(void *opaque, int reason)
1089 {
1090     GDBState *s = opaque;
1091     char buf[256];
1092     int ret;
1093
1094     if (s->state == RS_SYSCALL)
1095         return;
1096
1097     /* disable single step if it was enable */
1098     cpu_single_step(s->env, 0);
1099
1100     if (reason == EXCP_DEBUG) {
1101         if (s->env->watchpoint_hit) {
1102             snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1103                      SIGTRAP,
1104                      s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1105             put_packet(s, buf);
1106             s->env->watchpoint_hit = 0;
1107             return;
1108         }
1109         tb_flush(s->env);
1110         ret = SIGTRAP;
1111     } else if (reason == EXCP_INTERRUPT) {
1112         ret = SIGINT;
1113     } else {
1114         ret = 0;
1115     }
1116     snprintf(buf, sizeof(buf), "S%02x", ret);
1117     put_packet(s, buf);
1118 }
1119 #endif
1120
1121 /* Send a gdb syscall request.
1122    This accepts limited printf-style format specifiers, specifically:
1123     %x  - target_ulong argument printed in hex.
1124     %lx - 64-bit argument printed in hex.
1125     %s  - string pointer (target_ulong) and length (int) pair.  */
1126 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1127 {
1128     va_list va;
1129     char buf[256];
1130     char *p;
1131     target_ulong addr;
1132     uint64_t i64;
1133     GDBState *s;
1134
1135     s = gdb_syscall_state;
1136     if (!s)
1137         return;
1138     gdb_current_syscall_cb = cb;
1139     s->state = RS_SYSCALL;
1140 #ifndef CONFIG_USER_ONLY
1141     vm_stop(EXCP_DEBUG);
1142 #endif
1143     s->state = RS_IDLE;
1144     va_start(va, fmt);
1145     p = buf;
1146     *(p++) = 'F';
1147     while (*fmt) {
1148         if (*fmt == '%') {
1149             fmt++;
1150             switch (*fmt++) {
1151             case 'x':
1152                 addr = va_arg(va, target_ulong);
1153                 p += sprintf(p, TARGET_FMT_lx, addr);
1154                 break;
1155             case 'l':
1156                 if (*(fmt++) != 'x')
1157                     goto bad_format;
1158                 i64 = va_arg(va, uint64_t);
1159                 p += sprintf(p, "%" PRIx64, i64);
1160                 break;
1161             case 's':
1162                 addr = va_arg(va, target_ulong);
1163                 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1164                 break;
1165             default:
1166             bad_format:
1167                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1168                         fmt - 1);
1169                 break;
1170             }
1171         } else {
1172             *(p++) = *(fmt++);
1173         }
1174     }
1175     *p = 0;
1176     va_end(va);
1177     put_packet(s, buf);
1178 #ifdef CONFIG_USER_ONLY
1179     gdb_handlesig(s->env, 0);
1180 #else
1181     cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1182 #endif
1183 }
1184
1185 static void gdb_read_byte(GDBState *s, int ch)
1186 {
1187     CPUState *env = s->env;
1188     int i, csum;
1189     uint8_t reply;
1190
1191 #ifndef CONFIG_USER_ONLY
1192     if (s->last_packet_len) {
1193         /* Waiting for a response to the last packet.  If we see the start
1194            of a new command then abandon the previous response.  */
1195         if (ch == '-') {
1196 #ifdef DEBUG_GDB
1197             printf("Got NACK, retransmitting\n");
1198 #endif
1199             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1200         }
1201 #ifdef DEBUG_GDB
1202         else if (ch == '+')
1203             printf("Got ACK\n");
1204         else
1205             printf("Got '%c' when expecting ACK/NACK\n", ch);
1206 #endif
1207         if (ch == '+' || ch == '$')
1208             s->last_packet_len = 0;
1209         if (ch != '$')
1210             return;
1211     }
1212     if (vm_running) {
1213         /* when the CPU is running, we cannot do anything except stop
1214            it when receiving a char */
1215         vm_stop(EXCP_INTERRUPT);
1216     } else
1217 #endif
1218     {
1219         switch(s->state) {
1220         case RS_IDLE:
1221             if (ch == '$') {
1222                 s->line_buf_index = 0;
1223                 s->state = RS_GETLINE;
1224             }
1225             break;
1226         case RS_GETLINE:
1227             if (ch == '#') {
1228             s->state = RS_CHKSUM1;
1229             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1230                 s->state = RS_IDLE;
1231             } else {
1232             s->line_buf[s->line_buf_index++] = ch;
1233             }
1234             break;
1235         case RS_CHKSUM1:
1236             s->line_buf[s->line_buf_index] = '\0';
1237             s->line_csum = fromhex(ch) << 4;
1238             s->state = RS_CHKSUM2;
1239             break;
1240         case RS_CHKSUM2:
1241             s->line_csum |= fromhex(ch);
1242             csum = 0;
1243             for(i = 0; i < s->line_buf_index; i++) {
1244                 csum += s->line_buf[i];
1245             }
1246             if (s->line_csum != (csum & 0xff)) {
1247                 reply = '-';
1248                 put_buffer(s, &reply, 1);
1249                 s->state = RS_IDLE;
1250             } else {
1251                 reply = '+';
1252                 put_buffer(s, &reply, 1);
1253                 s->state = gdb_handle_packet(s, env, s->line_buf);
1254             }
1255             break;
1256         default:
1257             abort();
1258         }
1259     }
1260 }
1261
1262 #ifdef CONFIG_USER_ONLY
1263 int
1264 gdb_handlesig (CPUState *env, int sig)
1265 {
1266   GDBState *s;
1267   char buf[256];
1268   int n;
1269
1270   if (gdbserver_fd < 0)
1271     return sig;
1272
1273   s = &gdbserver_state;
1274
1275   /* disable single step if it was enabled */
1276   cpu_single_step(env, 0);
1277   tb_flush(env);
1278
1279   if (sig != 0)
1280     {
1281       snprintf(buf, sizeof(buf), "S%02x", sig);
1282       put_packet(s, buf);
1283     }
1284
1285   sig = 0;
1286   s->state = RS_IDLE;
1287   s->running_state = 0;
1288   while (s->running_state == 0) {
1289       n = read (s->fd, buf, 256);
1290       if (n > 0)
1291         {
1292           int i;
1293
1294           for (i = 0; i < n; i++)
1295             gdb_read_byte (s, buf[i]);
1296         }
1297       else if (n == 0 || errno != EAGAIN)
1298         {
1299           /* XXX: Connection closed.  Should probably wait for annother
1300              connection before continuing.  */
1301           return sig;
1302         }
1303   }
1304   return sig;
1305 }
1306
1307 /* Tell the remote gdb that the process has exited.  */
1308 void gdb_exit(CPUState *env, int code)
1309 {
1310   GDBState *s;
1311   char buf[4];
1312
1313   if (gdbserver_fd < 0)
1314     return;
1315
1316   s = &gdbserver_state;
1317
1318   snprintf(buf, sizeof(buf), "W%02x", code);
1319   put_packet(s, buf);
1320 }
1321
1322
1323 static void gdb_accept(void *opaque)
1324 {
1325     GDBState *s;
1326     struct sockaddr_in sockaddr;
1327     socklen_t len;
1328     int val, fd;
1329
1330     for(;;) {
1331         len = sizeof(sockaddr);
1332         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1333         if (fd < 0 && errno != EINTR) {
1334             perror("accept");
1335             return;
1336         } else if (fd >= 0) {
1337             break;
1338         }
1339     }
1340
1341     /* set short latency */
1342     val = 1;
1343     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1344
1345     s = &gdbserver_state;
1346     memset (s, 0, sizeof (GDBState));
1347     s->env = first_cpu; /* XXX: allow to change CPU */
1348     s->fd = fd;
1349
1350     gdb_syscall_state = s;
1351
1352     fcntl(fd, F_SETFL, O_NONBLOCK);
1353 }
1354
1355 static int gdbserver_open(int port)
1356 {
1357     struct sockaddr_in sockaddr;
1358     int fd, val, ret;
1359
1360     fd = socket(PF_INET, SOCK_STREAM, 0);
1361     if (fd < 0) {
1362         perror("socket");
1363         return -1;
1364     }
1365
1366     /* allow fast reuse */
1367     val = 1;
1368     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1369
1370     sockaddr.sin_family = AF_INET;
1371     sockaddr.sin_port = htons(port);
1372     sockaddr.sin_addr.s_addr = 0;
1373     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1374     if (ret < 0) {
1375         perror("bind");
1376         return -1;
1377     }
1378     ret = listen(fd, 0);
1379     if (ret < 0) {
1380         perror("listen");
1381         return -1;
1382     }
1383     return fd;
1384 }
1385
1386 int gdbserver_start(int port)
1387 {
1388     gdbserver_fd = gdbserver_open(port);
1389     if (gdbserver_fd < 0)
1390         return -1;
1391     /* accept connections */
1392     gdb_accept (NULL);
1393     return 0;
1394 }
1395 #else
1396 static int gdb_chr_can_receive(void *opaque)
1397 {
1398   return 1;
1399 }
1400
1401 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1402 {
1403     GDBState *s = opaque;
1404     int i;
1405
1406     for (i = 0; i < size; i++) {
1407         gdb_read_byte(s, buf[i]);
1408     }
1409 }
1410
1411 static void gdb_chr_event(void *opaque, int event)
1412 {
1413     switch (event) {
1414     case CHR_EVENT_RESET:
1415         vm_stop(EXCP_INTERRUPT);
1416         gdb_syscall_state = opaque;
1417         break;
1418     default:
1419         break;
1420     }
1421 }
1422
1423 int gdbserver_start(const char *port)
1424 {
1425     GDBState *s;
1426     char gdbstub_port_name[128];
1427     int port_num;
1428     char *p;
1429     CharDriverState *chr;
1430
1431     if (!port || !*port)
1432       return -1;
1433
1434     port_num = strtol(port, &p, 10);
1435     if (*p == 0) {
1436         /* A numeric value is interpreted as a port number.  */
1437         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1438                  "tcp::%d,nowait,nodelay,server", port_num);
1439         port = gdbstub_port_name;
1440     }
1441
1442     chr = qemu_chr_open(port);
1443     if (!chr)
1444         return -1;
1445
1446     s = qemu_mallocz(sizeof(GDBState));
1447     if (!s) {
1448         return -1;
1449     }
1450     s->env = first_cpu; /* XXX: allow to change CPU */
1451     s->chr = chr;
1452     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1453                           gdb_chr_event, s);
1454     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1455     return 0;
1456 }
1457 #endif