flight/pios/stm32f4xx/pios_overo.c

   1 /**
   2  ******************************************************************************
   3  * @addtogroup PIOS PIOS Core hardware abstraction layer
   4  * @{
   5  * @addtogroup   PIOS_OVERO OVERO Functions
   6  * @brief PIOS interface to read and write to overo
   7  * @{
   8  *
   9  * @file       pios_overo.c
  10  * @author     The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
  11  * @brief      Hardware Abstraction Layer for Overo communications
  12  * @see        The GNU Public License (GPL) Version 3
  13  * @notes
  14  *
  15  *****************************************************************************/
  16 /*
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License as published by
  19  * the Free Software Foundation; either version 3 of the License, or
  20  * (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful, but
  23  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  25  * for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License along
  28  * with this program; if not, write to the Free Software Foundation, Inc.,
  29  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30  */
  31
  32 #include <pios.h>
  33
  34 #ifdef PIOS_INCLUDE_OVERO
  35
  36 /**
  37  * Configures the SPI device to use a double buffered DMA for transferring
  38  * data.  At the end of each transfer (NSS goes high) it makes sure to reset
  39  * the DMA counter to the beginning of each packet and swap to the next
  40  * buffer
  41  */
  42
  43 #ifdef PIOS_INCLUDE_SPI
  44
  45 #include <pios_overo_priv.h>
  46
  47 #define PACKET_SIZE 1024
  48
  49 /* Provide a COM driver */
  50 static void PIOS_OVERO_RegisterRxCallback(uint32_t overo_id, pios_com_callback rx_in_cb, uint32_t context);
  51 static void PIOS_OVERO_RegisterTxCallback(uint32_t overo_id, pios_com_callback tx_out_cb, uint32_t context);
  52 static void PIOS_OVERO_TxStart(uint32_t overo_id, uint16_t tx_bytes_avail);
  53 static void PIOS_OVERO_RxStart(uint32_t overo_id, uint16_t rx_bytes_avail);
  54
  55 const struct pios_com_driver pios_overo_com_driver = {
  56     .set_baud   = NULL,
  57     .tx_start   = PIOS_OVERO_TxStart,
  58     .rx_start   = PIOS_OVERO_RxStart,
  59     .bind_tx_cb = PIOS_OVERO_RegisterTxCallback,
  60     .bind_rx_cb = PIOS_OVERO_RegisterRxCallback,
  61 };
  62
  63 // ! Data types
  64 enum pios_overo_dev_magic {
  65     PIOS_OVERO_DEV_MAGIC = 0x85A3834A,
  66 };
  67
  68 struct pios_overo_dev {
  69     enum pios_overo_dev_magic   magic;
  70     const struct pios_overo_cfg *cfg;
  71
  72     int8_t   writing_buffer;
  73     uint32_t writing_offset;
  74
  75     uint32_t packets;
  76
  77     uint8_t  tx_buffer[2][PACKET_SIZE];
  78     uint8_t  rx_buffer[2][PACKET_SIZE];
  79
  80     pios_com_callback rx_in_cb;
  81     uint32_t rx_in_context;
  82     pios_com_callback tx_out_cb;
  83     uint32_t tx_out_context;
  84 };
  85
  86 #if defined(PIOS_INCLUDE_FREERTOS)
  87 // ! Private methods
  88 static void PIOS_OVERO_WriteData(struct pios_overo_dev *overo_dev);
  89 static bool PIOS_OVERO_validate(struct pios_overo_dev *overo_dev);
  90 static struct pios_overo_dev *PIOS_OVERO_alloc(void);
  91
  92 static bool PIOS_OVERO_validate(struct pios_overo_dev *overo_dev)
  93 {
  94     return overo_dev->magic == PIOS_OVERO_DEV_MAGIC;
  95 }
  96
  97 static struct pios_overo_dev *PIOS_OVERO_alloc(void)
  98 {
  99     struct pios_overo_dev *overo_dev;
 100
 101     overo_dev = (struct pios_overo_dev *)pios_malloc(sizeof(*overo_dev));
 102     if (!overo_dev) {
 103         return NULL;
 104     }
 105
 106     overo_dev->rx_in_cb       = 0;
 107     overo_dev->rx_in_context  = 0;
 108     overo_dev->tx_out_cb      = 0;
 109     overo_dev->tx_out_context = 0;
 110     overo_dev->packets = 0;
 111     overo_dev->magic   = PIOS_OVERO_DEV_MAGIC;
 112     return overo_dev;
 113 }
 114
 115 /**
 116  * Take data from the PIOS_COM buffer and transfer it to the currently inactive DMA
 117  * circular buffer
 118  */
 119 static void PIOS_OVERO_WriteData(struct pios_overo_dev *overo_dev)
 120 {
 121     // TODO: How do we protect against the DMA buffer swapping midway through adding data
 122     // to this buffer.  If we were writing at the beginning it could cause a weird race.
 123     if (overo_dev->tx_out_cb) {
 124         int32_t max_bytes = PACKET_SIZE - overo_dev->writing_offset;
 125
 126         if (max_bytes > 0) {
 127             uint16_t bytes_added;
 128             bool tx_need_yield = false;
 129             uint8_t *writing_pointer = &overo_dev->tx_buffer[overo_dev->writing_buffer][overo_dev->writing_offset];
 130
 131             bytes_added = (overo_dev->tx_out_cb)(overo_dev->tx_out_context, writing_pointer, max_bytes, NULL, &tx_need_yield);
 132
 133 #if defined(OVERO_USES_BLOCKING_WRITE)
 134             if (tx_need_yield) {
 135                 vPortYieldFromISR();
 136             }
 137 #endif
 138             overo_dev->writing_offset += bytes_added;
 139         }
 140     }
 141 }
 142
 143 /**
 144  * Called at the end of each DMA transaction.  Refresh the flag indicating which
 145  * DMA buffer to write new data from the PIOS_COM fifo into the buffer
 146  */
 147 void PIOS_OVERO_DMA_irq_handler(uint32_t overo_id)
 148 {
 149     struct pios_overo_dev *overo_dev = (struct pios_overo_dev *)overo_id;
 150
 151     if (!PIOS_OVERO_validate(overo_dev)) {
 152         return;
 153     }
 154
 155     DMA_ClearFlag(overo_dev->cfg->dma.tx.channel, overo_dev->cfg->dma.irq.flags);
 156
 157     overo_dev->writing_buffer = 1 - DMA_GetCurrentMemoryTarget(overo_dev->cfg->dma.tx.channel);
 158     overo_dev->writing_offset = 0;
 159
 160 /*      bool rx_need_yield;
 161         // Get data from the Rx buffer and add to the fifo
 162         (void) (overo_dev->rx_in_cb)(overo_dev->rx_in_context,
 163                                                                  &overo_dev->rx_buffer[overo_dev->writing_buffer][0],
 164                                                                 PACKET_SIZE, NULL, &rx_need_yield);
 165
 166         if(rx_need_yield) {
 167                 vPortYieldFromISR();
 168         }
 169
 170         // Fill the buffer with known value to prevent rereading these bytes
 171         memset(&overo_dev->rx_buffer[overo_dev->writing_buffer][0], 0xFF, PACKET_SIZE);
 172  */
 173     // Fill the buffer with known value to prevent resending any bytes
 174     memset(&overo_dev->tx_buffer[overo_dev->writing_buffer][0], 0xFF, PACKET_SIZE);
 175
 176     // Load any pending bytes from TX fifo
 177     PIOS_OVERO_WriteData(overo_dev);
 178
 179     overo_dev->packets++;
 180 }
 181
 182 /**
 183  * Debugging information to check how it is runnign
 184  */
 185 int32_t PIOS_OVERO_GetPacketCount(uint32_t overo_id)
 186 {
 187     struct pios_overo_dev *overo_dev = (struct pios_overo_dev *)overo_id;
 188
 189     PIOS_Assert(PIOS_OVERO_validate(overo_dev));
 190
 191     return overo_dev->packets;
 192 }
 193
 194 /**
 195  * Debugging information to check how it is runnign
 196  */
 197 int32_t PIOS_OVERO_GetWrittenBytes(uint32_t overo_id)
 198 {
 199     struct pios_overo_dev *overo_dev = (struct pios_overo_dev *)overo_id;
 200
 201     PIOS_Assert(PIOS_OVERO_validate(overo_dev));
 202
 203     return overo_dev->writing_offset;
 204 }
 205
 206 /**
 207  * Initialise a single Overo device
 208  */
 209 int32_t PIOS_OVERO_Init(uint32_t *overo_id, const struct pios_overo_cfg *cfg)
 210 {
 211     PIOS_DEBUG_Assert(overo_id);
 212     PIOS_DEBUG_Assert(cfg);
 213
 214     struct pios_overo_dev *overo_dev;
 215
 216     overo_dev = (struct pios_overo_dev *)PIOS_OVERO_alloc();
 217     if (!overo_dev) {
 218         goto out_fail;
 219     }
 220
 221     /* Bind the configuration to the device instance */
 222     overo_dev->cfg = cfg;
 223     overo_dev->writing_buffer = 1; // First writes to second buffer
 224
 225     /* Put buffers to a known state */
 226     memset(&overo_dev->tx_buffer[0][0], 0xFF, PACKET_SIZE);
 227     memset(&overo_dev->tx_buffer[1][0], 0xFF, PACKET_SIZE);
 228     memset(&overo_dev->rx_buffer[0][0], 0xFF, PACKET_SIZE);
 229     memset(&overo_dev->rx_buffer[1][0], 0xFF, PACKET_SIZE);
 230
 231     /*
 232      * Enable the SPI device
 233      *
 234      * 1. Enable the SPI port
 235      * 2. Enable DMA with circular buffered DMA (validate config)
 236      * 3. Enable the DMA Tx IRQ
 237      */
 238
 239     // PIOS_Assert(overo_dev->cfg->dma.tx-> == CIRCULAR);
 240     // PIOS_Assert(overo_dev->cfg->dma.rx-> == CIRCULAR);
 241
 242     /* only legal for single-slave config */
 243     PIOS_Assert(overo_dev->cfg->slave_count == 1);
 244     SPI_SSOutputCmd(overo_dev->cfg->regs, DISABLE);
 245
 246     /* Initialize the GPIO pins */
 247     /* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
 248     GPIO_PinAFConfig(overo_dev->cfg->sclk.gpio,
 249                      __builtin_ctz(overo_dev->cfg->sclk.init.GPIO_Pin),
 250                      overo_dev->cfg->remap);
 251     GPIO_PinAFConfig(overo_dev->cfg->mosi.gpio,
 252                      __builtin_ctz(overo_dev->cfg->mosi.init.GPIO_Pin),
 253                      overo_dev->cfg->remap);
 254     GPIO_PinAFConfig(overo_dev->cfg->miso.gpio,
 255                      __builtin_ctz(overo_dev->cfg->miso.init.GPIO_Pin),
 256                      overo_dev->cfg->remap);
 257     GPIO_PinAFConfig(overo_dev->cfg->ssel[0].gpio,
 258                      __builtin_ctz(overo_dev->cfg->ssel[0].init.GPIO_Pin),
 259                      overo_dev->cfg->remap);
 260
 261     GPIO_Init(overo_dev->cfg->sclk.gpio, (GPIO_InitTypeDef *)&(overo_dev->cfg->sclk.init));
 262     GPIO_Init(overo_dev->cfg->mosi.gpio, (GPIO_InitTypeDef *)&(overo_dev->cfg->mosi.init));
 263     GPIO_Init(overo_dev->cfg->miso.gpio, (GPIO_InitTypeDef *)&(overo_dev->cfg->miso.init));
 264
 265     /* Configure circular buffer targets. Configure 0 to be initially active */
 266     DMA_InitTypeDef dma_init;
 267
 268     DMA_DeInit(overo_dev->cfg->dma.rx.channel);
 269     dma_init = overo_dev->cfg->dma.rx.init;
 270     dma_init.DMA_Memory0BaseAddr = (uint32_t)overo_dev->rx_buffer[0];
 271     dma_init.DMA_MemoryInc  = DMA_MemoryInc_Enable;
 272     dma_init.DMA_BufferSize = PACKET_SIZE;
 273     DMA_Init(overo_dev->cfg->dma.rx.channel, &dma_init);
 274     DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.rx.channel, (uint32_t)overo_dev->rx_buffer[1], DMA_Memory_0);
 275     DMA_DoubleBufferModeCmd(overo_dev->cfg->dma.rx.channel, ENABLE);
 276
 277     DMA_DeInit(overo_dev->cfg->dma.tx.channel);
 278     dma_init = overo_dev->cfg->dma.tx.init;
 279     dma_init.DMA_Memory0BaseAddr = (uint32_t)overo_dev->tx_buffer[0];
 280     dma_init.DMA_MemoryInc  = DMA_MemoryInc_Enable;
 281     dma_init.DMA_BufferSize = PACKET_SIZE;
 282     DMA_Init(overo_dev->cfg->dma.tx.channel, &dma_init);
 283     DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.tx.channel, (uint32_t)overo_dev->tx_buffer[1], DMA_Memory_0);
 284     DMA_DoubleBufferModeCmd(overo_dev->cfg->dma.tx.channel, ENABLE);
 285
 286     /* Set the packet size */
 287     DMA_SetCurrDataCounter(overo_dev->cfg->dma.rx.channel, PACKET_SIZE);
 288     DMA_SetCurrDataCounter(overo_dev->cfg->dma.tx.channel, PACKET_SIZE);
 289
 290     /* Initialize the SPI block */
 291     SPI_DeInit(overo_dev->cfg->regs);
 292     SPI_Init(overo_dev->cfg->regs, (SPI_InitTypeDef *)&(overo_dev->cfg->init));
 293
 294     SPI_CalculateCRC(overo_dev->cfg->regs, DISABLE);
 295
 296     /* Enable SPI */
 297     SPI_Cmd(overo_dev->cfg->regs, ENABLE);
 298
 299     /* Enable SPI interrupts to DMA */
 300     SPI_I2S_DMACmd(overo_dev->cfg->regs, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
 301
 302     /* Configure DMA interrupt */
 303     NVIC_Init((NVIC_InitTypeDef *)&(overo_dev->cfg->dma.irq.init));
 304     DMA_ITConfig(overo_dev->cfg->dma.tx.channel, DMA_IT_TC, ENABLE);
 305
 306     /* Enable the DMA channels */
 307     DMA_Cmd(overo_dev->cfg->dma.tx.channel, ENABLE);
 308     DMA_Cmd(overo_dev->cfg->dma.rx.channel, ENABLE);
 309
 310     *overo_id = (uint32_t)overo_dev;
 311
 312     return 0;
 313
 314 out_fail:
 315     return -1;
 316 }
 317
 318 static void PIOS_OVERO_RxStart(uint32_t overo_id, __attribute__((unused)) uint16_t rx_bytes_avail)
 319 {
 320     struct pios_overo_dev *overo_dev = (struct pios_overo_dev *)overo_id;
 321
 322     bool valid = PIOS_OVERO_validate(overo_dev);
 323
 324     PIOS_Assert(valid);
 325
 326     // DMA RX enable (enable IRQ) ?
 327 }
 328
 329 static void PIOS_OVERO_TxStart(uint32_t overo_id, __attribute__((unused)) uint16_t tx_bytes_avail)
 330 {
 331     struct pios_overo_dev *overo_dev = (struct pios_overo_dev *)overo_id;
 332
 333     bool valid = PIOS_OVERO_validate(overo_dev);
 334
 335     PIOS_Assert(valid);
 336
 337     // DMA TX enable (enable IRQ) ?
 338
 339     // Load any pending bytes from TX fifo
 340     // PIOS_OVERO_WriteData(overo_dev);
 341 }
 342
 343 static void PIOS_OVERO_RegisterRxCallback(uint32_t overo_id, pios_com_callback rx_in_cb, uint32_t context)
 344 {
 345     struct pios_overo_dev *overo_dev = (struct pios_overo_dev *)overo_id;
 346
 347     bool valid = PIOS_OVERO_validate(overo_dev);
 348
 349     PIOS_Assert(valid);
 350
 351     /*
 352      * Order is important in these assignments since ISR uses _cb
 353      * field to determine if it's ok to dereference _cb and _context
 354      */
 355     overo_dev->rx_in_context = context;
 356     overo_dev->rx_in_cb = rx_in_cb;
 357 }
 358
 359 static void PIOS_OVERO_RegisterTxCallback(uint32_t overo_id, pios_com_callback tx_out_cb, uint32_t context)
 360 {
 361     struct pios_overo_dev *overo_dev = (struct pios_overo_dev *)overo_id;
 362
 363     bool valid = PIOS_OVERO_validate(overo_dev);
 364
 365     PIOS_Assert(valid);
 366
 367     /*
 368      * Order is important in these assignments since ISR uses _cb
 369      * field to determine if it's ok to dereference _cb and _context
 370      */
 371     overo_dev->tx_out_context = context;
 372     overo_dev->tx_out_cb = tx_out_cb;
 373 }
 374
 375 #else /* if defined(PIOS_INCLUDE_FREERTOS) */
 376
 377 static void PIOS_OVERO_RegisterTxCallback(uint32_t overo_id, pios_com_callback tx_out_cb, uint32_t context) {};
 378 static void PIOS_OVERO_RegisterRxCallback(uint32_t overo_id, pios_com_callback rx_in_cb, uint32_t context) {};
 379 static void PIOS_OVERO_TxStart(uint32_t overo_id, uint16_t tx_bytes_avail) {};
 380 static void PIOS_OVERO_RxStart(uint32_t overo_id, uint16_t rx_bytes_avail) {};
 381
 382 #endif /* PIOS_INCLUDE_FREERTOS */
 383
 384 #endif /* PIOS_INCLUDE_SPI */
 385
 386 #endif /* PIOS_INCLUDE_OVERO */
 387
 388 /**
 389  * @}
 390  * @}
 391  */