Contributed by Kalevi Suominen <kalevi.suominen@helsinki.fi>.
[libsigsegv/ericb.git] / src / fault-macosdarwin5-powerpc.c
bloba2f59d8fa3beea40333beff189e2965c5b3e3162
1 /* Fault handler information subroutine. MacOSX/Darwin5/PowerPC version.
2 * Taken from gcc-3.2/boehm-gc/os_dep.c.
4 * Copyright 1988, 1989 Hans-J. Boehm, Alan J. Demers
5 * Copyright (c) 1991-1995 by Xerox Corporation. All rights reserved.
6 * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
7 * Copyright (c) 1999 by Hewlett-Packard Company. All rights reserved.
9 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
10 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
12 * Permission is hereby granted to use or copy this program
13 * for any purpose, provided the above notices are retained on all copies.
14 * Permission to modify the code and to distribute modified code is granted,
15 * provided the above notices are retained, and a notice that the code was
16 * modified is included with the above copyright notice.
19 /* Decodes the machine instruction which was responsible for the sending of the
20 SIGBUS signal. Sadly this is the only way to find the faulting address
21 because the signal handler doesn't get it directly from the kernel (although
22 it is available on the Mach level, but dropped by the BSD personality before
23 it calls our signal handler...)
24 This code should be able to deal correctly with all PPCs starting from the
25 601 up to and including the G4s (including Velocity Engine). */
26 #define EXTRACT_OP1(iw) (((iw) & 0xFC000000) >> 26)
27 #define EXTRACT_OP2(iw) (((iw) & 0x000007FE) >> 1)
28 #define EXTRACT_REGA(iw) (((iw) & 0x001F0000) >> 16)
29 #define EXTRACT_REGB(iw) (((iw) & 0x03E00000) >> 21)
30 #define EXTRACT_REGC(iw) (((iw) & 0x0000F800) >> 11)
31 #define EXTRACT_DISP(iw) ((short *) &(iw))[1]
33 static void *
34 get_fault_addr (struct sigcontext *scp)
36 unsigned int instr = *((unsigned int *) scp->sc_ir);
37 unsigned int *regs = &((unsigned int *) scp->sc_regs)[2];
38 int disp = 0;
39 int tmp;
40 unsigned int baseA = 0;
41 unsigned int baseB = 0;
42 unsigned int addr;
43 unsigned int alignmask = 0xFFFFFFFF;
45 switch (EXTRACT_OP1 (instr))
47 case 38: /* stb */
48 case 39: /* stbu */
49 case 54: /* stfd */
50 case 55: /* stfdu */
51 case 52: /* stfs */
52 case 53: /* stfsu */
53 case 44: /* sth */
54 case 45: /* sthu */
55 case 47: /* stmw */
56 case 36: /* stw */
57 case 37: /* stwu */
58 tmp = EXTRACT_REGA (instr);
59 if (tmp > 0)
60 baseA = regs[tmp];
61 disp = EXTRACT_DISP (instr);
62 break;
63 case 31:
64 switch (EXTRACT_OP2 (instr))
66 case 86: /* dcbf */
67 case 54: /* dcbst */
68 case 1014: /* dcbz */
69 case 247: /* stbux */
70 case 215: /* stbx */
71 case 759: /* stfdux */
72 case 727: /* stfdx */
73 case 983: /* stfiwx */
74 case 695: /* stfsux */
75 case 663: /* stfsx */
76 case 918: /* sthbrx */
77 case 439: /* sthux */
78 case 407: /* sthx */
79 case 661: /* stswx */
80 case 662: /* stwbrx */
81 case 150: /* stwcx. */
82 case 183: /* stwux */
83 case 151: /* stwx */
84 case 135: /* stvebx */
85 case 167: /* stvehx */
86 case 199: /* stvewx */
87 case 231: /* stvx */
88 case 487: /* stvxl */
89 tmp = EXTRACT_REGA (instr);
90 if (tmp > 0)
91 baseA = regs[tmp];
92 baseB = regs[EXTRACT_REGC (instr)];
93 /* Determine Altivec alignment mask. */
94 switch (EXTRACT_OP2 (instr))
96 case 167: /* stvehx */
97 alignmask = 0xFFFFFFFE;
98 break;
99 case 199: /* stvewx */
100 alignmask = 0xFFFFFFFC;
101 break;
102 case 231: /* stvx */
103 case 487: /* stvxl */
104 alignmask = 0xFFFFFFF0;
105 break;
107 break;
108 case 725: /* stswi */
109 tmp = EXTRACT_REGA (instr);
110 if (tmp > 0)
111 baseA = regs[tmp];
112 break;
113 default: /* ignore instruction */
114 return (void *) 0;
116 break;
117 default: /* ignore instruction */
118 return (void *) 0;
121 addr = (baseA + baseB) + disp;
122 addr &= alignmask;
123 return (void *) addr;