vpx_ports/x86.h

   1 /*
   2  *  Copyright (c) 2010 The VP8 project authors. All Rights Reserved.
   3  *
   4  *  Use of this source code is governed by a BSD-style license and patent
   5  *  grant that can be found in the LICENSE file in the root of the source
   6  *  tree. All contributing project authors may be found in the AUTHORS
   7  *  file in the root of the source tree.
   8  */
   9
  10
  11 #ifndef VPX_PORTS_X86_H
  12 #define VPX_PORTS_X86_H
  13 #include <stdlib.h>
  14 #include "config.h"
  15
  16 #if defined(__GNUC__) && __GNUC__
  17 #if ARCH_X86_64
  18 #define cpuid(func,ax,bx,cx,dx)\
  19     __asm__ __volatile__ (\
  20                           "cpuid           \n\t" \
  21                           : "=a" (ax), "=b" (bx), "=c" (cx), "=d" (dx) \
  22                           : "a"  (func));
  23 #else
  24 #define cpuid(func,ax,bx,cx,dx)\
  25     __asm__ __volatile__ (\
  26                           "pushl %%ebx     \n\t" \
  27                           "cpuid           \n\t" \
  28                           "movl  %%ebx, %1 \n\t" \
  29                           "popl  %%ebx     \n\t" \
  30                           : "=a" (ax), "=r" (bx), "=c" (cx), "=d" (dx) \
  31                           : "a"  (func));
  32 #endif
  33 #else
  34 #if ARCH_X86_64
  35 void __cpuid(int CPUInfo[4], int info_type);
  36 #pragma intrinsic(__cpuid)
  37 #define cpuid(func,a,b,c,d) do{\
  38         int regs[4];\
  39         __cpuid(regs,func); a=regs[0];  b=regs[1];  c=regs[2];  d=regs[3];\
  40     } while(0)
  41 #else
  42 #define cpuid(func,a,b,c,d)\
  43     __asm mov eax, func\
  44     __asm cpuid\
  45     __asm mov a, eax\
  46     __asm mov b, ebx\
  47     __asm mov c, ecx\
  48     __asm mov d, edx
  49 #endif
  50 #endif
  51
  52 #define HAS_MMX   0x01
  53 #define HAS_SSE   0x02
  54 #define HAS_SSE2  0x04
  55 #define HAS_SSE3  0x08
  56 #define HAS_SSSE3 0x10
  57 #ifndef BIT
  58 #define BIT(n) (1<<n)
  59 #endif
  60
  61 static int
  62 x86_simd_caps(void)
  63 {
  64     unsigned int flags = 0;
  65     unsigned int mask = ~0;
  66     unsigned int reg_eax, reg_ebx, reg_ecx, reg_edx;
  67     char *env;
  68     (void)reg_ebx;
  69
  70     /* See if the CPU capabilities are being overridden by the environment */
  71     env = getenv("VPX_SIMD_CAPS");
  72
  73     if (env && *env)
  74         return (int)strtol(env, NULL, 0);
  75
  76     env = getenv("VPX_SIMD_CAPS_MASK");
  77
  78     if (env && *env)
  79         mask = strtol(env, NULL, 0);
  80
  81     /* Ensure that the CPUID instruction supports extended features */
  82     cpuid(0, reg_eax, reg_ebx, reg_ecx, reg_edx);
  83
  84     if (reg_eax < 1)
  85         return 0;
  86
  87     /* Get the standard feature flags */
  88     cpuid(1, reg_eax, reg_ebx, reg_ecx, reg_edx);
  89
  90     if (reg_edx & BIT(23)) flags |= HAS_MMX;
  91
  92     if (reg_edx & BIT(25)) flags |= HAS_SSE; /* aka xmm */
  93
  94     if (reg_edx & BIT(26)) flags |= HAS_SSE2; /* aka wmt */
  95
  96     if (reg_ecx & BIT(0))  flags |= HAS_SSE3;
  97
  98     if (reg_ecx & BIT(9))  flags |= HAS_SSSE3;
  99
 100     return flags & mask;
 101 }
 102
 103
 104 #if ARCH_X86_64 && defined(_MSC_VER)
 105 unsigned __int64 __rdtsc(void);
 106 #pragma intrinsic(__rdtsc)
 107 #endif
 108 static unsigned int
 109 x86_readtsc(void)
 110 {
 111 #if defined(__GNUC__) && __GNUC__
 112     unsigned int tsc;
 113     __asm__ __volatile__("rdtsc\n\t":"=a"(tsc):);
 114     return tsc;
 115 #else
 116 #if ARCH_X86_64
 117     return __rdtsc();
 118 #else
 119     __asm  rdtsc;
 120 #endif
 121 #endif
 122 }
 123
 124
 125 #if defined(__GNUC__) && __GNUC__
 126 #define x86_pause_hint()\
 127     __asm__ __volatile__ ("pause \n\t")
 128 #else
 129 #if ARCH_X86_64
 130 /* No pause intrinsic for windows x64 */
 131 #define x86_pause_hint()
 132 #else
 133 #define x86_pause_hint()\
 134     __asm pause
 135 #endif
 136 #endif
 137
 138 #if defined(__GNUC__) && __GNUC__
 139 static void
 140 x87_set_control_word(unsigned short mode)
 141 {
 142     __asm__ __volatile__("fldcw %0" : : "m"(*&mode));
 143 }
 144 static unsigned short
 145 x87_get_control_word(void)
 146 {
 147     unsigned short mode;
 148     __asm__ __volatile__("fstcw %0\n\t":"=m"(*&mode):);
 149     return mode;
 150 }
 151 #elif ARCH_X86_64
 152 /* No fldcw intrinsics on Windows x64, punt to external asm */
 153 extern void           vpx_winx64_fldcw(unsigned short mode);
 154 extern unsigned short vpx_winx64_fstcw(void);
 155 #define x87_set_control_word vpx_winx64_fldcw
 156 #define x87_get_control_word vpx_winx64_fstcw
 157 #else
 158 static void
 159 x87_set_control_word(unsigned short mode)
 160 {
 161     __asm { fldcw mode }
 162 }
 163 static unsigned short
 164 x87_get_control_word(void)
 165 {
 166     unsigned short mode;
 167     __asm { fstcw mode }
 168     return mode;
 169 }
 170 #endif
 171
 172 static unsigned short
 173 x87_set_double_precision(void)
 174 {
 175     unsigned short mode = x87_get_control_word();
 176     x87_set_control_word((mode&~0x300) | 0x200);
 177     return mode;
 178 }
 179
 180
 181 extern void vpx_reset_mmx_state(void);
 182 #endif
 183