2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
4 * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <manuel.lauss@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Au1xxx-PSC AC97 glue.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/slab.h>
18 #include <linux/device.h>
19 #include <linux/delay.h>
20 #include <linux/mutex.h>
21 #include <linux/suspend.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/initval.h>
25 #include <sound/soc.h>
26 #include <asm/mach-au1x00/au1000.h>
27 #include <asm/mach-au1x00/au1xxx_psc.h>
31 /* how often to retry failed codec register reads/writes */
32 #define AC97_RW_RETRIES 5
35 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
38 SNDRV_PCM_RATE_8000_48000
41 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
43 #define AC97PCR_START(stype) \
44 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
45 #define AC97PCR_STOP(stype) \
46 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
47 #define AC97PCR_CLRFIFO(stype) \
48 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
50 #define AC97STAT_BUSY(stype) \
51 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
53 /* instance data. There can be only one, MacLeod!!!! */
54 static struct au1xpsc_audio_data
*au1xpsc_ac97_workdata
;
58 /* this could theoretically work, but ac97->bus->card->private_data can be NULL
59 * when snd_ac97_mixer() is called; I don't know if the rest further down the
60 * chain are always valid either.
62 static inline struct au1xpsc_audio_data
*ac97_to_pscdata(struct snd_ac97
*x
)
64 struct snd_soc_card
*c
= x
->bus
->card
->private_data
;
65 return snd_soc_dai_get_drvdata(c
->rtd
->cpu_dai
);
70 #define ac97_to_pscdata(x) au1xpsc_ac97_workdata
74 /* AC97 controller reads codec register */
75 static unsigned short au1xpsc_ac97_read(struct snd_ac97
*ac97
,
78 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
79 unsigned short retry
, tmo
;
82 au_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
85 retry
= AC97_RW_RETRIES
;
87 mutex_lock(&pscdata
->lock
);
89 au_writel(PSC_AC97CDC_RD
| PSC_AC97CDC_INDX(reg
),
96 if (au_readl(AC97_EVNT(pscdata
)) & PSC_AC97EVNT_CD
)
100 data
= au_readl(AC97_CDC(pscdata
));
102 au_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
105 mutex_unlock(&pscdata
->lock
);
107 if (reg
!= ((data
>> 16) & 0x7f))
108 tmo
= 1; /* wrong register, try again */
110 } while (--retry
&& !tmo
);
112 return retry
? data
& 0xffff : 0xffff;
115 /* AC97 controller writes to codec register */
116 static void au1xpsc_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
,
119 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
120 unsigned int tmo
, retry
;
122 au_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
125 retry
= AC97_RW_RETRIES
;
127 mutex_lock(&pscdata
->lock
);
129 au_writel(PSC_AC97CDC_INDX(reg
) | (val
& 0xffff),
136 if (au_readl(AC97_EVNT(pscdata
)) & PSC_AC97EVNT_CD
)
140 au_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
143 mutex_unlock(&pscdata
->lock
);
144 } while (--retry
&& !tmo
);
147 /* AC97 controller asserts a warm reset */
148 static void au1xpsc_ac97_warm_reset(struct snd_ac97
*ac97
)
150 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
152 au_writel(PSC_AC97RST_SNC
, AC97_RST(pscdata
));
155 au_writel(0, AC97_RST(pscdata
));
159 static void au1xpsc_ac97_cold_reset(struct snd_ac97
*ac97
)
161 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
164 /* disable PSC during cold reset */
165 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata
));
167 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(pscdata
));
170 /* issue cold reset */
171 au_writel(PSC_AC97RST_RST
, AC97_RST(pscdata
));
174 au_writel(0, AC97_RST(pscdata
));
178 au_writel(PSC_CTRL_ENABLE
, PSC_CTRL(pscdata
));
181 /* wait for PSC to indicate it's ready */
183 while (!((au_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_SR
)) && (--i
))
187 printk(KERN_ERR
"au1xpsc-ac97: PSC not ready!\n");
191 /* enable the ac97 function */
192 au_writel(pscdata
->cfg
| PSC_AC97CFG_DE_ENABLE
, AC97_CFG(pscdata
));
195 /* wait for AC97 core to become ready */
197 while (!((au_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_DR
)) && (--i
))
200 printk(KERN_ERR
"au1xpsc-ac97: AC97 ctrl not ready\n");
203 /* AC97 controller operations */
204 struct snd_ac97_bus_ops soc_ac97_ops
= {
205 .read
= au1xpsc_ac97_read
,
206 .write
= au1xpsc_ac97_write
,
207 .reset
= au1xpsc_ac97_cold_reset
,
208 .warm_reset
= au1xpsc_ac97_warm_reset
,
210 EXPORT_SYMBOL_GPL(soc_ac97_ops
);
212 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream
*substream
,
213 struct snd_pcm_hw_params
*params
,
214 struct snd_soc_dai
*dai
)
216 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
217 unsigned long r
, ro
, stat
;
218 int chans
, t
, stype
= substream
->stream
;
220 chans
= params_channels(params
);
222 r
= ro
= au_readl(AC97_CFG(pscdata
));
223 stat
= au_readl(AC97_STAT(pscdata
));
225 /* already active? */
226 if (stat
& (PSC_AC97STAT_TB
| PSC_AC97STAT_RB
)) {
227 /* reject parameters not currently set up */
228 if ((PSC_AC97CFG_GET_LEN(r
) != params
->msbits
) ||
229 (pscdata
->rate
!= params_rate(params
)))
233 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
234 r
&= ~PSC_AC97CFG_LEN_MASK
;
235 r
|= PSC_AC97CFG_SET_LEN(params
->msbits
);
237 /* channels: enable slots for front L/R channel */
238 if (stype
== SNDRV_PCM_STREAM_PLAYBACK
) {
239 r
&= ~PSC_AC97CFG_TXSLOT_MASK
;
240 r
|= PSC_AC97CFG_TXSLOT_ENA(3);
241 r
|= PSC_AC97CFG_TXSLOT_ENA(4);
243 r
&= ~PSC_AC97CFG_RXSLOT_MASK
;
244 r
|= PSC_AC97CFG_RXSLOT_ENA(3);
245 r
|= PSC_AC97CFG_RXSLOT_ENA(4);
248 /* do we need to poke the hardware? */
252 /* ac97 engine is about to be disabled */
253 mutex_lock(&pscdata
->lock
);
255 /* disable AC97 device controller first... */
256 au_writel(r
& ~PSC_AC97CFG_DE_ENABLE
, AC97_CFG(pscdata
));
259 /* ...wait for it... */
261 while ((au_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_DR
) && --t
)
265 printk(KERN_ERR
"PSC-AC97: can't disable!\n");
267 /* ...write config... */
268 au_writel(r
, AC97_CFG(pscdata
));
271 /* ...enable the AC97 controller again... */
272 au_writel(r
| PSC_AC97CFG_DE_ENABLE
, AC97_CFG(pscdata
));
275 /* ...and wait for ready bit */
277 while ((!(au_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_DR
)) && --t
)
281 printk(KERN_ERR
"PSC-AC97: can't enable!\n");
283 mutex_unlock(&pscdata
->lock
);
286 pscdata
->rate
= params_rate(params
);
293 static int au1xpsc_ac97_trigger(struct snd_pcm_substream
*substream
,
294 int cmd
, struct snd_soc_dai
*dai
)
296 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
297 int ret
, stype
= substream
->stream
;
302 case SNDRV_PCM_TRIGGER_START
:
303 case SNDRV_PCM_TRIGGER_RESUME
:
304 au_writel(AC97PCR_CLRFIFO(stype
), AC97_PCR(pscdata
));
306 au_writel(AC97PCR_START(stype
), AC97_PCR(pscdata
));
309 case SNDRV_PCM_TRIGGER_STOP
:
310 case SNDRV_PCM_TRIGGER_SUSPEND
:
311 au_writel(AC97PCR_STOP(stype
), AC97_PCR(pscdata
));
314 while (au_readl(AC97_STAT(pscdata
)) & AC97STAT_BUSY(stype
))
315 asm volatile ("nop");
317 au_writel(AC97PCR_CLRFIFO(stype
), AC97_PCR(pscdata
));
327 static int au1xpsc_ac97_startup(struct snd_pcm_substream
*substream
,
328 struct snd_soc_dai
*dai
)
330 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
331 snd_soc_dai_set_dma_data(dai
, substream
, &pscdata
->dmaids
[0]);
335 static int au1xpsc_ac97_probe(struct snd_soc_dai
*dai
)
337 return au1xpsc_ac97_workdata
? 0 : -ENODEV
;
340 static const struct snd_soc_dai_ops au1xpsc_ac97_dai_ops
= {
341 .startup
= au1xpsc_ac97_startup
,
342 .trigger
= au1xpsc_ac97_trigger
,
343 .hw_params
= au1xpsc_ac97_hw_params
,
346 static const struct snd_soc_dai_driver au1xpsc_ac97_dai_template
= {
348 .probe
= au1xpsc_ac97_probe
,
351 .formats
= AC97_FMTS
,
357 .formats
= AC97_FMTS
,
361 .ops
= &au1xpsc_ac97_dai_ops
,
364 static int __devinit
au1xpsc_ac97_drvprobe(struct platform_device
*pdev
)
367 struct resource
*iores
, *dmares
;
369 struct au1xpsc_audio_data
*wd
;
371 wd
= devm_kzalloc(&pdev
->dev
, sizeof(struct au1xpsc_audio_data
),
376 mutex_init(&wd
->lock
);
378 iores
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
382 if (!devm_request_mem_region(&pdev
->dev
, iores
->start
,
383 resource_size(iores
),
387 wd
->mmio
= devm_ioremap(&pdev
->dev
, iores
->start
,
388 resource_size(iores
));
392 dmares
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
395 wd
->dmaids
[SNDRV_PCM_STREAM_PLAYBACK
] = dmares
->start
;
397 dmares
= platform_get_resource(pdev
, IORESOURCE_DMA
, 1);
400 wd
->dmaids
[SNDRV_PCM_STREAM_CAPTURE
] = dmares
->start
;
402 /* configuration: max dma trigger threshold, enable ac97 */
403 wd
->cfg
= PSC_AC97CFG_RT_FIFO8
| PSC_AC97CFG_TT_FIFO8
|
404 PSC_AC97CFG_DE_ENABLE
;
406 /* preserve PSC clock source set up by platform */
407 sel
= au_readl(PSC_SEL(wd
)) & PSC_SEL_CLK_MASK
;
408 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
410 au_writel(0, PSC_SEL(wd
));
412 au_writel(PSC_SEL_PS_AC97MODE
| sel
, PSC_SEL(wd
));
415 /* name the DAI like this device instance ("au1xpsc-ac97.PSCINDEX") */
416 memcpy(&wd
->dai_drv
, &au1xpsc_ac97_dai_template
,
417 sizeof(struct snd_soc_dai_driver
));
418 wd
->dai_drv
.name
= dev_name(&pdev
->dev
);
420 platform_set_drvdata(pdev
, wd
);
422 ret
= snd_soc_register_dai(&pdev
->dev
, &wd
->dai_drv
);
426 au1xpsc_ac97_workdata
= wd
;
430 static int __devexit
au1xpsc_ac97_drvremove(struct platform_device
*pdev
)
432 struct au1xpsc_audio_data
*wd
= platform_get_drvdata(pdev
);
434 snd_soc_unregister_dai(&pdev
->dev
);
436 /* disable PSC completely */
437 au_writel(0, AC97_CFG(wd
));
439 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
442 au1xpsc_ac97_workdata
= NULL
; /* MDEV */
448 static int au1xpsc_ac97_drvsuspend(struct device
*dev
)
450 struct au1xpsc_audio_data
*wd
= dev_get_drvdata(dev
);
452 /* save interesting registers and disable PSC */
453 wd
->pm
[0] = au_readl(PSC_SEL(wd
));
455 au_writel(0, AC97_CFG(wd
));
457 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
463 static int au1xpsc_ac97_drvresume(struct device
*dev
)
465 struct au1xpsc_audio_data
*wd
= dev_get_drvdata(dev
);
467 /* restore PSC clock config */
468 au_writel(wd
->pm
[0] | PSC_SEL_PS_AC97MODE
, PSC_SEL(wd
));
471 /* after this point the ac97 core will cold-reset the codec.
472 * During cold-reset the PSC is reinitialized and the last
473 * configuration set up in hw_params() is restored.
478 static struct dev_pm_ops au1xpscac97_pmops
= {
479 .suspend
= au1xpsc_ac97_drvsuspend
,
480 .resume
= au1xpsc_ac97_drvresume
,
483 #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
487 #define AU1XPSCAC97_PMOPS NULL
491 static struct platform_driver au1xpsc_ac97_driver
= {
493 .name
= "au1xpsc_ac97",
494 .owner
= THIS_MODULE
,
495 .pm
= AU1XPSCAC97_PMOPS
,
497 .probe
= au1xpsc_ac97_drvprobe
,
498 .remove
= __devexit_p(au1xpsc_ac97_drvremove
),
501 static int __init
au1xpsc_ac97_load(void)
503 au1xpsc_ac97_workdata
= NULL
;
504 return platform_driver_register(&au1xpsc_ac97_driver
);
507 static void __exit
au1xpsc_ac97_unload(void)
509 platform_driver_unregister(&au1xpsc_ac97_driver
);
512 module_init(au1xpsc_ac97_load
);
513 module_exit(au1xpsc_ac97_unload
);
515 MODULE_LICENSE("GPL");
516 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
517 MODULE_AUTHOR("Manuel Lauss");