2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
4 * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <manuel.lauss@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Au1xxx-PSC I2S glue.
13 * NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/suspend.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/initval.h>
23 #include <sound/soc.h>
24 #include <asm/mach-au1x00/au1000.h>
25 #include <asm/mach-au1x00/au1xxx_psc.h>
29 /* supported I2S DAI hardware formats */
30 #define AU1XPSC_I2S_DAIFMT \
31 (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
34 /* supported I2S direction */
35 #define AU1XPSC_I2S_DIR \
36 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
38 #define AU1XPSC_I2S_RATES \
39 SNDRV_PCM_RATE_8000_192000
41 #define AU1XPSC_I2S_FMTS \
42 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
44 #define I2SSTAT_BUSY(stype) \
45 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
46 #define I2SPCR_START(stype) \
47 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
48 #define I2SPCR_STOP(stype) \
49 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
50 #define I2SPCR_CLRFIFO(stype) \
51 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
54 static int au1xpsc_i2s_set_fmt(struct snd_soc_dai
*cpu_dai
,
57 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(cpu_dai
);
65 ct
&= ~(PSC_I2SCFG_XM
| PSC_I2SCFG_MLJ
); /* left-justified */
66 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
67 case SND_SOC_DAIFMT_I2S
:
68 ct
|= PSC_I2SCFG_XM
; /* enable I2S mode */
70 case SND_SOC_DAIFMT_MSB
:
72 case SND_SOC_DAIFMT_LSB
:
73 ct
|= PSC_I2SCFG_MLJ
; /* LSB (right-) justified */
79 ct
&= ~(PSC_I2SCFG_BI
| PSC_I2SCFG_WI
); /* IB-IF */
80 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
81 case SND_SOC_DAIFMT_NB_NF
:
82 ct
|= PSC_I2SCFG_BI
| PSC_I2SCFG_WI
;
84 case SND_SOC_DAIFMT_NB_IF
:
87 case SND_SOC_DAIFMT_IB_NF
:
90 case SND_SOC_DAIFMT_IB_IF
:
96 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
97 case SND_SOC_DAIFMT_CBM_CFM
: /* CODEC master */
98 ct
|= PSC_I2SCFG_MS
; /* PSC I2S slave mode */
100 case SND_SOC_DAIFMT_CBS_CFS
: /* CODEC slave */
101 ct
&= ~PSC_I2SCFG_MS
; /* PSC I2S Master mode */
113 static int au1xpsc_i2s_hw_params(struct snd_pcm_substream
*substream
,
114 struct snd_pcm_hw_params
*params
,
115 struct snd_soc_dai
*dai
)
117 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
122 /* check if the PSC is already streaming data */
123 stat
= au_readl(I2S_STAT(pscdata
));
124 if (stat
& (PSC_I2SSTAT_TB
| PSC_I2SSTAT_RB
)) {
125 /* reject parameters not currently set up in hardware */
126 cfgbits
= au_readl(I2S_CFG(pscdata
));
127 if ((PSC_I2SCFG_GET_LEN(cfgbits
) != params
->msbits
) ||
128 (params_rate(params
) != pscdata
->rate
))
131 /* set sample bitdepth */
132 pscdata
->cfg
&= ~(0x1f << 4);
133 pscdata
->cfg
|= PSC_I2SCFG_SET_LEN(params
->msbits
);
134 /* remember current rate for other stream */
135 pscdata
->rate
= params_rate(params
);
140 /* Configure PSC late: on my devel systems the codec is I2S master and
141 * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
142 * uses aggressive PM and switches the codec off when it is not in use
143 * which also means the PSC unit doesn't get any clocks and is therefore
144 * dead. That's why this chunk here gets called from the trigger callback
145 * because I can be reasonably certain the codec is driving the clocks.
147 static int au1xpsc_i2s_configure(struct au1xpsc_audio_data
*pscdata
)
151 /* bring PSC out of sleep, and configure I2S unit */
152 au_writel(PSC_CTRL_ENABLE
, PSC_CTRL(pscdata
));
156 while (!(au_readl(I2S_STAT(pscdata
)) & PSC_I2SSTAT_SR
) && tmo
)
162 au_writel(0, I2S_CFG(pscdata
));
164 au_writel(pscdata
->cfg
| PSC_I2SCFG_DE_ENABLE
, I2S_CFG(pscdata
));
167 /* wait for I2S controller to become ready */
169 while (!(au_readl(I2S_STAT(pscdata
)) & PSC_I2SSTAT_DR
) && tmo
)
176 au_writel(0, I2S_CFG(pscdata
));
177 au_writel(PSC_CTRL_SUSPEND
, PSC_CTRL(pscdata
));
182 static int au1xpsc_i2s_start(struct au1xpsc_audio_data
*pscdata
, int stype
)
184 unsigned long tmo
, stat
;
189 /* if both TX and RX are idle, configure the PSC */
190 stat
= au_readl(I2S_STAT(pscdata
));
191 if (!(stat
& (PSC_I2SSTAT_TB
| PSC_I2SSTAT_RB
))) {
192 ret
= au1xpsc_i2s_configure(pscdata
);
197 au_writel(I2SPCR_CLRFIFO(stype
), I2S_PCR(pscdata
));
199 au_writel(I2SPCR_START(stype
), I2S_PCR(pscdata
));
202 /* wait for start confirmation */
204 while (!(au_readl(I2S_STAT(pscdata
)) & I2SSTAT_BUSY(stype
)) && tmo
)
208 au_writel(I2SPCR_STOP(stype
), I2S_PCR(pscdata
));
216 static int au1xpsc_i2s_stop(struct au1xpsc_audio_data
*pscdata
, int stype
)
218 unsigned long tmo
, stat
;
220 au_writel(I2SPCR_STOP(stype
), I2S_PCR(pscdata
));
223 /* wait for stop confirmation */
225 while ((au_readl(I2S_STAT(pscdata
)) & I2SSTAT_BUSY(stype
)) && tmo
)
228 /* if both TX and RX are idle, disable PSC */
229 stat
= au_readl(I2S_STAT(pscdata
));
230 if (!(stat
& (PSC_I2SSTAT_TB
| PSC_I2SSTAT_RB
))) {
231 au_writel(0, I2S_CFG(pscdata
));
233 au_writel(PSC_CTRL_SUSPEND
, PSC_CTRL(pscdata
));
239 static int au1xpsc_i2s_trigger(struct snd_pcm_substream
*substream
, int cmd
,
240 struct snd_soc_dai
*dai
)
242 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
243 int ret
, stype
= substream
->stream
;
246 case SNDRV_PCM_TRIGGER_START
:
247 case SNDRV_PCM_TRIGGER_RESUME
:
248 ret
= au1xpsc_i2s_start(pscdata
, stype
);
250 case SNDRV_PCM_TRIGGER_STOP
:
251 case SNDRV_PCM_TRIGGER_SUSPEND
:
252 ret
= au1xpsc_i2s_stop(pscdata
, stype
);
260 static int au1xpsc_i2s_startup(struct snd_pcm_substream
*substream
,
261 struct snd_soc_dai
*dai
)
263 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
264 snd_soc_dai_set_dma_data(dai
, substream
, &pscdata
->dmaids
[0]);
268 static const struct snd_soc_dai_ops au1xpsc_i2s_dai_ops
= {
269 .startup
= au1xpsc_i2s_startup
,
270 .trigger
= au1xpsc_i2s_trigger
,
271 .hw_params
= au1xpsc_i2s_hw_params
,
272 .set_fmt
= au1xpsc_i2s_set_fmt
,
275 static const struct snd_soc_dai_driver au1xpsc_i2s_dai_template
= {
277 .rates
= AU1XPSC_I2S_RATES
,
278 .formats
= AU1XPSC_I2S_FMTS
,
280 .channels_max
= 8, /* 2 without external help */
283 .rates
= AU1XPSC_I2S_RATES
,
284 .formats
= AU1XPSC_I2S_FMTS
,
286 .channels_max
= 8, /* 2 without external help */
288 .ops
= &au1xpsc_i2s_dai_ops
,
291 static int __devinit
au1xpsc_i2s_drvprobe(struct platform_device
*pdev
)
293 struct resource
*iores
, *dmares
;
296 struct au1xpsc_audio_data
*wd
;
298 wd
= devm_kzalloc(&pdev
->dev
, sizeof(struct au1xpsc_audio_data
),
303 iores
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
308 if (!devm_request_mem_region(&pdev
->dev
, iores
->start
,
309 resource_size(iores
),
313 wd
->mmio
= devm_ioremap(&pdev
->dev
, iores
->start
,
314 resource_size(iores
));
318 dmares
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
321 wd
->dmaids
[SNDRV_PCM_STREAM_PLAYBACK
] = dmares
->start
;
323 dmares
= platform_get_resource(pdev
, IORESOURCE_DMA
, 1);
326 wd
->dmaids
[SNDRV_PCM_STREAM_CAPTURE
] = dmares
->start
;
328 /* preserve PSC clock source set up by platform (dev.platform_data
329 * is already occupied by soc layer)
331 sel
= au_readl(PSC_SEL(wd
)) & PSC_SEL_CLK_MASK
;
332 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
334 au_writel(PSC_SEL_PS_I2SMODE
| sel
, PSC_SEL(wd
));
335 au_writel(0, I2S_CFG(wd
));
338 /* preconfigure: set max rx/tx fifo depths */
339 wd
->cfg
|= PSC_I2SCFG_RT_FIFO8
| PSC_I2SCFG_TT_FIFO8
;
341 /* don't wait for I2S core to become ready now; clocks may not
342 * be running yet; depending on clock input for PSC a wait might
346 /* name the DAI like this device instance ("au1xpsc-i2s.PSCINDEX") */
347 memcpy(&wd
->dai_drv
, &au1xpsc_i2s_dai_template
,
348 sizeof(struct snd_soc_dai_driver
));
349 wd
->dai_drv
.name
= dev_name(&pdev
->dev
);
351 platform_set_drvdata(pdev
, wd
);
353 return snd_soc_register_dai(&pdev
->dev
, &wd
->dai_drv
);
356 static int __devexit
au1xpsc_i2s_drvremove(struct platform_device
*pdev
)
358 struct au1xpsc_audio_data
*wd
= platform_get_drvdata(pdev
);
360 snd_soc_unregister_dai(&pdev
->dev
);
362 au_writel(0, I2S_CFG(wd
));
364 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
371 static int au1xpsc_i2s_drvsuspend(struct device
*dev
)
373 struct au1xpsc_audio_data
*wd
= dev_get_drvdata(dev
);
375 /* save interesting register and disable PSC */
376 wd
->pm
[0] = au_readl(PSC_SEL(wd
));
378 au_writel(0, I2S_CFG(wd
));
380 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
386 static int au1xpsc_i2s_drvresume(struct device
*dev
)
388 struct au1xpsc_audio_data
*wd
= dev_get_drvdata(dev
);
390 /* select I2S mode and PSC clock */
391 au_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
393 au_writel(0, PSC_SEL(wd
));
395 au_writel(wd
->pm
[0], PSC_SEL(wd
));
401 static struct dev_pm_ops au1xpsci2s_pmops
= {
402 .suspend
= au1xpsc_i2s_drvsuspend
,
403 .resume
= au1xpsc_i2s_drvresume
,
406 #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
410 #define AU1XPSCI2S_PMOPS NULL
414 static struct platform_driver au1xpsc_i2s_driver
= {
416 .name
= "au1xpsc_i2s",
417 .owner
= THIS_MODULE
,
418 .pm
= AU1XPSCI2S_PMOPS
,
420 .probe
= au1xpsc_i2s_drvprobe
,
421 .remove
= __devexit_p(au1xpsc_i2s_drvremove
),
424 module_platform_driver(au1xpsc_i2s_driver
);
426 MODULE_LICENSE("GPL");
427 MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
428 MODULE_AUTHOR("Manuel Lauss");