drivers/mmc/host/moxasd.h

   1
   2 #ifndef _MOXASD_H
   3 #define _MOXAAD_H
   4
   5 // register
   6 #define MSD_CMD_REG             0
   7 #define MSD_ARG_REG             4
   8 #define MSD_RESP0_REG           8
   9 #define MSD_RESP1_REG           0x0c
  10 #define MSD_RESP2_REG           0x10
  11 #define MSD_RESP3_REG           0x14
  12 #define MSD_RESP_CMD_REG        0x18
  13 #define MSD_DATA_CTRL_REG       0x1c
  14 #define MSD_DATA_TIMER_REG      0x20
  15 #define MSD_DATA_LEN_REG        0x24
  16 #define MSD_STATUS_REG          0x28
  17 #define MSD_CLEAR_REG           0x2c
  18 #define MSD_INT_MASK_REG        0x30
  19 #define MSD_POWER_CTRL_REG      0x34
  20 #define MSD_CLOCK_CTRL_REG      0x38
  21 #define MSD_BUS_WIDTH_REG       0x3c
  22 #define MSD_DATA_WIN_REG        0x40
  23 #define MSD_FEATURE_REG         0x44
  24 #define MSD_REVISION_REG        0x48
  25
  26 typedef struct _moxasd_reg {
  27         unsigned int    command;
  28 #define MSD_SDC_RST                     (1<<10)
  29 #define MSD_CMD_EN                      (1<<9)
  30 #define MSD_APP_CMD                     (1<<8)
  31 #define MSD_LONG_RSP                    (1<<7)
  32 #define MSD_NEED_RSP                    (1<<6)
  33 #define MSD_CMD_IDX_MASK                0x3f
  34         unsigned int    argument;
  35         unsigned int    response0;
  36         unsigned int    response1;
  37         unsigned int    response2;
  38         unsigned int    response3;
  39         unsigned int    response_command;
  40 #define MSD_RSP_CMD_APP                 (1<<6)
  41 #define MSD_RSP_CMD_IDX_MASK            0x3f
  42         unsigned int    data_control;
  43 #define MSD_DATA_EN                     (1<<6)
  44 #define MSD_DMA_EN                      (1<<5)
  45 #define MSD_DATA_WRITE                  (1<<4)
  46 #define MSD_BLK_SIZE_MASK               0x0f
  47         unsigned int    data_timer;
  48         unsigned int    data_length;
  49 #define MSD_DATA_LEN_MASK               0xffffff
  50         unsigned int    status;
  51 #define MSD_WRITE_PROT                  (1<<12)
  52 #define MSD_CARD_DETECT                 (1<<11)
  53 #define MSD_CARD_CHANGE                 (1<<10)
  54 #define MSD_FIFO_ORUN                   (1<<9)
  55 #define MSD_FIFO_URUN                   (1<<8)
  56 #define MSD_DATA_END                    (1<<7)
  57 #define MSD_CMD_SENT                    (1<<6)
  58 #define MSD_DATA_CRC_OK                 (1<<5)
  59 #define MSD_RSP_CRC_OK                  (1<<4)
  60 #define MSD_DATA_TIMEOUT                (1<<3)
  61 #define MSD_RSP_TIMEOUT                 (1<<2)
  62 #define MSD_DATA_CRC_FAIL               (1<<1)
  63 #define MSD_RSP_CRC_FAIL                (1<<0)
  64         unsigned int    clear;
  65 #define MSD_CLR_CARD_CHANGE             (1<<10)
  66 #define MSD_CLR_FIFO_ORUN               (1<<9)
  67 #define MSD_CLR_FIFO_URUN               (1<<8)
  68 #define MSD_CLR_DATA_END                (1<<7)
  69 #define MSD_CLR_CMD_SENT                (1<<6)
  70 #define MSD_CLR_DATA_CRC_OK             (1<<5)
  71 #define MSD_CLR_RSP_CRC_OK              (1<<4)
  72 #define MSD_CLR_DATA_TIMEOUT            (1<<3)
  73 #define MSD_CLR_RSP_TIMEOUT             (1<<2)
  74 #define MSD_CLR_DATA_CRC_FAIL           (1<<1)
  75 #define MSD_CLR_RSP_CRC_FAIL            (1<<0)
  76         unsigned int    interrupt_mask;
  77 #define MSD_INT_CARD_CHANGE             (1<<10)
  78 #define MSD_INT_FIFO_ORUN               (1<<9)
  79 #define MSD_INT_FIFO_URUN               (1<<8)
  80 #define MSD_INT_DATA_END                (1<<7)
  81 #define MSD_INT_CMD_SENT                (1<<6)
  82 #define MSD_INT_DATA_CRC_OK             (1<<5)
  83 #define MSD_INT_RSP_CRC_OK              (1<<4)
  84 #define MSD_INT_DATA_TIMEOUT            (1<<3)
  85 #define MSD_INT_RSP_TIMEOUT             (1<<2)
  86 #define MSD_INT_DATA_CRC_FAIL           (1<<1)
  87 #define MSD_INT_RSP_CRC_FAIL            (1<<0)
  88         unsigned int    power_control;
  89 #define MSD_SD_POWER_ON                 (1<<4)
  90 #define MSD_SD_POWER_MASK               0x0f
  91         unsigned int    clock_control;
  92 #define MSD_CLK_DIS                     (1<<8)
  93 #define MSD_CLK_SD                      (1<<7)
  94 #define MSD_CLK_DIV_MASK                0x7f
  95         unsigned int    bus_width;
  96 #define MSD_WIDE_BUS_SUPPORT            (1<<3)
  97 #define MSD_WIDE_BUS                    (1<<2)  // bus width=4
  98 #define MSD_SINGLE_BUS                  (1<<0)  // bus width=1
  99         unsigned int    data_window;
 100         unsigned int    feature;
 101 #define MSD_CPRM_FUNCTION               (1<<8)
 102         unsigned int    revision;
 103 } moxasd_reg;
 104
 105 #define MSD_FIFO_LENW   4       // 4 words, total 4 * 4 = 16 bytes
 106 #define MSD_FIFO_LENB   16      // 16 bytes
 107
 108 #endif  // _MOXASD_H