2 * Copyright (C) 2007 by Analog Devices, Inc.
4 * The Inventra Controller Driver for Linux is free software; you
5 * can redistribute it and/or modify it under the terms of the GNU
6 * General Public License version 2 as published by the Free Software
10 #ifndef __MUSB_BLACKFIN_H__
11 #define __MUSB_BLACKFIN_H__
14 * Blackfin specific definitions
19 * 05000450 - USB DMA Mode 1 Short Packet Data Corruption:
20 * MUSB driver is designed to transfer buffer of N * maxpacket size
21 * in DMA mode 1 and leave the rest of the data to the next
22 * transfer in DMA mode 0, so we never transmit a short packet in
25 * 05000463 - This anomaly doesn't affect this driver since it
26 * never uses L1 or L2 memory as data destination.
28 * 05000464 - This anomaly doesn't affect this driver since it
29 * never uses L1 or L2 memory as data source.
31 * 05000465 - The anomaly can be seen when SCLK is over 100 MHz, and there is
32 * no way to workaround for bulk endpoints. Since the wMaxPackSize
33 * of bulk is less than or equal to 512, while the fifo size of
34 * endpoint 5, 6, 7 is 1024, the double buffer mode is enabled
35 * automatically when these endpoints are used for bulk OUT.
37 * 05000466 - This anomaly doesn't affect this driver since it never mixes
38 * concurrent DMA and core accesses to the TX endpoint FIFOs.
40 * 05000467 - The workaround for this anomaly will introduce another
44 /* The Mentor USB DMA engine on BF52x (silicon v0.0 and v0.1) seems to be
45 * unstable in host mode. This may be caused by Anomaly 05000380. After
46 * digging out the root cause, we will change this number accordingly.
47 * So, need to either use silicon v0.2+ or disable DMA mode in MUSB.
49 #if ANOMALY_05000380 && defined(CONFIG_BF52x) && \
50 defined(CONFIG_USB_MUSB_HDRC) && !defined(CONFIG_MUSB_PIO_ONLY)
51 # error "Please use PIO mode in MUSB driver on bf52x chip v0.0 and v0.1"
56 static void dump_fifo_data(u8
*buf
, u16 len
)
61 for (i
= 0; i
< len
; i
++) {
64 pr_debug("%02x ", *tmp
++);
69 #define dump_fifo_data(buf, len) do {} while (0)
73 #define USB_DMA_BASE USB_DMA_INTERRUPT
74 #define USB_DMAx_CTRL 0x04
75 #define USB_DMAx_ADDR_LOW 0x08
76 #define USB_DMAx_ADDR_HIGH 0x0C
77 #define USB_DMAx_COUNT_LOW 0x10
78 #define USB_DMAx_COUNT_HIGH 0x14
80 #define USB_DMA_REG(ep, reg) (USB_DMA_BASE + 0x20 * ep + reg)
83 #define TIMER_DELAY (1 * HZ)
85 static struct timer_list musb_conn_timer
;
87 #endif /* __MUSB_BLACKFIN_H__ */