arch/powerpc/include/asm/pte-hash32.h

   1 #ifndef _ASM_POWERPC_PTE_HASH32_H
   2 #define _ASM_POWERPC_PTE_HASH32_H
   3 #ifdef __KERNEL__
   4
   5 /*
   6  * The "classic" 32-bit implementation of the PowerPC MMU uses a hash
   7  * table containing PTEs, together with a set of 16 segment registers,
   8  * to define the virtual to physical address mapping.
   9  *
  10  * We use the hash table as an extended TLB, i.e. a cache of currently
  11  * active mappings.  We maintain a two-level page table tree, much
  12  * like that used by the i386, for the sake of the Linux memory
  13  * management code.  Low-level assembler code in hash_low_32.S
  14  * (procedure hash_page) is responsible for extracting ptes from the
  15  * tree and putting them into the hash table when necessary, and
  16  * updating the accessed and modified bits in the page table tree.
  17  */
  18
  19 #define _PAGE_PRESENT   0x001   /* software: pte contains a translation */
  20 #define _PAGE_HASHPTE   0x002   /* hash_page has made an HPTE for this pte */
  21 #define _PAGE_FILE      0x004   /* when !present: nonlinear file mapping */
  22 #define _PAGE_USER      0x004   /* usermode access allowed */
  23 #define _PAGE_GUARDED   0x008   /* G: prohibit speculative access */
  24 #define _PAGE_COHERENT  0x010   /* M: enforce memory coherence (SMP systems) */
  25 #define _PAGE_NO_CACHE  0x020   /* I: cache inhibit */
  26 #define _PAGE_WRITETHRU 0x040   /* W: cache write-through */
  27 #define _PAGE_DIRTY     0x080   /* C: page changed */
  28 #define _PAGE_ACCESSED  0x100   /* R: page referenced */
  29 #define _PAGE_EXEC      0x200   /* software: i-cache coherency required */
  30 #define _PAGE_RW        0x400   /* software: user write access allowed */
  31 #define _PAGE_SPECIAL   0x800   /* software: Special page */
  32
  33 #ifdef CONFIG_PTE_64BIT
  34 /* We never clear the high word of the pte */
  35 #define _PTE_NONE_MASK  (0xffffffff00000000ULL | _PAGE_HASHPTE)
  36 #else
  37 #define _PTE_NONE_MASK  _PAGE_HASHPTE
  38 #endif
  39
  40 #define _PMD_PRESENT    0
  41 #define _PMD_PRESENT_MASK (PAGE_MASK)
  42 #define _PMD_BAD        (~PAGE_MASK)
  43
  44 /* Hash table based platforms need atomic updates of the linux PTE */
  45 #define PTE_ATOMIC_UPDATES      1
  46
  47 #endif /* __KERNEL__ */
  48 #endif /*  _ASM_POWERPC_PTE_HASH32_H */