drivers/ata/sata_via.c

   1 /*
   2  *  sata_via.c - VIA Serial ATA controllers
   3  *
   4  *  Maintained by:  Jeff Garzik <jgarzik@pobox.com>
   5  *                 Please ALWAYS copy linux-ide@vger.kernel.org
   6  *                 on emails.
   7  *
   8  *  Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
   9  *  Copyright 2003-2004 Jeff Garzik
  10  *
  11  *
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; either version 2, or (at your option)
  15  *  any later version.
  16  *
  17  *  This program is distributed in the hope that it will be useful,
  18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *  GNU General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU General Public License
  23  *  along with this program; see the file COPYING.  If not, write to
  24  *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  *
  27  *  libata documentation is available via 'make {ps|pdf}docs',
  28  *  as Documentation/DocBook/libata.*
  29  *
  30  *  Hardware documentation available under NDA.
  31  *
  32  *
  33  *
  34  */
  35
  36 #include <linux/kernel.h>
  37 #include <linux/module.h>
  38 #include <linux/pci.h>
  39 #include <linux/init.h>
  40 #include <linux/blkdev.h>
  41 #include <linux/delay.h>
  42 #include <linux/device.h>
  43 #include <scsi/scsi_host.h>
  44 #include <linux/libata.h>
  45
  46 #define DRV_NAME        "sata_via"
  47 #define DRV_VERSION     "2.4"
  48
  49 /*
  50  * vt8251 is different from other sata controllers of VIA.  It has two
  51  * channels, each channel has both Master and Slave slot.
  52  */
  53 enum board_ids_enum {
  54         vt6420,
  55         vt6421,
  56         vt8251,
  57 };
  58
  59 enum {
  60         SATA_CHAN_ENAB          = 0x40, /* SATA channel enable */
  61         SATA_INT_GATE           = 0x41, /* SATA interrupt gating */
  62         SATA_NATIVE_MODE        = 0x42, /* Native mode enable */
  63         PATA_UDMA_TIMING        = 0xB3, /* PATA timing for DMA/ cable detect */
  64         PATA_PIO_TIMING         = 0xAB, /* PATA timing register */
  65
  66         PORT0                   = (1 << 1),
  67         PORT1                   = (1 << 0),
  68         ALL_PORTS               = PORT0 | PORT1,
  69
  70         NATIVE_MODE_ALL         = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4),
  71
  72         SATA_EXT_PHY            = (1 << 6), /* 0==use PATA, 1==ext phy */
  73 };
  74
  75 static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
  76 static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
  77 static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
  78 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val);
  79 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val);
  80 static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
  81 static void svia_noop_freeze(struct ata_port *ap);
  82 static int vt6420_prereset(struct ata_link *link, unsigned long deadline);
  83 static int vt6421_pata_cable_detect(struct ata_port *ap);
  84 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
  85 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
  86
  87 static const struct pci_device_id svia_pci_tbl[] = {
  88         { PCI_VDEVICE(VIA, 0x5337), vt6420 },
  89         { PCI_VDEVICE(VIA, 0x0591), vt6420 }, /* 2 sata chnls (Master) */
  90         { PCI_VDEVICE(VIA, 0x3149), vt6420 }, /* 2 sata chnls (Master) */
  91         { PCI_VDEVICE(VIA, 0x3249), vt6421 }, /* 2 sata chnls, 1 pata chnl */
  92         { PCI_VDEVICE(VIA, 0x5372), vt6420 },
  93         { PCI_VDEVICE(VIA, 0x7372), vt6420 },
  94         { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
  95         { PCI_VDEVICE(VIA, 0x9000), vt8251 },
  96         { PCI_VDEVICE(VIA, 0x9040), vt8251 },
  97
  98         { }     /* terminate list */
  99 };
 100
 101 static struct pci_driver svia_pci_driver = {
 102         .name                   = DRV_NAME,
 103         .id_table               = svia_pci_tbl,
 104         .probe                  = svia_init_one,
 105 #ifdef CONFIG_PM
 106         .suspend                = ata_pci_device_suspend,
 107         .resume                 = ata_pci_device_resume,
 108 #endif
 109         .remove                 = ata_pci_remove_one,
 110 };
 111
 112 static struct scsi_host_template svia_sht = {
 113         ATA_BMDMA_SHT(DRV_NAME),
 114 };
 115
 116 static struct ata_port_operations svia_base_ops = {
 117         .inherits               = &ata_bmdma_port_ops,
 118         .sff_tf_load            = svia_tf_load,
 119 };
 120
 121 static struct ata_port_operations vt6420_sata_ops = {
 122         .inherits               = &svia_base_ops,
 123         .freeze                 = svia_noop_freeze,
 124         .prereset               = vt6420_prereset,
 125 };
 126
 127 static struct ata_port_operations vt6421_pata_ops = {
 128         .inherits               = &svia_base_ops,
 129         .cable_detect           = vt6421_pata_cable_detect,
 130         .set_piomode            = vt6421_set_pio_mode,
 131         .set_dmamode            = vt6421_set_dma_mode,
 132 };
 133
 134 static struct ata_port_operations vt6421_sata_ops = {
 135         .inherits               = &svia_base_ops,
 136         .scr_read               = svia_scr_read,
 137         .scr_write              = svia_scr_write,
 138 };
 139
 140 static struct ata_port_operations vt8251_ops = {
 141         .inherits               = &svia_base_ops,
 142         .hardreset              = sata_std_hardreset,
 143         .scr_read               = vt8251_scr_read,
 144         .scr_write              = vt8251_scr_write,
 145 };
 146
 147 static const struct ata_port_info vt6420_port_info = {
 148         .flags          = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
 149         .pio_mask       = ATA_PIO4,
 150         .mwdma_mask     = ATA_MWDMA2,
 151         .udma_mask      = ATA_UDMA6,
 152         .port_ops       = &vt6420_sata_ops,
 153 };
 154
 155 static struct ata_port_info vt6421_sport_info = {
 156         .flags          = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
 157         .pio_mask       = ATA_PIO4,
 158         .mwdma_mask     = ATA_MWDMA2,
 159         .udma_mask      = ATA_UDMA6,
 160         .port_ops       = &vt6421_sata_ops,
 161 };
 162
 163 static struct ata_port_info vt6421_pport_info = {
 164         .flags          = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY,
 165         .pio_mask       = ATA_PIO4,
 166         /* No MWDMA */
 167         .udma_mask      = ATA_UDMA6,
 168         .port_ops       = &vt6421_pata_ops,
 169 };
 170
 171 static struct ata_port_info vt8251_port_info = {
 172         .flags          = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS |
 173                           ATA_FLAG_NO_LEGACY,
 174         .pio_mask       = ATA_PIO4,
 175         .mwdma_mask     = ATA_MWDMA2,
 176         .udma_mask      = ATA_UDMA6,
 177         .port_ops       = &vt8251_ops,
 178 };
 179
 180 MODULE_AUTHOR("Jeff Garzik");
 181 MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
 182 MODULE_LICENSE("GPL");
 183 MODULE_DEVICE_TABLE(pci, svia_pci_tbl);
 184 MODULE_VERSION(DRV_VERSION);
 185
 186 static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
 187 {
 188         if (sc_reg > SCR_CONTROL)
 189                 return -EINVAL;
 190         *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg));
 191         return 0;
 192 }
 193
 194 static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
 195 {
 196         if (sc_reg > SCR_CONTROL)
 197                 return -EINVAL;
 198         iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg));
 199         return 0;
 200 }
 201
 202 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
 203 {
 204         static const u8 ipm_tbl[] = { 1, 2, 6, 0 };
 205         struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
 206         int slot = 2 * link->ap->port_no + link->pmp;
 207         u32 v = 0;
 208         u8 raw;
 209
 210         switch (scr) {
 211         case SCR_STATUS:
 212                 pci_read_config_byte(pdev, 0xA0 + slot, &raw);
 213
 214                 /* read the DET field, bit0 and 1 of the config byte */
 215                 v |= raw & 0x03;
 216
 217                 /* read the SPD field, bit4 of the configure byte */
 218                 if (raw & (1 << 4))
 219                         v |= 0x02 << 4;
 220                 else
 221                         v |= 0x01 << 4;
 222
 223                 /* read the IPM field, bit2 and 3 of the config byte */
 224                 v |= ipm_tbl[(raw >> 2) & 0x3];
 225                 break;
 226
 227         case SCR_ERROR:
 228                 /* devices other than 5287 uses 0xA8 as base */
 229                 WARN_ON(pdev->device != 0x5287);
 230                 pci_read_config_dword(pdev, 0xB0 + slot * 4, &v);
 231                 break;
 232
 233         case SCR_CONTROL:
 234                 pci_read_config_byte(pdev, 0xA4 + slot, &raw);
 235
 236                 /* read the DET field, bit0 and bit1 */
 237                 v |= ((raw & 0x02) << 1) | (raw & 0x01);
 238
 239                 /* read the IPM field, bit2 and bit3 */
 240                 v |= ((raw >> 2) & 0x03) << 8;
 241                 break;
 242
 243         default:
 244                 return -EINVAL;
 245         }
 246
 247         *val = v;
 248         return 0;
 249 }
 250
 251 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val)
 252 {
 253         struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
 254         int slot = 2 * link->ap->port_no + link->pmp;
 255         u32 v = 0;
 256
 257         switch (scr) {
 258         case SCR_ERROR:
 259                 /* devices other than 5287 uses 0xA8 as base */
 260                 WARN_ON(pdev->device != 0x5287);
 261                 pci_write_config_dword(pdev, 0xB0 + slot * 4, val);
 262                 return 0;
 263
 264         case SCR_CONTROL:
 265                 /* set the DET field */
 266                 v |= ((val & 0x4) >> 1) | (val & 0x1);
 267
 268                 /* set the IPM field */
 269                 v |= ((val >> 8) & 0x3) << 2;
 270
 271                 pci_write_config_byte(pdev, 0xA4 + slot, v);
 272                 return 0;
 273
 274         default:
 275                 return -EINVAL;
 276         }
 277 }
 278
 279 /**
 280  *      svia_tf_load - send taskfile registers to host controller
 281  *      @ap: Port to which output is sent
 282  *      @tf: ATA taskfile register set
 283  *
 284  *      Outputs ATA taskfile to standard ATA host controller.
 285  *
 286  *      This is to fix the internal bug of via chipsets, which will
 287  *      reset the device register after changing the IEN bit on ctl
 288  *      register.
 289  */
 290 static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
 291 {
 292         struct ata_taskfile ttf;
 293
 294         if (tf->ctl != ap->last_ctl)  {
 295                 ttf = *tf;
 296                 ttf.flags |= ATA_TFLAG_DEVICE;
 297                 tf = &ttf;
 298         }
 299         ata_sff_tf_load(ap, tf);
 300 }
 301
 302 static void svia_noop_freeze(struct ata_port *ap)
 303 {
 304         /* Some VIA controllers choke if ATA_NIEN is manipulated in
 305          * certain way.  Leave it alone and just clear pending IRQ.
 306          */
 307         ap->ops->sff_check_status(ap);
 308         ata_sff_irq_clear(ap);
 309 }
 310
 311 /**
 312  *      vt6420_prereset - prereset for vt6420
 313  *      @link: target ATA link
 314  *      @deadline: deadline jiffies for the operation
 315  *
 316  *      SCR registers on vt6420 are pieces of shit and may hang the
 317  *      whole machine completely if accessed with the wrong timing.
 318  *      To avoid such catastrophe, vt6420 doesn't provide generic SCR
 319  *      access operations, but uses SStatus and SControl only during
 320  *      boot probing in controlled way.
 321  *
 322  *      As the old (pre EH update) probing code is proven to work, we
 323  *      strictly follow the access pattern.
 324  *
 325  *      LOCKING:
 326  *      Kernel thread context (may sleep)
 327  *
 328  *      RETURNS:
 329  *      0 on success, -errno otherwise.
 330  */
 331 static int vt6420_prereset(struct ata_link *link, unsigned long deadline)
 332 {
 333         struct ata_port *ap = link->ap;
 334         struct ata_eh_context *ehc = &ap->link.eh_context;
 335         unsigned long timeout = jiffies + (HZ * 5);
 336         u32 sstatus, scontrol;
 337         int online;
 338
 339         /* don't do any SCR stuff if we're not loading */
 340         if (!(ap->pflags & ATA_PFLAG_LOADING))
 341                 goto skip_scr;
 342
 343         /* Resume phy.  This is the old SATA resume sequence */
 344         svia_scr_write(link, SCR_CONTROL, 0x300);
 345         svia_scr_read(link, SCR_CONTROL, &scontrol); /* flush */
 346
 347         /* wait for phy to become ready, if necessary */
 348         do {
 349                 msleep(200);
 350                 svia_scr_read(link, SCR_STATUS, &sstatus);
 351                 if ((sstatus & 0xf) != 1)
 352                         break;
 353         } while (time_before(jiffies, timeout));
 354
 355         /* open code sata_print_link_status() */
 356         svia_scr_read(link, SCR_STATUS, &sstatus);
 357         svia_scr_read(link, SCR_CONTROL, &scontrol);
 358
 359         online = (sstatus & 0xf) == 0x3;
 360
 361         ata_port_printk(ap, KERN_INFO,
 362                         "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n",
 363                         online ? "up" : "down", sstatus, scontrol);
 364
 365         /* SStatus is read one more time */
 366         svia_scr_read(link, SCR_STATUS, &sstatus);
 367
 368         if (!online) {
 369                 /* tell EH to bail */
 370                 ehc->i.action &= ~ATA_EH_RESET;
 371                 return 0;
 372         }
 373
 374  skip_scr:
 375         /* wait for !BSY */
 376         ata_sff_wait_ready(link, deadline);
 377
 378         return 0;
 379 }
 380
 381 static int vt6421_pata_cable_detect(struct ata_port *ap)
 382 {
 383         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 384         u8 tmp;
 385
 386         pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp);
 387         if (tmp & 0x10)
 388                 return ATA_CBL_PATA40;
 389         return ATA_CBL_PATA80;
 390 }
 391
 392 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
 393 {
 394         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 395         static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
 396         pci_write_config_byte(pdev, PATA_PIO_TIMING, pio_bits[adev->pio_mode - XFER_PIO_0]);
 397 }
 398
 399 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
 400 {
 401         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 402         static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
 403         pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->dma_mode - XFER_UDMA_0]);
 404 }
 405
 406 static const unsigned int svia_bar_sizes[] = {
 407         8, 4, 8, 4, 16, 256
 408 };
 409
 410 static const unsigned int vt6421_bar_sizes[] = {
 411         16, 16, 16, 16, 32, 128
 412 };
 413
 414 static void __iomem *svia_scr_addr(void __iomem *addr, unsigned int port)
 415 {
 416         return addr + (port * 128);
 417 }
 418
 419 static void __iomem *vt6421_scr_addr(void __iomem *addr, unsigned int port)
 420 {
 421         return addr + (port * 64);
 422 }
 423
 424 static void vt6421_init_addrs(struct ata_port *ap)
 425 {
 426         void __iomem * const * iomap = ap->host->iomap;
 427         void __iomem *reg_addr = iomap[ap->port_no];
 428         void __iomem *bmdma_addr = iomap[4] + (ap->port_no * 8);
 429         struct ata_ioports *ioaddr = &ap->ioaddr;
 430
 431         ioaddr->cmd_addr = reg_addr;
 432         ioaddr->altstatus_addr =
 433         ioaddr->ctl_addr = (void __iomem *)
 434                 ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS);
 435         ioaddr->bmdma_addr = bmdma_addr;
 436         ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no);
 437
 438         ata_sff_std_ports(ioaddr);
 439
 440         ata_port_pbar_desc(ap, ap->port_no, -1, "port");
 441         ata_port_pbar_desc(ap, 4, ap->port_no * 8, "bmdma");
 442 }
 443
 444 static int vt6420_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
 445 {
 446         const struct ata_port_info *ppi[] = { &vt6420_port_info, NULL };
 447         struct ata_host *host;
 448         int rc;
 449
 450         rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
 451         if (rc)
 452                 return rc;
 453         *r_host = host;
 454
 455         rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
 456         if (rc) {
 457                 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n");
 458                 return rc;
 459         }
 460
 461         host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0);
 462         host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1);
 463
 464         return 0;
 465 }
 466
 467 static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
 468 {
 469         const struct ata_port_info *ppi[] =
 470                 { &vt6421_sport_info, &vt6421_sport_info, &vt6421_pport_info };
 471         struct ata_host *host;
 472         int i, rc;
 473
 474         *r_host = host = ata_host_alloc_pinfo(&pdev->dev, ppi, ARRAY_SIZE(ppi));
 475         if (!host) {
 476                 dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n");
 477                 return -ENOMEM;
 478         }
 479
 480         rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME);
 481         if (rc) {
 482                 dev_printk(KERN_ERR, &pdev->dev, "failed to request/iomap "
 483                            "PCI BARs (errno=%d)\n", rc);
 484                 return rc;
 485         }
 486         host->iomap = pcim_iomap_table(pdev);
 487
 488         for (i = 0; i < host->n_ports; i++)
 489                 vt6421_init_addrs(host->ports[i]);
 490
 491         rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
 492         if (rc)
 493                 return rc;
 494         rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
 495         if (rc)
 496                 return rc;
 497
 498         return 0;
 499 }
 500
 501 static int vt8251_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
 502 {
 503         const struct ata_port_info *ppi[] = { &vt8251_port_info, NULL };
 504         struct ata_host *host;
 505         int i, rc;
 506
 507         rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
 508         if (rc)
 509                 return rc;
 510         *r_host = host;
 511
 512         rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
 513         if (rc) {
 514                 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n");
 515                 return rc;
 516         }
 517
 518         /* 8251 hosts four sata ports as M/S of the two channels */
 519         for (i = 0; i < host->n_ports; i++)
 520                 ata_slave_link_init(host->ports[i]);
 521
 522         return 0;
 523 }
 524
 525 static void svia_configure(struct pci_dev *pdev)
 526 {
 527         u8 tmp8;
 528
 529         pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8);
 530         dev_printk(KERN_INFO, &pdev->dev, "routed to hard irq line %d\n",
 531                (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f);
 532
 533         /* make sure SATA channels are enabled */
 534         pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8);
 535         if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
 536                 dev_printk(KERN_DEBUG, &pdev->dev,
 537                            "enabling SATA channels (0x%x)\n",
 538                            (int) tmp8);
 539                 tmp8 |= ALL_PORTS;
 540                 pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8);
 541         }
 542
 543         /* make sure interrupts for each channel sent to us */
 544         pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8);
 545         if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
 546                 dev_printk(KERN_DEBUG, &pdev->dev,
 547                            "enabling SATA channel interrupts (0x%x)\n",
 548                            (int) tmp8);
 549                 tmp8 |= ALL_PORTS;
 550                 pci_write_config_byte(pdev, SATA_INT_GATE, tmp8);
 551         }
 552
 553         /* make sure native mode is enabled */
 554         pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8);
 555         if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) {
 556                 dev_printk(KERN_DEBUG, &pdev->dev,
 557                            "enabling SATA channel native mode (0x%x)\n",
 558                            (int) tmp8);
 559                 tmp8 |= NATIVE_MODE_ALL;
 560                 pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
 561         }
 562 }
 563
 564 static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 565 {
 566         static int printed_version;
 567         unsigned int i;
 568         int rc;
 569         struct ata_host *host = NULL;
 570         int board_id = (int) ent->driver_data;
 571         const unsigned *bar_sizes;
 572
 573         if (!printed_version++)
 574                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 575
 576         rc = pcim_enable_device(pdev);
 577         if (rc)
 578                 return rc;
 579
 580         if (board_id == vt6421)
 581                 bar_sizes = &vt6421_bar_sizes[0];
 582         else
 583                 bar_sizes = &svia_bar_sizes[0];
 584
 585         for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++)
 586                 if ((pci_resource_start(pdev, i) == 0) ||
 587                     (pci_resource_len(pdev, i) < bar_sizes[i])) {
 588                         dev_printk(KERN_ERR, &pdev->dev,
 589                                 "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n",
 590                                 i,
 591                                 (unsigned long long)pci_resource_start(pdev, i),
 592                                 (unsigned long long)pci_resource_len(pdev, i));
 593                         return -ENODEV;
 594                 }
 595
 596         switch (board_id) {
 597         case vt6420:
 598                 rc = vt6420_prepare_host(pdev, &host);
 599                 break;
 600         case vt6421:
 601                 rc = vt6421_prepare_host(pdev, &host);
 602                 break;
 603         case vt8251:
 604                 rc = vt8251_prepare_host(pdev, &host);
 605                 break;
 606         default:
 607                 rc = -EINVAL;
 608         }
 609         if (rc)
 610                 return rc;
 611
 612         svia_configure(pdev);
 613
 614         pci_set_master(pdev);
 615         return ata_host_activate(host, pdev->irq, ata_sff_interrupt,
 616                                  IRQF_SHARED, &svia_sht);
 617 }
 618
 619 static int __init svia_init(void)
 620 {
 621         return pci_register_driver(&svia_pci_driver);
 622 }
 623
 624 static void __exit svia_exit(void)
 625 {
 626         pci_unregister_driver(&svia_pci_driver);
 627 }
 628
 629 module_init(svia_init);
 630 module_exit(svia_exit);