MIPS: SB1250: Include correct header and fix a warning
[linux-2.6/linux-mips.git] / arch / x86 / kernel / microcode_intel.c
blob85a343e28937770e383aec0d1320140bc7e0baf8
1 /*
2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
15 * http://developer.intel.com/design/pentium4/manuals/253668.htm
17 * For more information, go to http://www.urbanmyth.org/microcode
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
25 * Initial release.
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
67 * because we no longer hold a copy of applied microcode
68 * in kernel memory.
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
74 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
76 #include <linux/firmware.h>
77 #include <linux/uaccess.h>
78 #include <linux/kernel.h>
79 #include <linux/module.h>
80 #include <linux/vmalloc.h>
82 #include <asm/microcode.h>
83 #include <asm/processor.h>
84 #include <asm/msr.h>
86 MODULE_DESCRIPTION("Microcode Update Driver");
87 MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
88 MODULE_LICENSE("GPL");
90 struct microcode_header_intel {
91 unsigned int hdrver;
92 unsigned int rev;
93 unsigned int date;
94 unsigned int sig;
95 unsigned int cksum;
96 unsigned int ldrver;
97 unsigned int pf;
98 unsigned int datasize;
99 unsigned int totalsize;
100 unsigned int reserved[3];
103 struct microcode_intel {
104 struct microcode_header_intel hdr;
105 unsigned int bits[0];
108 /* microcode format is extended from prescott processors */
109 struct extended_signature {
110 unsigned int sig;
111 unsigned int pf;
112 unsigned int cksum;
115 struct extended_sigtable {
116 unsigned int count;
117 unsigned int cksum;
118 unsigned int reserved[3];
119 struct extended_signature sigs[0];
122 #define DEFAULT_UCODE_DATASIZE (2000)
123 #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
124 #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
125 #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
126 #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
127 #define DWSIZE (sizeof(u32))
129 #define get_totalsize(mc) \
130 (((struct microcode_intel *)mc)->hdr.totalsize ? \
131 ((struct microcode_intel *)mc)->hdr.totalsize : \
132 DEFAULT_UCODE_TOTALSIZE)
134 #define get_datasize(mc) \
135 (((struct microcode_intel *)mc)->hdr.datasize ? \
136 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
138 #define sigmatch(s1, s2, p1, p2) \
139 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
141 #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
143 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
145 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
146 unsigned int val[2];
148 memset(csig, 0, sizeof(*csig));
150 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
151 cpu_has(c, X86_FEATURE_IA64)) {
152 pr_err("CPU%d not a capable Intel processor\n", cpu_num);
153 return -1;
156 csig->sig = cpuid_eax(0x00000001);
158 if ((c->x86_model >= 5) || (c->x86 > 6)) {
159 /* get processor flags from MSR 0x17 */
160 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
161 csig->pf = 1 << ((val[1] >> 18) & 7);
164 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
165 /* see notes above for revision 1.07. Apparent chip bug */
166 sync_core();
167 /* get the current revision from MSR 0x8B */
168 rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
170 pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
171 cpu_num, csig->sig, csig->pf, csig->rev);
173 return 0;
176 static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
178 return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
181 static inline int
182 update_match_revision(struct microcode_header_intel *mc_header, int rev)
184 return (mc_header->rev <= rev) ? 0 : 1;
187 static int microcode_sanity_check(void *mc)
189 unsigned long total_size, data_size, ext_table_size;
190 struct microcode_header_intel *mc_header = mc;
191 struct extended_sigtable *ext_header = NULL;
192 int sum, orig_sum, ext_sigcount = 0, i;
193 struct extended_signature *ext_sig;
195 total_size = get_totalsize(mc_header);
196 data_size = get_datasize(mc_header);
198 if (data_size + MC_HEADER_SIZE > total_size) {
199 pr_err("error! Bad data size in microcode data file\n");
200 return -EINVAL;
203 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
204 pr_err("error! Unknown microcode update format\n");
205 return -EINVAL;
207 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
208 if (ext_table_size) {
209 if ((ext_table_size < EXT_HEADER_SIZE)
210 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
211 pr_err("error! Small exttable size in microcode data file\n");
212 return -EINVAL;
214 ext_header = mc + MC_HEADER_SIZE + data_size;
215 if (ext_table_size != exttable_size(ext_header)) {
216 pr_err("error! Bad exttable size in microcode data file\n");
217 return -EFAULT;
219 ext_sigcount = ext_header->count;
222 /* check extended table checksum */
223 if (ext_table_size) {
224 int ext_table_sum = 0;
225 int *ext_tablep = (int *)ext_header;
227 i = ext_table_size / DWSIZE;
228 while (i--)
229 ext_table_sum += ext_tablep[i];
230 if (ext_table_sum) {
231 pr_warning("aborting, bad extended signature table checksum\n");
232 return -EINVAL;
236 /* calculate the checksum */
237 orig_sum = 0;
238 i = (MC_HEADER_SIZE + data_size) / DWSIZE;
239 while (i--)
240 orig_sum += ((int *)mc)[i];
241 if (orig_sum) {
242 pr_err("aborting, bad checksum\n");
243 return -EINVAL;
245 if (!ext_table_size)
246 return 0;
247 /* check extended signature checksum */
248 for (i = 0; i < ext_sigcount; i++) {
249 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
250 EXT_SIGNATURE_SIZE * i;
251 sum = orig_sum
252 - (mc_header->sig + mc_header->pf + mc_header->cksum)
253 + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
254 if (sum) {
255 pr_err("aborting, bad checksum\n");
256 return -EINVAL;
259 return 0;
263 * return 0 - no update found
264 * return 1 - found update
266 static int
267 get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
269 struct microcode_header_intel *mc_header = mc;
270 struct extended_sigtable *ext_header;
271 unsigned long total_size = get_totalsize(mc_header);
272 int ext_sigcount, i;
273 struct extended_signature *ext_sig;
275 if (!update_match_revision(mc_header, rev))
276 return 0;
278 if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
279 return 1;
281 /* Look for ext. headers: */
282 if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
283 return 0;
285 ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
286 ext_sigcount = ext_header->count;
287 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
289 for (i = 0; i < ext_sigcount; i++) {
290 if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
291 return 1;
292 ext_sig++;
294 return 0;
297 static int apply_microcode(int cpu)
299 struct microcode_intel *mc_intel;
300 struct ucode_cpu_info *uci;
301 unsigned int val[2];
302 int cpu_num;
304 cpu_num = raw_smp_processor_id();
305 uci = ucode_cpu_info + cpu;
306 mc_intel = uci->mc;
308 /* We should bind the task to the CPU */
309 BUG_ON(cpu_num != cpu);
311 if (mc_intel == NULL)
312 return 0;
314 /* write microcode via MSR 0x79 */
315 wrmsr(MSR_IA32_UCODE_WRITE,
316 (unsigned long) mc_intel->bits,
317 (unsigned long) mc_intel->bits >> 16 >> 16);
318 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
320 /* see notes above for revision 1.07. Apparent chip bug */
321 sync_core();
323 /* get the current revision from MSR 0x8B */
324 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
326 if (val[1] != mc_intel->hdr.rev) {
327 pr_err("CPU%d update to revision 0x%x failed\n",
328 cpu_num, mc_intel->hdr.rev);
329 return -1;
331 pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
332 cpu_num, val[1],
333 mc_intel->hdr.date & 0xffff,
334 mc_intel->hdr.date >> 24,
335 (mc_intel->hdr.date >> 16) & 0xff);
337 uci->cpu_sig.rev = val[1];
339 return 0;
342 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
343 int (*get_ucode_data)(void *, const void *, size_t))
345 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
346 u8 *ucode_ptr = data, *new_mc = NULL, *mc;
347 int new_rev = uci->cpu_sig.rev;
348 unsigned int leftover = size;
349 enum ucode_state state = UCODE_OK;
351 while (leftover) {
352 struct microcode_header_intel mc_header;
353 unsigned int mc_size;
355 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
356 break;
358 mc_size = get_totalsize(&mc_header);
359 if (!mc_size || mc_size > leftover) {
360 pr_err("error! Bad data in microcode data file\n");
361 break;
364 mc = vmalloc(mc_size);
365 if (!mc)
366 break;
368 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
369 microcode_sanity_check(mc) < 0) {
370 vfree(mc);
371 break;
374 if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) {
375 if (new_mc)
376 vfree(new_mc);
377 new_rev = mc_header.rev;
378 new_mc = mc;
379 } else
380 vfree(mc);
382 ucode_ptr += mc_size;
383 leftover -= mc_size;
386 if (leftover) {
387 if (new_mc)
388 vfree(new_mc);
389 state = UCODE_ERROR;
390 goto out;
393 if (!new_mc) {
394 state = UCODE_NFOUND;
395 goto out;
398 if (uci->mc)
399 vfree(uci->mc);
400 uci->mc = (struct microcode_intel *)new_mc;
402 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
403 cpu, new_rev, uci->cpu_sig.rev);
404 out:
405 return state;
408 static int get_ucode_fw(void *to, const void *from, size_t n)
410 memcpy(to, from, n);
411 return 0;
414 static enum ucode_state request_microcode_fw(int cpu, struct device *device)
416 char name[30];
417 struct cpuinfo_x86 *c = &cpu_data(cpu);
418 const struct firmware *firmware;
419 enum ucode_state ret;
421 sprintf(name, "intel-ucode/%02x-%02x-%02x",
422 c->x86, c->x86_model, c->x86_mask);
424 if (request_firmware(&firmware, name, device)) {
425 pr_debug("data file %s load failed\n", name);
426 return UCODE_NFOUND;
429 ret = generic_load_microcode(cpu, (void *)firmware->data,
430 firmware->size, &get_ucode_fw);
432 release_firmware(firmware);
434 return ret;
437 static int get_ucode_user(void *to, const void *from, size_t n)
439 return copy_from_user(to, from, n);
442 static enum ucode_state
443 request_microcode_user(int cpu, const void __user *buf, size_t size)
445 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
448 static void microcode_fini_cpu(int cpu)
450 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
452 vfree(uci->mc);
453 uci->mc = NULL;
456 static struct microcode_ops microcode_intel_ops = {
457 .request_microcode_user = request_microcode_user,
458 .request_microcode_fw = request_microcode_fw,
459 .collect_cpu_info = collect_cpu_info,
460 .apply_microcode = apply_microcode,
461 .microcode_fini_cpu = microcode_fini_cpu,
464 struct microcode_ops * __init init_intel_microcode(void)
466 return &microcode_intel_ops;