drivers/mfd/pcf50633-irq.c

   1 /* NXP PCF50633 Power Management Unit (PMU) driver
   2  *
   3  * (C) 2006-2008 by Openmoko, Inc.
   4  * Author: Harald Welte <laforge@openmoko.org>
   5  *         Balaji Rao <balajirrao@openmoko.org>
   6  * All rights reserved.
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  *
  13  */
  14
  15 #include <linux/interrupt.h>
  16 #include <linux/kernel.h>
  17 #include <linux/mutex.h>
  18 #include <linux/slab.h>
  19
  20 #include <linux/mfd/pcf50633/core.h>
  21
  22 /* Two MBCS registers used during cold start */
  23 #define PCF50633_REG_MBCS1              0x4b
  24 #define PCF50633_REG_MBCS2              0x4c
  25 #define PCF50633_MBCS1_USBPRES          0x01
  26 #define PCF50633_MBCS1_ADAPTPRES        0x01
  27
  28 int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
  29                         void (*handler) (int, void *), void *data)
  30 {
  31         if (irq < 0 || irq >= PCF50633_NUM_IRQ || !handler)
  32                 return -EINVAL;
  33
  34         if (WARN_ON(pcf->irq_handler[irq].handler))
  35                 return -EBUSY;
  36
  37         mutex_lock(&pcf->lock);
  38         pcf->irq_handler[irq].handler = handler;
  39         pcf->irq_handler[irq].data = data;
  40         mutex_unlock(&pcf->lock);
  41
  42         return 0;
  43 }
  44 EXPORT_SYMBOL_GPL(pcf50633_register_irq);
  45
  46 int pcf50633_free_irq(struct pcf50633 *pcf, int irq)
  47 {
  48         if (irq < 0 || irq >= PCF50633_NUM_IRQ)
  49                 return -EINVAL;
  50
  51         mutex_lock(&pcf->lock);
  52         pcf->irq_handler[irq].handler = NULL;
  53         mutex_unlock(&pcf->lock);
  54
  55         return 0;
  56 }
  57 EXPORT_SYMBOL_GPL(pcf50633_free_irq);
  58
  59 static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask)
  60 {
  61         u8 reg, bit;
  62         int ret = 0, idx;
  63
  64         idx = irq >> 3;
  65         reg = PCF50633_REG_INT1M + idx;
  66         bit = 1 << (irq & 0x07);
  67
  68         pcf50633_reg_set_bit_mask(pcf, reg, bit, mask ? bit : 0);
  69
  70         mutex_lock(&pcf->lock);
  71
  72         if (mask)
  73                 pcf->mask_regs[idx] |= bit;
  74         else
  75                 pcf->mask_regs[idx] &= ~bit;
  76
  77         mutex_unlock(&pcf->lock);
  78
  79         return ret;
  80 }
  81
  82 int pcf50633_irq_mask(struct pcf50633 *pcf, int irq)
  83 {
  84         dev_dbg(pcf->dev, "Masking IRQ %d\n", irq);
  85
  86         return __pcf50633_irq_mask_set(pcf, irq, 1);
  87 }
  88 EXPORT_SYMBOL_GPL(pcf50633_irq_mask);
  89
  90 int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq)
  91 {
  92         dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq);
  93
  94         return __pcf50633_irq_mask_set(pcf, irq, 0);
  95 }
  96 EXPORT_SYMBOL_GPL(pcf50633_irq_unmask);
  97
  98 int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq)
  99 {
 100         u8 reg, bits;
 101
 102         reg =  irq >> 3;
 103         bits = 1 << (irq & 0x07);
 104
 105         return pcf->mask_regs[reg] & bits;
 106 }
 107 EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get);
 108
 109 static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq)
 110 {
 111         if (pcf->irq_handler[irq].handler)
 112                 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
 113 }
 114
 115 /* Maximum amount of time ONKEY is held before emergency action is taken */
 116 #define PCF50633_ONKEY1S_TIMEOUT 8
 117
 118 static irqreturn_t pcf50633_irq(int irq, void *data)
 119 {
 120         struct pcf50633 *pcf = data;
 121         int ret, i, j;
 122         u8 pcf_int[5], chgstat;
 123
 124         /* Read the 5 INT regs in one transaction */
 125         ret = pcf50633_read_block(pcf, PCF50633_REG_INT1,
 126                                                 ARRAY_SIZE(pcf_int), pcf_int);
 127         if (ret != ARRAY_SIZE(pcf_int)) {
 128                 dev_err(pcf->dev, "Error reading INT registers\n");
 129
 130                 /*
 131                  * If this doesn't ACK the interrupt to the chip, we'll be
 132                  * called once again as we're level triggered.
 133                  */
 134                 goto out;
 135         }
 136
 137         /* defeat 8s death from lowsys on A5 */
 138         pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN,  0x04);
 139
 140         /* We immediately read the usb and adapter status. We thus make sure
 141          * only of USBINS/USBREM IRQ handlers are called */
 142         if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) {
 143                 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
 144                 if (chgstat & (0x3 << 4))
 145                         pcf_int[0] &= ~PCF50633_INT1_USBREM;
 146                 else
 147                         pcf_int[0] &= ~PCF50633_INT1_USBINS;
 148         }
 149
 150         /* Make sure only one of ADPINS or ADPREM is set */
 151         if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) {
 152                 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
 153                 if (chgstat & (0x3 << 4))
 154                         pcf_int[0] &= ~PCF50633_INT1_ADPREM;
 155                 else
 156                         pcf_int[0] &= ~PCF50633_INT1_ADPINS;
 157         }
 158
 159         dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x "
 160                         "INT4=0x%02x INT5=0x%02x\n", pcf_int[0],
 161                         pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]);
 162
 163         /* Some revisions of the chip don't have a 8s standby mode on
 164          * ONKEY1S press. We try to manually do it in such cases. */
 165         if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) {
 166                 dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
 167                                                         pcf->onkey1s_held);
 168                 if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT)
 169                         if (pcf->pdata->force_shutdown)
 170                                 pcf->pdata->force_shutdown(pcf);
 171         }
 172
 173         if (pcf_int[2] & PCF50633_INT3_ONKEY1S) {
 174                 dev_info(pcf->dev, "ONKEY1S held\n");
 175                 pcf->onkey1s_held = 1 ;
 176
 177                 /* Unmask IRQ_SECOND */
 178                 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M,
 179                                                 PCF50633_INT1_SECOND);
 180
 181                 /* Unmask IRQ_ONKEYR */
 182                 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M,
 183                                                 PCF50633_INT2_ONKEYR);
 184         }
 185
 186         if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) {
 187                 pcf->onkey1s_held = 0;
 188
 189                 /* Mask SECOND and ONKEYR interrupts */
 190                 if (pcf->mask_regs[0] & PCF50633_INT1_SECOND)
 191                         pcf50633_reg_set_bit_mask(pcf,
 192                                         PCF50633_REG_INT1M,
 193                                         PCF50633_INT1_SECOND,
 194                                         PCF50633_INT1_SECOND);
 195
 196                 if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR)
 197                         pcf50633_reg_set_bit_mask(pcf,
 198                                         PCF50633_REG_INT2M,
 199                                         PCF50633_INT2_ONKEYR,
 200                                         PCF50633_INT2_ONKEYR);
 201         }
 202
 203         /* Have we just resumed ? */
 204         if (pcf->is_suspended) {
 205                 pcf->is_suspended = 0;
 206
 207                 /* Set the resume reason filtering out non resumers */
 208                 for (i = 0; i < ARRAY_SIZE(pcf_int); i++)
 209                         pcf->resume_reason[i] = pcf_int[i] &
 210                                                 pcf->pdata->resumers[i];
 211
 212                 /* Make sure we don't pass on any ONKEY events to
 213                  * userspace now */
 214                 pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF);
 215         }
 216
 217         for (i = 0; i < ARRAY_SIZE(pcf_int); i++) {
 218                 /* Unset masked interrupts */
 219                 pcf_int[i] &= ~pcf->mask_regs[i];
 220
 221                 for (j = 0; j < 8 ; j++)
 222                         if (pcf_int[i] & (1 << j))
 223                                 pcf50633_irq_call_handler(pcf, (i * 8) + j);
 224         }
 225
 226 out:
 227         return IRQ_HANDLED;
 228 }
 229
 230 #ifdef CONFIG_PM
 231
 232 int pcf50633_irq_suspend(struct pcf50633 *pcf)
 233 {
 234         int ret;
 235         int i;
 236         u8 res[5];
 237
 238
 239         /* Make sure our interrupt handlers are not called
 240          * henceforth */
 241         disable_irq(pcf->irq);
 242
 243         /* Save the masks */
 244         ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M,
 245                                 ARRAY_SIZE(pcf->suspend_irq_masks),
 246                                         pcf->suspend_irq_masks);
 247         if (ret < 0) {
 248                 dev_err(pcf->dev, "error saving irq masks\n");
 249                 goto out;
 250         }
 251
 252         /* Write wakeup irq masks */
 253         for (i = 0; i < ARRAY_SIZE(res); i++)
 254                 res[i] = ~pcf->pdata->resumers[i];
 255
 256         ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
 257                                         ARRAY_SIZE(res), &res[0]);
 258         if (ret < 0) {
 259                 dev_err(pcf->dev, "error writing wakeup irq masks\n");
 260                 goto out;
 261         }
 262
 263         pcf->is_suspended = 1;
 264
 265 out:
 266         return ret;
 267 }
 268
 269 int pcf50633_irq_resume(struct pcf50633 *pcf)
 270 {
 271         int ret;
 272
 273         /* Write the saved mask registers */
 274         ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
 275                                 ARRAY_SIZE(pcf->suspend_irq_masks),
 276                                         pcf->suspend_irq_masks);
 277         if (ret < 0)
 278                 dev_err(pcf->dev, "Error restoring saved suspend masks\n");
 279
 280         enable_irq(pcf->irq);
 281
 282         return ret;
 283 }
 284
 285 #endif
 286
 287 int pcf50633_irq_init(struct pcf50633 *pcf, int irq)
 288 {
 289         int ret;
 290
 291         pcf->irq = irq;
 292
 293         /* Enable all interrupts except RTC SECOND */
 294         pcf->mask_regs[0] = 0x80;
 295         pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]);
 296         pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
 297         pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
 298         pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
 299         pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
 300
 301         ret = request_threaded_irq(irq, NULL, pcf50633_irq,
 302                                         IRQF_TRIGGER_LOW | IRQF_ONESHOT,
 303                                         "pcf50633", pcf);
 304
 305         if (ret)
 306                 dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
 307
 308         if (enable_irq_wake(irq) < 0)
 309                 dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
 310                         "in this hardware revision", irq);
 311
 312         return ret;
 313 }
 314
 315 void pcf50633_irq_free(struct pcf50633 *pcf)
 316 {
 317         free_irq(pcf->irq, pcf);
 318 }