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cris: add arch/cris/include/asm/serial.h
[linux-2.6/next.git] / drivers / net / vmxnet3 / vmxnet3_drv.c
blob0959583feb27ed2c7962e6d6e7a931c53f7d664a
1 /*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
27 #include <net/ip6_checksum.h>
28
29 #include "vmxnet3_int.h"
30
31 char vmxnet3_driver_name[] = "vmxnet3";
32 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
33
34 /*
35 * PCI Device ID Table
36 * Last entry must be all 0s
37 */
38 static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = {
39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
40 {0}
41 };
42
43 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
44
45 static atomic_t devices_found;
46
47 #define VMXNET3_MAX_DEVICES 10
48 static int enable_mq = 1;
49 static int irq_share_mode;
50
51 static void
52 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
53
54 /*
55 * Enable/Disable the given intr
56 */
57 static void
58 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
59 {
60 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
61 }
62
63
64 static void
65 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
66 {
67 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
68 }
69
70
71 /*
72 * Enable/Disable all intrs used by the device
73 */
74 static void
75 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
76 {
77 int i;
78
79 for (i = 0; i < adapter->intr.num_intrs; i++)
80 vmxnet3_enable_intr(adapter, i);
81 adapter->shared->devRead.intrConf.intrCtrl &=
82 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
83 }
84
85
86 static void
87 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
88 {
89 int i;
90
91 adapter->shared->devRead.intrConf.intrCtrl |=
92 cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
93 for (i = 0; i < adapter->intr.num_intrs; i++)
94 vmxnet3_disable_intr(adapter, i);
95 }
96
97
98 static void
99 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
100 {
101 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
102 }
103
104
105 static bool
106 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
107 {
108 return tq->stopped;
109 }
110
111
112 static void
113 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
114 {
115 tq->stopped = false;
116 netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
117 }
118
119
120 static void
121 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
122 {
123 tq->stopped = false;
124 netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
125 }
126
127
128 static void
129 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
130 {
131 tq->stopped = true;
132 tq->num_stop++;
133 netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
134 }
135
136
137 /*
138 * Check the link state. This may start or stop the tx queue.
139 */
140 static void
141 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
142 {
143 u32 ret;
144 int i;
145 unsigned long flags;
146
147 spin_lock_irqsave(&adapter->cmd_lock, flags);
148 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
149 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
150 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
151
152 adapter->link_speed = ret >> 16;
153 if (ret & 1) { /* Link is up. */
154 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
155 adapter->netdev->name, adapter->link_speed);
156 if (!netif_carrier_ok(adapter->netdev))
157 netif_carrier_on(adapter->netdev);
158
159 if (affectTxQueue) {
160 for (i = 0; i < adapter->num_tx_queues; i++)
161 vmxnet3_tq_start(&adapter->tx_queue[i],
162 adapter);
163 }
164 } else {
165 printk(KERN_INFO "%s: NIC Link is Down\n",
166 adapter->netdev->name);
167 if (netif_carrier_ok(adapter->netdev))
168 netif_carrier_off(adapter->netdev);
169
170 if (affectTxQueue) {
171 for (i = 0; i < adapter->num_tx_queues; i++)
172 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
173 }
174 }
175 }
176
177 static void
178 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
179 {
180 int i;
181 unsigned long flags;
182 u32 events = le32_to_cpu(adapter->shared->ecr);
183 if (!events)
184 return;
185
186 vmxnet3_ack_events(adapter, events);
187
188 /* Check if link state has changed */
189 if (events & VMXNET3_ECR_LINK)
190 vmxnet3_check_link(adapter, true);
191
192 /* Check if there is an error on xmit/recv queues */
193 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
194 spin_lock_irqsave(&adapter->cmd_lock, flags);
195 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
196 VMXNET3_CMD_GET_QUEUE_STATUS);
197 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
198
199 for (i = 0; i < adapter->num_tx_queues; i++)
200 if (adapter->tqd_start[i].status.stopped)
201 dev_err(&adapter->netdev->dev,
202 "%s: tq[%d] error 0x%x\n",
203 adapter->netdev->name, i, le32_to_cpu(
204 adapter->tqd_start[i].status.error));
205 for (i = 0; i < adapter->num_rx_queues; i++)
206 if (adapter->rqd_start[i].status.stopped)
207 dev_err(&adapter->netdev->dev,
208 "%s: rq[%d] error 0x%x\n",
209 adapter->netdev->name, i,
210 adapter->rqd_start[i].status.error);
211
212 schedule_work(&adapter->work);
213 }
214 }
215
216 #ifdef __BIG_ENDIAN_BITFIELD
217 /*
218 * The device expects the bitfields in shared structures to be written in
219 * little endian. When CPU is big endian, the following routines are used to
220 * correctly read and write into ABI.
221 * The general technique used here is : double word bitfields are defined in
222 * opposite order for big endian architecture. Then before reading them in
223 * driver the complete double word is translated using le32_to_cpu. Similarly
224 * After the driver writes into bitfields, cpu_to_le32 is used to translate the
225 * double words into required format.
226 * In order to avoid touching bits in shared structure more than once, temporary
227 * descriptors are used. These are passed as srcDesc to following functions.
228 */
229 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
230 struct Vmxnet3_RxDesc *dstDesc)
231 {
232 u32 *src = (u32 *)srcDesc + 2;
233 u32 *dst = (u32 *)dstDesc + 2;
234 dstDesc->addr = le64_to_cpu(srcDesc->addr);
235 *dst = le32_to_cpu(*src);
236 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
237 }
238
239 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
240 struct Vmxnet3_TxDesc *dstDesc)
241 {
242 int i;
243 u32 *src = (u32 *)(srcDesc + 1);
244 u32 *dst = (u32 *)(dstDesc + 1);
245
246 /* Working backwards so that the gen bit is set at the end. */
247 for (i = 2; i > 0; i--) {
248 src--;
249 dst--;
250 *dst = cpu_to_le32(*src);
251 }
252 }
253
254
255 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
256 struct Vmxnet3_RxCompDesc *dstDesc)
257 {
258 int i = 0;
259 u32 *src = (u32 *)srcDesc;
260 u32 *dst = (u32 *)dstDesc;
261 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
262 *dst = le32_to_cpu(*src);
263 src++;
264 dst++;
265 }
266 }
267
268
269 /* Used to read bitfield values from double words. */
270 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
271 {
272 u32 temp = le32_to_cpu(*bitfield);
273 u32 mask = ((1 << size) - 1) << pos;
274 temp &= mask;
275 temp >>= pos;
276 return temp;
277 }
278
279
280
281 #endif /* __BIG_ENDIAN_BITFIELD */
282
283 #ifdef __BIG_ENDIAN_BITFIELD
284
285 # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
286 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
287 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
288 # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
289 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
290 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
291 # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
292 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
293 VMXNET3_TCD_GEN_SIZE)
294 # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
295 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
296 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
297 (dstrcd) = (tmp); \
298 vmxnet3_RxCompToCPU((rcd), (tmp)); \
299 } while (0)
300 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
301 (dstrxd) = (tmp); \
302 vmxnet3_RxDescToCPU((rxd), (tmp)); \
303 } while (0)
304
305 #else
306
307 # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
308 # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
309 # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
310 # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
311 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
312 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
313
314 #endif /* __BIG_ENDIAN_BITFIELD */
315
316
317 static void
318 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
319 struct pci_dev *pdev)
320 {
321 if (tbi->map_type == VMXNET3_MAP_SINGLE)
322 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
323 PCI_DMA_TODEVICE);
324 else if (tbi->map_type == VMXNET3_MAP_PAGE)
325 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
326 PCI_DMA_TODEVICE);
327 else
328 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
329
330 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
331 }
332
333
334 static int
335 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
336 struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
337 {
338 struct sk_buff *skb;
339 int entries = 0;
340
341 /* no out of order completion */
342 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
343 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
344
345 skb = tq->buf_info[eop_idx].skb;
346 BUG_ON(skb == NULL);
347 tq->buf_info[eop_idx].skb = NULL;
348
349 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
350
351 while (tq->tx_ring.next2comp != eop_idx) {
352 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
353 pdev);
354
355 /* update next2comp w/o tx_lock. Since we are marking more,
356 * instead of less, tx ring entries avail, the worst case is
357 * that the tx routine incorrectly re-queues a pkt due to
358 * insufficient tx ring entries.
359 */
360 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
361 entries++;
362 }
363
364 dev_kfree_skb_any(skb);
365 return entries;
366 }
367
368
369 static int
370 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
371 struct vmxnet3_adapter *adapter)
372 {
373 int completed = 0;
374 union Vmxnet3_GenericDesc *gdesc;
375
376 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
377 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
378 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
379 &gdesc->tcd), tq, adapter->pdev,
380 adapter);
381
382 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
383 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
384 }
385
386 if (completed) {
387 spin_lock(&tq->tx_lock);
388 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
389 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
390 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
391 netif_carrier_ok(adapter->netdev))) {
392 vmxnet3_tq_wake(tq, adapter);
393 }
394 spin_unlock(&tq->tx_lock);
395 }
396 return completed;
397 }
398
399
400 static void
401 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
402 struct vmxnet3_adapter *adapter)
403 {
404 int i;
405
406 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
407 struct vmxnet3_tx_buf_info *tbi;
408
409 tbi = tq->buf_info + tq->tx_ring.next2comp;
410
411 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
412 if (tbi->skb) {
413 dev_kfree_skb_any(tbi->skb);
414 tbi->skb = NULL;
415 }
416 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
417 }
418
419 /* sanity check, verify all buffers are indeed unmapped and freed */
420 for (i = 0; i < tq->tx_ring.size; i++) {
421 BUG_ON(tq->buf_info[i].skb != NULL ||
422 tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
423 }
424
425 tq->tx_ring.gen = VMXNET3_INIT_GEN;
426 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
427
428 tq->comp_ring.gen = VMXNET3_INIT_GEN;
429 tq->comp_ring.next2proc = 0;
430 }
431
432
433 static void
434 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
435 struct vmxnet3_adapter *adapter)
436 {
437 if (tq->tx_ring.base) {
438 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
439 sizeof(struct Vmxnet3_TxDesc),
440 tq->tx_ring.base, tq->tx_ring.basePA);
441 tq->tx_ring.base = NULL;
442 }
443 if (tq->data_ring.base) {
444 pci_free_consistent(adapter->pdev, tq->data_ring.size *
445 sizeof(struct Vmxnet3_TxDataDesc),
446 tq->data_ring.base, tq->data_ring.basePA);
447 tq->data_ring.base = NULL;
448 }
449 if (tq->comp_ring.base) {
450 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
451 sizeof(struct Vmxnet3_TxCompDesc),
452 tq->comp_ring.base, tq->comp_ring.basePA);
453 tq->comp_ring.base = NULL;
454 }
455 kfree(tq->buf_info);
456 tq->buf_info = NULL;
457 }
458
459
460 /* Destroy all tx queues */
461 void
462 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
463 {
464 int i;
465
466 for (i = 0; i < adapter->num_tx_queues; i++)
467 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
468 }
469
470
471 static void
472 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
473 struct vmxnet3_adapter *adapter)
474 {
475 int i;
476
477 /* reset the tx ring contents to 0 and reset the tx ring states */
478 memset(tq->tx_ring.base, 0, tq->tx_ring.size *
479 sizeof(struct Vmxnet3_TxDesc));
480 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
481 tq->tx_ring.gen = VMXNET3_INIT_GEN;
482
483 memset(tq->data_ring.base, 0, tq->data_ring.size *
484 sizeof(struct Vmxnet3_TxDataDesc));
485
486 /* reset the tx comp ring contents to 0 and reset comp ring states */
487 memset(tq->comp_ring.base, 0, tq->comp_ring.size *
488 sizeof(struct Vmxnet3_TxCompDesc));
489 tq->comp_ring.next2proc = 0;
490 tq->comp_ring.gen = VMXNET3_INIT_GEN;
491
492 /* reset the bookkeeping data */
493 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
494 for (i = 0; i < tq->tx_ring.size; i++)
495 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
496
497 /* stats are not reset */
498 }
499
500
501 static int
502 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
503 struct vmxnet3_adapter *adapter)
504 {
505 BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
506 tq->comp_ring.base || tq->buf_info);
507
508 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
509 * sizeof(struct Vmxnet3_TxDesc),
510 &tq->tx_ring.basePA);
511 if (!tq->tx_ring.base) {
512 printk(KERN_ERR "%s: failed to allocate tx ring\n",
513 adapter->netdev->name);
514 goto err;
515 }
516
517 tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
518 tq->data_ring.size *
519 sizeof(struct Vmxnet3_TxDataDesc),
520 &tq->data_ring.basePA);
521 if (!tq->data_ring.base) {
522 printk(KERN_ERR "%s: failed to allocate data ring\n",
523 adapter->netdev->name);
524 goto err;
525 }
526
527 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
528 tq->comp_ring.size *
529 sizeof(struct Vmxnet3_TxCompDesc),
530 &tq->comp_ring.basePA);
531 if (!tq->comp_ring.base) {
532 printk(KERN_ERR "%s: failed to allocate tx comp ring\n",
533 adapter->netdev->name);
534 goto err;
535 }
536
537 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
538 GFP_KERNEL);
539 if (!tq->buf_info) {
540 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n",
541 adapter->netdev->name);
542 goto err;
543 }
544
545 return 0;
546
547 err:
548 vmxnet3_tq_destroy(tq, adapter);
549 return -ENOMEM;
550 }
551
552 static void
553 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
554 {
555 int i;
556
557 for (i = 0; i < adapter->num_tx_queues; i++)
558 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
559 }
560
561 /*
562 * starting from ring->next2fill, allocate rx buffers for the given ring
563 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
564 * are allocated or allocation fails
565 */
566
567 static int
568 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
569 int num_to_alloc, struct vmxnet3_adapter *adapter)
570 {
571 int num_allocated = 0;
572 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
573 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
574 u32 val;
575
576 while (num_allocated <= num_to_alloc) {
577 struct vmxnet3_rx_buf_info *rbi;
578 union Vmxnet3_GenericDesc *gd;
579
580 rbi = rbi_base + ring->next2fill;
581 gd = ring->base + ring->next2fill;
582
583 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
584 if (rbi->skb == NULL) {
585 rbi->skb = dev_alloc_skb(rbi->len +
586 NET_IP_ALIGN);
587 if (unlikely(rbi->skb == NULL)) {
588 rq->stats.rx_buf_alloc_failure++;
589 break;
590 }
591 rbi->skb->dev = adapter->netdev;
592
593 skb_reserve(rbi->skb, NET_IP_ALIGN);
594 rbi->dma_addr = pci_map_single(adapter->pdev,
595 rbi->skb->data, rbi->len,
596 PCI_DMA_FROMDEVICE);
597 } else {
598 /* rx buffer skipped by the device */
599 }
600 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
601 } else {
602 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
603 rbi->len != PAGE_SIZE);
604
605 if (rbi->page == NULL) {
606 rbi->page = alloc_page(GFP_ATOMIC);
607 if (unlikely(rbi->page == NULL)) {
608 rq->stats.rx_buf_alloc_failure++;
609 break;
610 }
611 rbi->dma_addr = pci_map_page(adapter->pdev,
612 rbi->page, 0, PAGE_SIZE,
613 PCI_DMA_FROMDEVICE);
614 } else {
615 /* rx buffers skipped by the device */
616 }
617 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
618 }
619
620 BUG_ON(rbi->dma_addr == 0);
621 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
622 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
623 | val | rbi->len);
624
625 /* Fill the last buffer but dont mark it ready, or else the
626 * device will think that the queue is full */
627 if (num_allocated == num_to_alloc)
628 break;
629
630 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
631 num_allocated++;
632 vmxnet3_cmd_ring_adv_next2fill(ring);
633 }
634 rq->uncommitted[ring_idx] += num_allocated;
635
636 dev_dbg(&adapter->netdev->dev,
637 "alloc_rx_buf: %d allocated, next2fill %u, next2comp "
638 "%u, uncommited %u\n", num_allocated, ring->next2fill,
639 ring->next2comp, rq->uncommitted[ring_idx]);
640
641 /* so that the device can distinguish a full ring and an empty ring */
642 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
643
644 return num_allocated;
645 }
646
647
648 static void
649 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
650 struct vmxnet3_rx_buf_info *rbi)
651 {
652 struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
653 skb_shinfo(skb)->nr_frags;
654
655 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
656
657 frag->page = rbi->page;
658 frag->page_offset = 0;
659 frag->size = rcd->len;
660 skb->data_len += frag->size;
661 skb_shinfo(skb)->nr_frags++;
662 }
663
664
665 static void
666 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
667 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
668 struct vmxnet3_adapter *adapter)
669 {
670 u32 dw2, len;
671 unsigned long buf_offset;
672 int i;
673 union Vmxnet3_GenericDesc *gdesc;
674 struct vmxnet3_tx_buf_info *tbi = NULL;
675
676 BUG_ON(ctx->copy_size > skb_headlen(skb));
677
678 /* use the previous gen bit for the SOP desc */
679 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
680
681 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
682 gdesc = ctx->sop_txd; /* both loops below can be skipped */
683
684 /* no need to map the buffer if headers are copied */
685 if (ctx->copy_size) {
686 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
687 tq->tx_ring.next2fill *
688 sizeof(struct Vmxnet3_TxDataDesc));
689 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
690 ctx->sop_txd->dword[3] = 0;
691
692 tbi = tq->buf_info + tq->tx_ring.next2fill;
693 tbi->map_type = VMXNET3_MAP_NONE;
694
695 dev_dbg(&adapter->netdev->dev,
696 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
697 tq->tx_ring.next2fill,
698 le64_to_cpu(ctx->sop_txd->txd.addr),
699 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
700 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
701
702 /* use the right gen for non-SOP desc */
703 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
704 }
705
706 /* linear part can use multiple tx desc if it's big */
707 len = skb_headlen(skb) - ctx->copy_size;
708 buf_offset = ctx->copy_size;
709 while (len) {
710 u32 buf_size;
711
712 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
713 buf_size = len;
714 dw2 |= len;
715 } else {
716 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
717 /* spec says that for TxDesc.len, 0 == 2^14 */
718 }
719
720 tbi = tq->buf_info + tq->tx_ring.next2fill;
721 tbi->map_type = VMXNET3_MAP_SINGLE;
722 tbi->dma_addr = pci_map_single(adapter->pdev,
723 skb->data + buf_offset, buf_size,
724 PCI_DMA_TODEVICE);
725
726 tbi->len = buf_size;
727
728 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
729 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
730
731 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
732 gdesc->dword[2] = cpu_to_le32(dw2);
733 gdesc->dword[3] = 0;
734
735 dev_dbg(&adapter->netdev->dev,
736 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
737 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
738 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
739 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
740 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
741
742 len -= buf_size;
743 buf_offset += buf_size;
744 }
745
746 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
747 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
748
749 tbi = tq->buf_info + tq->tx_ring.next2fill;
750 tbi->map_type = VMXNET3_MAP_PAGE;
751 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page,
752 frag->page_offset, frag->size,
753 PCI_DMA_TODEVICE);
754
755 tbi->len = frag->size;
756
757 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
758 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
759
760 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
761 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size);
762 gdesc->dword[3] = 0;
763
764 dev_dbg(&adapter->netdev->dev,
765 "txd[%u]: 0x%llu %u %u\n",
766 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
767 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
768 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
769 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
770 }
771
772 ctx->eop_txd = gdesc;
773
774 /* set the last buf_info for the pkt */
775 tbi->skb = skb;
776 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
777 }
778
779
780 /* Init all tx queues */
781 static void
782 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
783 {
784 int i;
785
786 for (i = 0; i < adapter->num_tx_queues; i++)
787 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
788 }
789
790
791 /*
792 * parse and copy relevant protocol headers:
793 * For a tso pkt, relevant headers are L2/3/4 including options
794 * For a pkt requesting csum offloading, they are L2/3 and may include L4
795 * if it's a TCP/UDP pkt
796 *
797 * Returns:
798 * -1: error happens during parsing
799 * 0: protocol headers parsed, but too big to be copied
800 * 1: protocol headers parsed and copied
801 *
802 * Other effects:
803 * 1. related *ctx fields are updated.
804 * 2. ctx->copy_size is # of bytes copied
805 * 3. the portion copied is guaranteed to be in the linear part
806 *
807 */
808 static int
809 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
810 struct vmxnet3_tx_ctx *ctx,
811 struct vmxnet3_adapter *adapter)
812 {
813 struct Vmxnet3_TxDataDesc *tdd;
814
815 if (ctx->mss) { /* TSO */
816 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
817 ctx->l4_hdr_size = ((struct tcphdr *)
818 skb_transport_header(skb))->doff * 4;
819 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
820 } else {
821 if (skb->ip_summed == CHECKSUM_PARTIAL) {
822 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
823
824 if (ctx->ipv4) {
825 struct iphdr *iph = (struct iphdr *)
826 skb_network_header(skb);
827 if (iph->protocol == IPPROTO_TCP)
828 ctx->l4_hdr_size = ((struct tcphdr *)
829 skb_transport_header(skb))->doff * 4;
830 else if (iph->protocol == IPPROTO_UDP)
831 /*
832 * Use tcp header size so that bytes to
833 * be copied are more than required by
834 * the device.
835 */
836 ctx->l4_hdr_size =
837 sizeof(struct tcphdr);
838 else
839 ctx->l4_hdr_size = 0;
840 } else {
841 /* for simplicity, don't copy L4 headers */
842 ctx->l4_hdr_size = 0;
843 }
844 ctx->copy_size = ctx->eth_ip_hdr_size +
845 ctx->l4_hdr_size;
846 } else {
847 ctx->eth_ip_hdr_size = 0;
848 ctx->l4_hdr_size = 0;
849 /* copy as much as allowed */
850 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
851 , skb_headlen(skb));
852 }
853
854 /* make sure headers are accessible directly */
855 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
856 goto err;
857 }
858
859 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
860 tq->stats.oversized_hdr++;
861 ctx->copy_size = 0;
862 return 0;
863 }
864
865 tdd = tq->data_ring.base + tq->tx_ring.next2fill;
866
867 memcpy(tdd->data, skb->data, ctx->copy_size);
868 dev_dbg(&adapter->netdev->dev,
869 "copy %u bytes to dataRing[%u]\n",
870 ctx->copy_size, tq->tx_ring.next2fill);
871 return 1;
872
873 err:
874 return -1;
875 }
876
877
878 static void
879 vmxnet3_prepare_tso(struct sk_buff *skb,
880 struct vmxnet3_tx_ctx *ctx)
881 {
882 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb);
883 if (ctx->ipv4) {
884 struct iphdr *iph = (struct iphdr *)skb_network_header(skb);
885 iph->check = 0;
886 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
887 IPPROTO_TCP, 0);
888 } else {
889 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb);
890 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
891 IPPROTO_TCP, 0);
892 }
893 }
894
895
896 /*
897 * Transmits a pkt thru a given tq
898 * Returns:
899 * NETDEV_TX_OK: descriptors are setup successfully
900 * NETDEV_TX_OK: error occurred, the pkt is dropped
901 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
902 *
903 * Side-effects:
904 * 1. tx ring may be changed
905 * 2. tq stats may be updated accordingly
906 * 3. shared->txNumDeferred may be updated
907 */
908
909 static int
910 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
911 struct vmxnet3_adapter *adapter, struct net_device *netdev)
912 {
913 int ret;
914 u32 count;
915 unsigned long flags;
916 struct vmxnet3_tx_ctx ctx;
917 union Vmxnet3_GenericDesc *gdesc;
918 #ifdef __BIG_ENDIAN_BITFIELD
919 /* Use temporary descriptor to avoid touching bits multiple times */
920 union Vmxnet3_GenericDesc tempTxDesc;
921 #endif
922
923 /* conservatively estimate # of descriptors to use */
924 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) +
925 skb_shinfo(skb)->nr_frags + 1;
926
927 ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP));
928
929 ctx.mss = skb_shinfo(skb)->gso_size;
930 if (ctx.mss) {
931 if (skb_header_cloned(skb)) {
932 if (unlikely(pskb_expand_head(skb, 0, 0,
933 GFP_ATOMIC) != 0)) {
934 tq->stats.drop_tso++;
935 goto drop_pkt;
936 }
937 tq->stats.copy_skb_header++;
938 }
939 vmxnet3_prepare_tso(skb, &ctx);
940 } else {
941 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
942
943 /* non-tso pkts must not use more than
944 * VMXNET3_MAX_TXD_PER_PKT entries
945 */
946 if (skb_linearize(skb) != 0) {
947 tq->stats.drop_too_many_frags++;
948 goto drop_pkt;
949 }
950 tq->stats.linearized++;
951
952 /* recalculate the # of descriptors to use */
953 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
954 }
955 }
956
957 spin_lock_irqsave(&tq->tx_lock, flags);
958
959 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
960 tq->stats.tx_ring_full++;
961 dev_dbg(&adapter->netdev->dev,
962 "tx queue stopped on %s, next2comp %u"
963 " next2fill %u\n", adapter->netdev->name,
964 tq->tx_ring.next2comp, tq->tx_ring.next2fill);
965
966 vmxnet3_tq_stop(tq, adapter);
967 spin_unlock_irqrestore(&tq->tx_lock, flags);
968 return NETDEV_TX_BUSY;
969 }
970
971
972 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
973 if (ret >= 0) {
974 BUG_ON(ret <= 0 && ctx.copy_size != 0);
975 /* hdrs parsed, check against other limits */
976 if (ctx.mss) {
977 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
978 VMXNET3_MAX_TX_BUF_SIZE)) {
979 goto hdr_too_big;
980 }
981 } else {
982 if (skb->ip_summed == CHECKSUM_PARTIAL) {
983 if (unlikely(ctx.eth_ip_hdr_size +
984 skb->csum_offset >
985 VMXNET3_MAX_CSUM_OFFSET)) {
986 goto hdr_too_big;
987 }
988 }
989 }
990 } else {
991 tq->stats.drop_hdr_inspect_err++;
992 goto unlock_drop_pkt;
993 }
994
995 /* fill tx descs related to addr & len */
996 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
997
998 /* setup the EOP desc */
999 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
1000
1001 /* setup the SOP desc */
1002 #ifdef __BIG_ENDIAN_BITFIELD
1003 gdesc = &tempTxDesc;
1004 gdesc->dword[2] = ctx.sop_txd->dword[2];
1005 gdesc->dword[3] = ctx.sop_txd->dword[3];
1006 #else
1007 gdesc = ctx.sop_txd;
1008 #endif
1009 if (ctx.mss) {
1010 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1011 gdesc->txd.om = VMXNET3_OM_TSO;
1012 gdesc->txd.msscof = ctx.mss;
1013 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
1014 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
1015 } else {
1016 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1017 gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1018 gdesc->txd.om = VMXNET3_OM_CSUM;
1019 gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1020 skb->csum_offset;
1021 } else {
1022 gdesc->txd.om = 0;
1023 gdesc->txd.msscof = 0;
1024 }
1025 le32_add_cpu(&tq->shared->txNumDeferred, 1);
1026 }
1027
1028 if (vlan_tx_tag_present(skb)) {
1029 gdesc->txd.ti = 1;
1030 gdesc->txd.tci = vlan_tx_tag_get(skb);
1031 }
1032
1033 /* finally flips the GEN bit of the SOP desc. */
1034 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1035 VMXNET3_TXD_GEN);
1036 #ifdef __BIG_ENDIAN_BITFIELD
1037 /* Finished updating in bitfields of Tx Desc, so write them in original
1038 * place.
1039 */
1040 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1041 (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1042 gdesc = ctx.sop_txd;
1043 #endif
1044 dev_dbg(&adapter->netdev->dev,
1045 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1046 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd -
1047 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1048 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1049
1050 spin_unlock_irqrestore(&tq->tx_lock, flags);
1051
1052 if (le32_to_cpu(tq->shared->txNumDeferred) >=
1053 le32_to_cpu(tq->shared->txThreshold)) {
1054 tq->shared->txNumDeferred = 0;
1055 VMXNET3_WRITE_BAR0_REG(adapter,
1056 VMXNET3_REG_TXPROD + tq->qid * 8,
1057 tq->tx_ring.next2fill);
1058 }
1059
1060 return NETDEV_TX_OK;
1061
1062 hdr_too_big:
1063 tq->stats.drop_oversized_hdr++;
1064 unlock_drop_pkt:
1065 spin_unlock_irqrestore(&tq->tx_lock, flags);
1066 drop_pkt:
1067 tq->stats.drop_total++;
1068 dev_kfree_skb(skb);
1069 return NETDEV_TX_OK;
1070 }
1071
1072
1073 static netdev_tx_t
1074 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1075 {
1076 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1077
1078 BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1079 return vmxnet3_tq_xmit(skb,
1080 &adapter->tx_queue[skb->queue_mapping],
1081 adapter, netdev);
1082 }
1083
1084
1085 static void
1086 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1087 struct sk_buff *skb,
1088 union Vmxnet3_GenericDesc *gdesc)
1089 {
1090 if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) {
1091 /* typical case: TCP/UDP over IP and both csums are correct */
1092 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1093 VMXNET3_RCD_CSUM_OK) {
1094 skb->ip_summed = CHECKSUM_UNNECESSARY;
1095 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1096 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6));
1097 BUG_ON(gdesc->rcd.frg);
1098 } else {
1099 if (gdesc->rcd.csum) {
1100 skb->csum = htons(gdesc->rcd.csum);
1101 skb->ip_summed = CHECKSUM_PARTIAL;
1102 } else {
1103 skb_checksum_none_assert(skb);
1104 }
1105 }
1106 } else {
1107 skb_checksum_none_assert(skb);
1108 }
1109 }
1110
1111
1112 static void
1113 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1114 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter)
1115 {
1116 rq->stats.drop_err++;
1117 if (!rcd->fcs)
1118 rq->stats.drop_fcs++;
1119
1120 rq->stats.drop_total++;
1121
1122 /*
1123 * We do not unmap and chain the rx buffer to the skb.
1124 * We basically pretend this buffer is not used and will be recycled
1125 * by vmxnet3_rq_alloc_rx_buf()
1126 */
1127
1128 /*
1129 * ctx->skb may be NULL if this is the first and the only one
1130 * desc for the pkt
1131 */
1132 if (ctx->skb)
1133 dev_kfree_skb_irq(ctx->skb);
1134
1135 ctx->skb = NULL;
1136 }
1137
1138
1139 static int
1140 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1141 struct vmxnet3_adapter *adapter, int quota)
1142 {
1143 static const u32 rxprod_reg[2] = {
1144 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1145 };
1146 u32 num_rxd = 0;
1147 bool skip_page_frags = false;
1148 struct Vmxnet3_RxCompDesc *rcd;
1149 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1150 #ifdef __BIG_ENDIAN_BITFIELD
1151 struct Vmxnet3_RxDesc rxCmdDesc;
1152 struct Vmxnet3_RxCompDesc rxComp;
1153 #endif
1154 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1155 &rxComp);
1156 while (rcd->gen == rq->comp_ring.gen) {
1157 struct vmxnet3_rx_buf_info *rbi;
1158 struct sk_buff *skb, *new_skb = NULL;
1159 struct page *new_page = NULL;
1160 int num_to_alloc;
1161 struct Vmxnet3_RxDesc *rxd;
1162 u32 idx, ring_idx;
1163 struct vmxnet3_cmd_ring *ring = NULL;
1164 if (num_rxd >= quota) {
1165 /* we may stop even before we see the EOP desc of
1166 * the current pkt
1167 */
1168 break;
1169 }
1170 num_rxd++;
1171 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2);
1172 idx = rcd->rxdIdx;
1173 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1;
1174 ring = rq->rx_ring + ring_idx;
1175 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1176 &rxCmdDesc);
1177 rbi = rq->buf_info[ring_idx] + idx;
1178
1179 BUG_ON(rxd->addr != rbi->dma_addr ||
1180 rxd->len != rbi->len);
1181
1182 if (unlikely(rcd->eop && rcd->err)) {
1183 vmxnet3_rx_error(rq, rcd, ctx, adapter);
1184 goto rcd_done;
1185 }
1186
1187 if (rcd->sop) { /* first buf of the pkt */
1188 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1189 rcd->rqID != rq->qid);
1190
1191 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1192 BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1193
1194 if (unlikely(rcd->len == 0)) {
1195 /* Pretend the rx buffer is skipped. */
1196 BUG_ON(!(rcd->sop && rcd->eop));
1197 dev_dbg(&adapter->netdev->dev,
1198 "rxRing[%u][%u] 0 length\n",
1199 ring_idx, idx);
1200 goto rcd_done;
1201 }
1202
1203 skip_page_frags = false;
1204 ctx->skb = rbi->skb;
1205 new_skb = dev_alloc_skb(rbi->len + NET_IP_ALIGN);
1206 if (new_skb == NULL) {
1207 /* Skb allocation failed, do not handover this
1208 * skb to stack. Reuse it. Drop the existing pkt
1209 */
1210 rq->stats.rx_buf_alloc_failure++;
1211 ctx->skb = NULL;
1212 rq->stats.drop_total++;
1213 skip_page_frags = true;
1214 goto rcd_done;
1215 }
1216
1217 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1218 PCI_DMA_FROMDEVICE);
1219
1220 skb_put(ctx->skb, rcd->len);
1221
1222 /* Immediate refill */
1223 new_skb->dev = adapter->netdev;
1224 skb_reserve(new_skb, NET_IP_ALIGN);
1225 rbi->skb = new_skb;
1226 rbi->dma_addr = pci_map_single(adapter->pdev,
1227 rbi->skb->data, rbi->len,
1228 PCI_DMA_FROMDEVICE);
1229 rxd->addr = cpu_to_le64(rbi->dma_addr);
1230 rxd->len = rbi->len;
1231
1232 } else {
1233 BUG_ON(ctx->skb == NULL && !skip_page_frags);
1234
1235 /* non SOP buffer must be type 1 in most cases */
1236 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1237 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1238
1239 /* If an sop buffer was dropped, skip all
1240 * following non-sop fragments. They will be reused.
1241 */
1242 if (skip_page_frags)
1243 goto rcd_done;
1244
1245 new_page = alloc_page(GFP_ATOMIC);
1246 if (unlikely(new_page == NULL)) {
1247 /* Replacement page frag could not be allocated.
1248 * Reuse this page. Drop the pkt and free the
1249 * skb which contained this page as a frag. Skip
1250 * processing all the following non-sop frags.
1251 */
1252 rq->stats.rx_buf_alloc_failure++;
1253 dev_kfree_skb(ctx->skb);
1254 ctx->skb = NULL;
1255 skip_page_frags = true;
1256 goto rcd_done;
1257 }
1258
1259 if (rcd->len) {
1260 pci_unmap_page(adapter->pdev,
1261 rbi->dma_addr, rbi->len,
1262 PCI_DMA_FROMDEVICE);
1263
1264 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1265 }
1266
1267 /* Immediate refill */
1268 rbi->page = new_page;
1269 rbi->dma_addr = pci_map_page(adapter->pdev, rbi->page,
1270 0, PAGE_SIZE,
1271 PCI_DMA_FROMDEVICE);
1272 rxd->addr = cpu_to_le64(rbi->dma_addr);
1273 rxd->len = rbi->len;
1274 }
1275
1276
1277 skb = ctx->skb;
1278 if (rcd->eop) {
1279 skb->len += skb->data_len;
1280 skb->truesize += skb->data_len;
1281
1282 vmxnet3_rx_csum(adapter, skb,
1283 (union Vmxnet3_GenericDesc *)rcd);
1284 skb->protocol = eth_type_trans(skb, adapter->netdev);
1285
1286 if (unlikely(rcd->ts))
1287 __vlan_hwaccel_put_tag(skb, rcd->tci);
1288
1289 if (adapter->netdev->features & NETIF_F_LRO)
1290 netif_receive_skb(skb);
1291 else
1292 napi_gro_receive(&rq->napi, skb);
1293
1294 ctx->skb = NULL;
1295 }
1296
1297 rcd_done:
1298 /* device may have skipped some rx descs */
1299 ring->next2comp = idx;
1300 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1301 ring = rq->rx_ring + ring_idx;
1302 while (num_to_alloc) {
1303 vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1304 &rxCmdDesc);
1305 BUG_ON(!rxd->addr);
1306
1307 /* Recv desc is ready to be used by the device */
1308 rxd->gen = ring->gen;
1309 vmxnet3_cmd_ring_adv_next2fill(ring);
1310 num_to_alloc--;
1311 }
1312
1313 /* if needed, update the register */
1314 if (unlikely(rq->shared->updateRxProd)) {
1315 VMXNET3_WRITE_BAR0_REG(adapter,
1316 rxprod_reg[ring_idx] + rq->qid * 8,
1317 ring->next2fill);
1318 rq->uncommitted[ring_idx] = 0;
1319 }
1320
1321 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1322 vmxnet3_getRxComp(rcd,
1323 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1324 }
1325
1326 return num_rxd;
1327 }
1328
1329
1330 static void
1331 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1332 struct vmxnet3_adapter *adapter)
1333 {
1334 u32 i, ring_idx;
1335 struct Vmxnet3_RxDesc *rxd;
1336
1337 for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1338 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1339 #ifdef __BIG_ENDIAN_BITFIELD
1340 struct Vmxnet3_RxDesc rxDesc;
1341 #endif
1342 vmxnet3_getRxDesc(rxd,
1343 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1344
1345 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1346 rq->buf_info[ring_idx][i].skb) {
1347 pci_unmap_single(adapter->pdev, rxd->addr,
1348 rxd->len, PCI_DMA_FROMDEVICE);
1349 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1350 rq->buf_info[ring_idx][i].skb = NULL;
1351 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1352 rq->buf_info[ring_idx][i].page) {
1353 pci_unmap_page(adapter->pdev, rxd->addr,
1354 rxd->len, PCI_DMA_FROMDEVICE);
1355 put_page(rq->buf_info[ring_idx][i].page);
1356 rq->buf_info[ring_idx][i].page = NULL;
1357 }
1358 }
1359
1360 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1361 rq->rx_ring[ring_idx].next2fill =
1362 rq->rx_ring[ring_idx].next2comp = 0;
1363 rq->uncommitted[ring_idx] = 0;
1364 }
1365
1366 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1367 rq->comp_ring.next2proc = 0;
1368 }
1369
1370
1371 static void
1372 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1373 {
1374 int i;
1375
1376 for (i = 0; i < adapter->num_rx_queues; i++)
1377 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1378 }
1379
1380
1381 void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1382 struct vmxnet3_adapter *adapter)
1383 {
1384 int i;
1385 int j;
1386
1387 /* all rx buffers must have already been freed */
1388 for (i = 0; i < 2; i++) {
1389 if (rq->buf_info[i]) {
1390 for (j = 0; j < rq->rx_ring[i].size; j++)
1391 BUG_ON(rq->buf_info[i][j].page != NULL);
1392 }
1393 }
1394
1395
1396 kfree(rq->buf_info[0]);
1397
1398 for (i = 0; i < 2; i++) {
1399 if (rq->rx_ring[i].base) {
1400 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1401 * sizeof(struct Vmxnet3_RxDesc),
1402 rq->rx_ring[i].base,
1403 rq->rx_ring[i].basePA);
1404 rq->rx_ring[i].base = NULL;
1405 }
1406 rq->buf_info[i] = NULL;
1407 }
1408
1409 if (rq->comp_ring.base) {
1410 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1411 sizeof(struct Vmxnet3_RxCompDesc),
1412 rq->comp_ring.base, rq->comp_ring.basePA);
1413 rq->comp_ring.base = NULL;
1414 }
1415 }
1416
1417
1418 static int
1419 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1420 struct vmxnet3_adapter *adapter)
1421 {
1422 int i;
1423
1424 /* initialize buf_info */
1425 for (i = 0; i < rq->rx_ring[0].size; i++) {
1426
1427 /* 1st buf for a pkt is skbuff */
1428 if (i % adapter->rx_buf_per_pkt == 0) {
1429 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1430 rq->buf_info[0][i].len = adapter->skb_buf_size;
1431 } else { /* subsequent bufs for a pkt is frag */
1432 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1433 rq->buf_info[0][i].len = PAGE_SIZE;
1434 }
1435 }
1436 for (i = 0; i < rq->rx_ring[1].size; i++) {
1437 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1438 rq->buf_info[1][i].len = PAGE_SIZE;
1439 }
1440
1441 /* reset internal state and allocate buffers for both rings */
1442 for (i = 0; i < 2; i++) {
1443 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1444 rq->uncommitted[i] = 0;
1445
1446 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1447 sizeof(struct Vmxnet3_RxDesc));
1448 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1449 }
1450 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1451 adapter) == 0) {
1452 /* at least has 1 rx buffer for the 1st ring */
1453 return -ENOMEM;
1454 }
1455 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1456
1457 /* reset the comp ring */
1458 rq->comp_ring.next2proc = 0;
1459 memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1460 sizeof(struct Vmxnet3_RxCompDesc));
1461 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1462
1463 /* reset rxctx */
1464 rq->rx_ctx.skb = NULL;
1465
1466 /* stats are not reset */
1467 return 0;
1468 }
1469
1470
1471 static int
1472 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1473 {
1474 int i, err = 0;
1475
1476 for (i = 0; i < adapter->num_rx_queues; i++) {
1477 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1478 if (unlikely(err)) {
1479 dev_err(&adapter->netdev->dev, "%s: failed to "
1480 "initialize rx queue%i\n",
1481 adapter->netdev->name, i);
1482 break;
1483 }
1484 }
1485 return err;
1486
1487 }
1488
1489
1490 static int
1491 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1492 {
1493 int i;
1494 size_t sz;
1495 struct vmxnet3_rx_buf_info *bi;
1496
1497 for (i = 0; i < 2; i++) {
1498
1499 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1500 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1501 &rq->rx_ring[i].basePA);
1502 if (!rq->rx_ring[i].base) {
1503 printk(KERN_ERR "%s: failed to allocate rx ring %d\n",
1504 adapter->netdev->name, i);
1505 goto err;
1506 }
1507 }
1508
1509 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1510 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1511 &rq->comp_ring.basePA);
1512 if (!rq->comp_ring.base) {
1513 printk(KERN_ERR "%s: failed to allocate rx comp ring\n",
1514 adapter->netdev->name);
1515 goto err;
1516 }
1517
1518 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1519 rq->rx_ring[1].size);
1520 bi = kzalloc(sz, GFP_KERNEL);
1521 if (!bi) {
1522 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n",
1523 adapter->netdev->name);
1524 goto err;
1525 }
1526 rq->buf_info[0] = bi;
1527 rq->buf_info[1] = bi + rq->rx_ring[0].size;
1528
1529 return 0;
1530
1531 err:
1532 vmxnet3_rq_destroy(rq, adapter);
1533 return -ENOMEM;
1534 }
1535
1536
1537 static int
1538 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1539 {
1540 int i, err = 0;
1541
1542 for (i = 0; i < adapter->num_rx_queues; i++) {
1543 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1544 if (unlikely(err)) {
1545 dev_err(&adapter->netdev->dev,
1546 "%s: failed to create rx queue%i\n",
1547 adapter->netdev->name, i);
1548 goto err_out;
1549 }
1550 }
1551 return err;
1552 err_out:
1553 vmxnet3_rq_destroy_all(adapter);
1554 return err;
1555
1556 }
1557
1558 /* Multiple queue aware polling function for tx and rx */
1559
1560 static int
1561 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1562 {
1563 int rcd_done = 0, i;
1564 if (unlikely(adapter->shared->ecr))
1565 vmxnet3_process_events(adapter);
1566 for (i = 0; i < adapter->num_tx_queues; i++)
1567 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1568
1569 for (i = 0; i < adapter->num_rx_queues; i++)
1570 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1571 adapter, budget);
1572 return rcd_done;
1573 }
1574
1575
1576 static int
1577 vmxnet3_poll(struct napi_struct *napi, int budget)
1578 {
1579 struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1580 struct vmxnet3_rx_queue, napi);
1581 int rxd_done;
1582
1583 rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1584
1585 if (rxd_done < budget) {
1586 napi_complete(napi);
1587 vmxnet3_enable_all_intrs(rx_queue->adapter);
1588 }
1589 return rxd_done;
1590 }
1591
1592 /*
1593 * NAPI polling function for MSI-X mode with multiple Rx queues
1594 * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1595 */
1596
1597 static int
1598 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1599 {
1600 struct vmxnet3_rx_queue *rq = container_of(napi,
1601 struct vmxnet3_rx_queue, napi);
1602 struct vmxnet3_adapter *adapter = rq->adapter;
1603 int rxd_done;
1604
1605 /* When sharing interrupt with corresponding tx queue, process
1606 * tx completions in that queue as well
1607 */
1608 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1609 struct vmxnet3_tx_queue *tq =
1610 &adapter->tx_queue[rq - adapter->rx_queue];
1611 vmxnet3_tq_tx_complete(tq, adapter);
1612 }
1613
1614 rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1615
1616 if (rxd_done < budget) {
1617 napi_complete(napi);
1618 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1619 }
1620 return rxd_done;
1621 }
1622
1623
1624 #ifdef CONFIG_PCI_MSI
1625
1626 /*
1627 * Handle completion interrupts on tx queues
1628 * Returns whether or not the intr is handled
1629 */
1630
1631 static irqreturn_t
1632 vmxnet3_msix_tx(int irq, void *data)
1633 {
1634 struct vmxnet3_tx_queue *tq = data;
1635 struct vmxnet3_adapter *adapter = tq->adapter;
1636
1637 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1638 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1639
1640 /* Handle the case where only one irq is allocate for all tx queues */
1641 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1642 int i;
1643 for (i = 0; i < adapter->num_tx_queues; i++) {
1644 struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1645 vmxnet3_tq_tx_complete(txq, adapter);
1646 }
1647 } else {
1648 vmxnet3_tq_tx_complete(tq, adapter);
1649 }
1650 vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1651
1652 return IRQ_HANDLED;
1653 }
1654
1655
1656 /*
1657 * Handle completion interrupts on rx queues. Returns whether or not the
1658 * intr is handled
1659 */
1660
1661 static irqreturn_t
1662 vmxnet3_msix_rx(int irq, void *data)
1663 {
1664 struct vmxnet3_rx_queue *rq = data;
1665 struct vmxnet3_adapter *adapter = rq->adapter;
1666
1667 /* disable intr if needed */
1668 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1669 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1670 napi_schedule(&rq->napi);
1671
1672 return IRQ_HANDLED;
1673 }
1674
1675 /*
1676 *----------------------------------------------------------------------------
1677 *
1678 * vmxnet3_msix_event --
1679 *
1680 * vmxnet3 msix event intr handler
1681 *
1682 * Result:
1683 * whether or not the intr is handled
1684 *
1685 *----------------------------------------------------------------------------
1686 */
1687
1688 static irqreturn_t
1689 vmxnet3_msix_event(int irq, void *data)
1690 {
1691 struct net_device *dev = data;
1692 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1693
1694 /* disable intr if needed */
1695 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1696 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
1697
1698 if (adapter->shared->ecr)
1699 vmxnet3_process_events(adapter);
1700
1701 vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
1702
1703 return IRQ_HANDLED;
1704 }
1705
1706 #endif /* CONFIG_PCI_MSI */
1707
1708
1709 /* Interrupt handler for vmxnet3 */
1710 static irqreturn_t
1711 vmxnet3_intr(int irq, void *dev_id)
1712 {
1713 struct net_device *dev = dev_id;
1714 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1715
1716 if (adapter->intr.type == VMXNET3_IT_INTX) {
1717 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1718 if (unlikely(icr == 0))
1719 /* not ours */
1720 return IRQ_NONE;
1721 }
1722
1723
1724 /* disable intr if needed */
1725 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1726 vmxnet3_disable_all_intrs(adapter);
1727
1728 napi_schedule(&adapter->rx_queue[0].napi);
1729
1730 return IRQ_HANDLED;
1731 }
1732
1733 #ifdef CONFIG_NET_POLL_CONTROLLER
1734
1735 /* netpoll callback. */
1736 static void
1737 vmxnet3_netpoll(struct net_device *netdev)
1738 {
1739 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1740
1741 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1742 vmxnet3_disable_all_intrs(adapter);
1743
1744 vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size);
1745 vmxnet3_enable_all_intrs(adapter);
1746
1747 }
1748 #endif /* CONFIG_NET_POLL_CONTROLLER */
1749
1750 static int
1751 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1752 {
1753 struct vmxnet3_intr *intr = &adapter->intr;
1754 int err = 0, i;
1755 int vector = 0;
1756
1757 #ifdef CONFIG_PCI_MSI
1758 if (adapter->intr.type == VMXNET3_IT_MSIX) {
1759 for (i = 0; i < adapter->num_tx_queues; i++) {
1760 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1761 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
1762 adapter->netdev->name, vector);
1763 err = request_irq(
1764 intr->msix_entries[vector].vector,
1765 vmxnet3_msix_tx, 0,
1766 adapter->tx_queue[i].name,
1767 &adapter->tx_queue[i]);
1768 } else {
1769 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
1770 adapter->netdev->name, vector);
1771 }
1772 if (err) {
1773 dev_err(&adapter->netdev->dev,
1774 "Failed to request irq for MSIX, %s, "
1775 "error %d\n",
1776 adapter->tx_queue[i].name, err);
1777 return err;
1778 }
1779
1780 /* Handle the case where only 1 MSIx was allocated for
1781 * all tx queues */
1782 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1783 for (; i < adapter->num_tx_queues; i++)
1784 adapter->tx_queue[i].comp_ring.intr_idx
1785 = vector;
1786 vector++;
1787 break;
1788 } else {
1789 adapter->tx_queue[i].comp_ring.intr_idx
1790 = vector++;
1791 }
1792 }
1793 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
1794 vector = 0;
1795
1796 for (i = 0; i < adapter->num_rx_queues; i++) {
1797 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
1798 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
1799 adapter->netdev->name, vector);
1800 else
1801 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
1802 adapter->netdev->name, vector);
1803 err = request_irq(intr->msix_entries[vector].vector,
1804 vmxnet3_msix_rx, 0,
1805 adapter->rx_queue[i].name,
1806 &(adapter->rx_queue[i]));
1807 if (err) {
1808 printk(KERN_ERR "Failed to request irq for MSIX"
1809 ", %s, error %d\n",
1810 adapter->rx_queue[i].name, err);
1811 return err;
1812 }
1813
1814 adapter->rx_queue[i].comp_ring.intr_idx = vector++;
1815 }
1816
1817 sprintf(intr->event_msi_vector_name, "%s-event-%d",
1818 adapter->netdev->name, vector);
1819 err = request_irq(intr->msix_entries[vector].vector,
1820 vmxnet3_msix_event, 0,
1821 intr->event_msi_vector_name, adapter->netdev);
1822 intr->event_intr_idx = vector;
1823
1824 } else if (intr->type == VMXNET3_IT_MSI) {
1825 adapter->num_rx_queues = 1;
1826 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1827 adapter->netdev->name, adapter->netdev);
1828 } else {
1829 #endif
1830 adapter->num_rx_queues = 1;
1831 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1832 IRQF_SHARED, adapter->netdev->name,
1833 adapter->netdev);
1834 #ifdef CONFIG_PCI_MSI
1835 }
1836 #endif
1837 intr->num_intrs = vector + 1;
1838 if (err) {
1839 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error"
1840 ":%d\n", adapter->netdev->name, intr->type, err);
1841 } else {
1842 /* Number of rx queues will not change after this */
1843 for (i = 0; i < adapter->num_rx_queues; i++) {
1844 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
1845 rq->qid = i;
1846 rq->qid2 = i + adapter->num_rx_queues;
1847 }
1848
1849
1850
1851 /* init our intr settings */
1852 for (i = 0; i < intr->num_intrs; i++)
1853 intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
1854 if (adapter->intr.type != VMXNET3_IT_MSIX) {
1855 adapter->intr.event_intr_idx = 0;
1856 for (i = 0; i < adapter->num_tx_queues; i++)
1857 adapter->tx_queue[i].comp_ring.intr_idx = 0;
1858 adapter->rx_queue[0].comp_ring.intr_idx = 0;
1859 }
1860
1861 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors "
1862 "allocated\n", adapter->netdev->name, intr->type,
1863 intr->mask_mode, intr->num_intrs);
1864 }
1865
1866 return err;
1867 }
1868
1869
1870 static void
1871 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1872 {
1873 struct vmxnet3_intr *intr = &adapter->intr;
1874 BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
1875
1876 switch (intr->type) {
1877 #ifdef CONFIG_PCI_MSI
1878 case VMXNET3_IT_MSIX:
1879 {
1880 int i, vector = 0;
1881
1882 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1883 for (i = 0; i < adapter->num_tx_queues; i++) {
1884 free_irq(intr->msix_entries[vector++].vector,
1885 &(adapter->tx_queue[i]));
1886 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
1887 break;
1888 }
1889 }
1890
1891 for (i = 0; i < adapter->num_rx_queues; i++) {
1892 free_irq(intr->msix_entries[vector++].vector,
1893 &(adapter->rx_queue[i]));
1894 }
1895
1896 free_irq(intr->msix_entries[vector].vector,
1897 adapter->netdev);
1898 BUG_ON(vector >= intr->num_intrs);
1899 break;
1900 }
1901 #endif
1902 case VMXNET3_IT_MSI:
1903 free_irq(adapter->pdev->irq, adapter->netdev);
1904 break;
1905 case VMXNET3_IT_INTX:
1906 free_irq(adapter->pdev->irq, adapter->netdev);
1907 break;
1908 default:
1909 BUG_ON(true);
1910 }
1911 }
1912
1913
1914 static void
1915 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1916 {
1917 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1918 u16 vid;
1919
1920 /* allow untagged pkts */
1921 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1922
1923 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1924 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1925 }
1926
1927
1928 static void
1929 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1930 {
1931 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1932
1933 if (!(netdev->flags & IFF_PROMISC)) {
1934 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1935 unsigned long flags;
1936
1937 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1938 spin_lock_irqsave(&adapter->cmd_lock, flags);
1939 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1940 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1941 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1942 }
1943
1944 set_bit(vid, adapter->active_vlans);
1945 }
1946
1947
1948 static void
1949 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1950 {
1951 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1952
1953 if (!(netdev->flags & IFF_PROMISC)) {
1954 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1955 unsigned long flags;
1956
1957 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1958 spin_lock_irqsave(&adapter->cmd_lock, flags);
1959 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1960 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1961 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1962 }
1963
1964 clear_bit(vid, adapter->active_vlans);
1965 }
1966
1967
1968 static u8 *
1969 vmxnet3_copy_mc(struct net_device *netdev)
1970 {
1971 u8 *buf = NULL;
1972 u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
1973
1974 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1975 if (sz <= 0xffff) {
1976 /* We may be called with BH disabled */
1977 buf = kmalloc(sz, GFP_ATOMIC);
1978 if (buf) {
1979 struct netdev_hw_addr *ha;
1980 int i = 0;
1981
1982 netdev_for_each_mc_addr(ha, netdev)
1983 memcpy(buf + i++ * ETH_ALEN, ha->addr,
1984 ETH_ALEN);
1985 }
1986 }
1987 return buf;
1988 }
1989
1990
1991 static void
1992 vmxnet3_set_mc(struct net_device *netdev)
1993 {
1994 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1995 unsigned long flags;
1996 struct Vmxnet3_RxFilterConf *rxConf =
1997 &adapter->shared->devRead.rxFilterConf;
1998 u8 *new_table = NULL;
1999 u32 new_mode = VMXNET3_RXM_UCAST;
2000
2001 if (netdev->flags & IFF_PROMISC) {
2002 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2003 memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable));
2004
2005 new_mode |= VMXNET3_RXM_PROMISC;
2006 } else {
2007 vmxnet3_restore_vlan(adapter);
2008 }
2009
2010 if (netdev->flags & IFF_BROADCAST)
2011 new_mode |= VMXNET3_RXM_BCAST;
2012
2013 if (netdev->flags & IFF_ALLMULTI)
2014 new_mode |= VMXNET3_RXM_ALL_MULTI;
2015 else
2016 if (!netdev_mc_empty(netdev)) {
2017 new_table = vmxnet3_copy_mc(netdev);
2018 if (new_table) {
2019 new_mode |= VMXNET3_RXM_MCAST;
2020 rxConf->mfTableLen = cpu_to_le16(
2021 netdev_mc_count(netdev) * ETH_ALEN);
2022 rxConf->mfTablePA = cpu_to_le64(virt_to_phys(
2023 new_table));
2024 } else {
2025 printk(KERN_INFO "%s: failed to copy mcast list"
2026 ", setting ALL_MULTI\n", netdev->name);
2027 new_mode |= VMXNET3_RXM_ALL_MULTI;
2028 }
2029 }
2030
2031
2032 if (!(new_mode & VMXNET3_RXM_MCAST)) {
2033 rxConf->mfTableLen = 0;
2034 rxConf->mfTablePA = 0;
2035 }
2036
2037 spin_lock_irqsave(&adapter->cmd_lock, flags);
2038 if (new_mode != rxConf->rxMode) {
2039 rxConf->rxMode = cpu_to_le32(new_mode);
2040 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2041 VMXNET3_CMD_UPDATE_RX_MODE);
2042 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2043 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2044 }
2045
2046 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2047 VMXNET3_CMD_UPDATE_MAC_FILTERS);
2048 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2049
2050 kfree(new_table);
2051 }
2052
2053 void
2054 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2055 {
2056 int i;
2057
2058 for (i = 0; i < adapter->num_rx_queues; i++)
2059 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2060 }
2061
2062
2063 /*
2064 * Set up driver_shared based on settings in adapter.
2065 */
2066
2067 static void
2068 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2069 {
2070 struct Vmxnet3_DriverShared *shared = adapter->shared;
2071 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2072 struct Vmxnet3_TxQueueConf *tqc;
2073 struct Vmxnet3_RxQueueConf *rqc;
2074 int i;
2075
2076 memset(shared, 0, sizeof(*shared));
2077
2078 /* driver settings */
2079 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2080 devRead->misc.driverInfo.version = cpu_to_le32(
2081 VMXNET3_DRIVER_VERSION_NUM);
2082 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2083 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2084 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2085 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2086 *((u32 *)&devRead->misc.driverInfo.gos));
2087 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2088 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2089
2090 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter));
2091 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2092
2093 /* set up feature flags */
2094 if (adapter->netdev->features & NETIF_F_RXCSUM)
2095 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2096
2097 if (adapter->netdev->features & NETIF_F_LRO) {
2098 devRead->misc.uptFeatures |= UPT1_F_LRO;
2099 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2100 }
2101 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX)
2102 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2103
2104 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2105 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2106 devRead->misc.queueDescLen = cpu_to_le32(
2107 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2108 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2109
2110 /* tx queue settings */
2111 devRead->misc.numTxQueues = adapter->num_tx_queues;
2112 for (i = 0; i < adapter->num_tx_queues; i++) {
2113 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2114 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2115 tqc = &adapter->tqd_start[i].conf;
2116 tqc->txRingBasePA = cpu_to_le64(tq->tx_ring.basePA);
2117 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2118 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2119 tqc->ddPA = cpu_to_le64(virt_to_phys(tq->buf_info));
2120 tqc->txRingSize = cpu_to_le32(tq->tx_ring.size);
2121 tqc->dataRingSize = cpu_to_le32(tq->data_ring.size);
2122 tqc->compRingSize = cpu_to_le32(tq->comp_ring.size);
2123 tqc->ddLen = cpu_to_le32(
2124 sizeof(struct vmxnet3_tx_buf_info) *
2125 tqc->txRingSize);
2126 tqc->intrIdx = tq->comp_ring.intr_idx;
2127 }
2128
2129 /* rx queue settings */
2130 devRead->misc.numRxQueues = adapter->num_rx_queues;
2131 for (i = 0; i < adapter->num_rx_queues; i++) {
2132 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2133 rqc = &adapter->rqd_start[i].conf;
2134 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2135 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2136 rqc->compRingBasePA = cpu_to_le64(rq->comp_ring.basePA);
2137 rqc->ddPA = cpu_to_le64(virt_to_phys(
2138 rq->buf_info));
2139 rqc->rxRingSize[0] = cpu_to_le32(rq->rx_ring[0].size);
2140 rqc->rxRingSize[1] = cpu_to_le32(rq->rx_ring[1].size);
2141 rqc->compRingSize = cpu_to_le32(rq->comp_ring.size);
2142 rqc->ddLen = cpu_to_le32(
2143 sizeof(struct vmxnet3_rx_buf_info) *
2144 (rqc->rxRingSize[0] +
2145 rqc->rxRingSize[1]));
2146 rqc->intrIdx = rq->comp_ring.intr_idx;
2147 }
2148
2149 #ifdef VMXNET3_RSS
2150 memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2151
2152 if (adapter->rss) {
2153 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2154 devRead->misc.uptFeatures |= UPT1_F_RSS;
2155 devRead->misc.numRxQueues = adapter->num_rx_queues;
2156 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2157 UPT1_RSS_HASH_TYPE_IPV4 |
2158 UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2159 UPT1_RSS_HASH_TYPE_IPV6;
2160 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2161 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2162 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2163 get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize);
2164 for (i = 0; i < rssConf->indTableSize; i++)
2165 rssConf->indTable[i] = i % adapter->num_rx_queues;
2166
2167 devRead->rssConfDesc.confVer = 1;
2168 devRead->rssConfDesc.confLen = sizeof(*rssConf);
2169 devRead->rssConfDesc.confPA = virt_to_phys(rssConf);
2170 }
2171
2172 #endif /* VMXNET3_RSS */
2173
2174 /* intr settings */
2175 devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2176 VMXNET3_IMM_AUTO;
2177 devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2178 for (i = 0; i < adapter->intr.num_intrs; i++)
2179 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2180
2181 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2182 devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2183
2184 /* rx filter settings */
2185 devRead->rxFilterConf.rxMode = 0;
2186 vmxnet3_restore_vlan(adapter);
2187 vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2188
2189 /* the rest are already zeroed */
2190 }
2191
2192
2193 int
2194 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2195 {
2196 int err, i;
2197 u32 ret;
2198 unsigned long flags;
2199
2200 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2201 " ring sizes %u %u %u\n", adapter->netdev->name,
2202 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2203 adapter->tx_queue[0].tx_ring.size,
2204 adapter->rx_queue[0].rx_ring[0].size,
2205 adapter->rx_queue[0].rx_ring[1].size);
2206
2207 vmxnet3_tq_init_all(adapter);
2208 err = vmxnet3_rq_init_all(adapter);
2209 if (err) {
2210 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n",
2211 adapter->netdev->name, err);
2212 goto rq_err;
2213 }
2214
2215 err = vmxnet3_request_irqs(adapter);
2216 if (err) {
2217 printk(KERN_ERR "Failed to setup irq for %s: error %d\n",
2218 adapter->netdev->name, err);
2219 goto irq_err;
2220 }
2221
2222 vmxnet3_setup_driver_shared(adapter);
2223
2224 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2225 adapter->shared_pa));
2226 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2227 adapter->shared_pa));
2228 spin_lock_irqsave(&adapter->cmd_lock, flags);
2229 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2230 VMXNET3_CMD_ACTIVATE_DEV);
2231 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2232 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2233
2234 if (ret != 0) {
2235 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
2236 adapter->netdev->name, ret);
2237 err = -EINVAL;
2238 goto activate_err;
2239 }
2240
2241 for (i = 0; i < adapter->num_rx_queues; i++) {
2242 VMXNET3_WRITE_BAR0_REG(adapter,
2243 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2244 adapter->rx_queue[i].rx_ring[0].next2fill);
2245 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2246 (i * VMXNET3_REG_ALIGN)),
2247 adapter->rx_queue[i].rx_ring[1].next2fill);
2248 }
2249
2250 /* Apply the rx filter settins last. */
2251 vmxnet3_set_mc(adapter->netdev);
2252
2253 /*
2254 * Check link state when first activating device. It will start the
2255 * tx queue if the link is up.
2256 */
2257 vmxnet3_check_link(adapter, true);
2258 for (i = 0; i < adapter->num_rx_queues; i++)
2259 napi_enable(&adapter->rx_queue[i].napi);
2260 vmxnet3_enable_all_intrs(adapter);
2261 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2262 return 0;
2263
2264 activate_err:
2265 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2266 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2267 vmxnet3_free_irqs(adapter);
2268 irq_err:
2269 rq_err:
2270 /* free up buffers we allocated */
2271 vmxnet3_rq_cleanup_all(adapter);
2272 return err;
2273 }
2274
2275
2276 void
2277 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2278 {
2279 unsigned long flags;
2280 spin_lock_irqsave(&adapter->cmd_lock, flags);
2281 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2282 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2283 }
2284
2285
2286 int
2287 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2288 {
2289 int i;
2290 unsigned long flags;
2291 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2292 return 0;
2293
2294
2295 spin_lock_irqsave(&adapter->cmd_lock, flags);
2296 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2297 VMXNET3_CMD_QUIESCE_DEV);
2298 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2299 vmxnet3_disable_all_intrs(adapter);
2300
2301 for (i = 0; i < adapter->num_rx_queues; i++)
2302 napi_disable(&adapter->rx_queue[i].napi);
2303 netif_tx_disable(adapter->netdev);
2304 adapter->link_speed = 0;
2305 netif_carrier_off(adapter->netdev);
2306
2307 vmxnet3_tq_cleanup_all(adapter);
2308 vmxnet3_rq_cleanup_all(adapter);
2309 vmxnet3_free_irqs(adapter);
2310 return 0;
2311 }
2312
2313
2314 static void
2315 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2316 {
2317 u32 tmp;
2318
2319 tmp = *(u32 *)mac;
2320 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2321
2322 tmp = (mac[5] << 8) | mac[4];
2323 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2324 }
2325
2326
2327 static int
2328 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2329 {
2330 struct sockaddr *addr = p;
2331 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2332
2333 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2334 vmxnet3_write_mac_addr(adapter, addr->sa_data);
2335
2336 return 0;
2337 }
2338
2339
2340 /* ==================== initialization and cleanup routines ============ */
2341
2342 static int
2343 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
2344 {
2345 int err;
2346 unsigned long mmio_start, mmio_len;
2347 struct pci_dev *pdev = adapter->pdev;
2348
2349 err = pci_enable_device(pdev);
2350 if (err) {
2351 printk(KERN_ERR "Failed to enable adapter %s: error %d\n",
2352 pci_name(pdev), err);
2353 return err;
2354 }
2355
2356 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
2357 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
2358 printk(KERN_ERR "pci_set_consistent_dma_mask failed "
2359 "for adapter %s\n", pci_name(pdev));
2360 err = -EIO;
2361 goto err_set_mask;
2362 }
2363 *dma64 = true;
2364 } else {
2365 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2366 printk(KERN_ERR "pci_set_dma_mask failed for adapter "
2367 "%s\n", pci_name(pdev));
2368 err = -EIO;
2369 goto err_set_mask;
2370 }
2371 *dma64 = false;
2372 }
2373
2374 err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2375 vmxnet3_driver_name);
2376 if (err) {
2377 printk(KERN_ERR "Failed to request region for adapter %s: "
2378 "error %d\n", pci_name(pdev), err);
2379 goto err_set_mask;
2380 }
2381
2382 pci_set_master(pdev);
2383
2384 mmio_start = pci_resource_start(pdev, 0);
2385 mmio_len = pci_resource_len(pdev, 0);
2386 adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2387 if (!adapter->hw_addr0) {
2388 printk(KERN_ERR "Failed to map bar0 for adapter %s\n",
2389 pci_name(pdev));
2390 err = -EIO;
2391 goto err_ioremap;
2392 }
2393
2394 mmio_start = pci_resource_start(pdev, 1);
2395 mmio_len = pci_resource_len(pdev, 1);
2396 adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2397 if (!adapter->hw_addr1) {
2398 printk(KERN_ERR "Failed to map bar1 for adapter %s\n",
2399 pci_name(pdev));
2400 err = -EIO;
2401 goto err_bar1;
2402 }
2403 return 0;
2404
2405 err_bar1:
2406 iounmap(adapter->hw_addr0);
2407 err_ioremap:
2408 pci_release_selected_regions(pdev, (1 << 2) - 1);
2409 err_set_mask:
2410 pci_disable_device(pdev);
2411 return err;
2412 }
2413
2414
2415 static void
2416 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2417 {
2418 BUG_ON(!adapter->pdev);
2419
2420 iounmap(adapter->hw_addr0);
2421 iounmap(adapter->hw_addr1);
2422 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2423 pci_disable_device(adapter->pdev);
2424 }
2425
2426
2427 static void
2428 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2429 {
2430 size_t sz, i, ring0_size, ring1_size, comp_size;
2431 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0];
2432
2433
2434 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2435 VMXNET3_MAX_ETH_HDR_SIZE) {
2436 adapter->skb_buf_size = adapter->netdev->mtu +
2437 VMXNET3_MAX_ETH_HDR_SIZE;
2438 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2439 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2440
2441 adapter->rx_buf_per_pkt = 1;
2442 } else {
2443 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2444 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2445 VMXNET3_MAX_ETH_HDR_SIZE;
2446 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2447 }
2448
2449 /*
2450 * for simplicity, force the ring0 size to be a multiple of
2451 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2452 */
2453 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2454 ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2455 ring0_size = (ring0_size + sz - 1) / sz * sz;
2456 ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2457 sz * sz);
2458 ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2459 comp_size = ring0_size + ring1_size;
2460
2461 for (i = 0; i < adapter->num_rx_queues; i++) {
2462 rq = &adapter->rx_queue[i];
2463 rq->rx_ring[0].size = ring0_size;
2464 rq->rx_ring[1].size = ring1_size;
2465 rq->comp_ring.size = comp_size;
2466 }
2467 }
2468
2469
2470 int
2471 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2472 u32 rx_ring_size, u32 rx_ring2_size)
2473 {
2474 int err = 0, i;
2475
2476 for (i = 0; i < adapter->num_tx_queues; i++) {
2477 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2478 tq->tx_ring.size = tx_ring_size;
2479 tq->data_ring.size = tx_ring_size;
2480 tq->comp_ring.size = tx_ring_size;
2481 tq->shared = &adapter->tqd_start[i].ctrl;
2482 tq->stopped = true;
2483 tq->adapter = adapter;
2484 tq->qid = i;
2485 err = vmxnet3_tq_create(tq, adapter);
2486 /*
2487 * Too late to change num_tx_queues. We cannot do away with
2488 * lesser number of queues than what we asked for
2489 */
2490 if (err)
2491 goto queue_err;
2492 }
2493
2494 adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2495 adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2496 vmxnet3_adjust_rx_ring_size(adapter);
2497 for (i = 0; i < adapter->num_rx_queues; i++) {
2498 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2499 /* qid and qid2 for rx queues will be assigned later when num
2500 * of rx queues is finalized after allocating intrs */
2501 rq->shared = &adapter->rqd_start[i].ctrl;
2502 rq->adapter = adapter;
2503 err = vmxnet3_rq_create(rq, adapter);
2504 if (err) {
2505 if (i == 0) {
2506 printk(KERN_ERR "Could not allocate any rx"
2507 "queues. Aborting.\n");
2508 goto queue_err;
2509 } else {
2510 printk(KERN_INFO "Number of rx queues changed "
2511 "to : %d.\n", i);
2512 adapter->num_rx_queues = i;
2513 err = 0;
2514 break;
2515 }
2516 }
2517 }
2518 return err;
2519 queue_err:
2520 vmxnet3_tq_destroy_all(adapter);
2521 return err;
2522 }
2523
2524 static int
2525 vmxnet3_open(struct net_device *netdev)
2526 {
2527 struct vmxnet3_adapter *adapter;
2528 int err, i;
2529
2530 adapter = netdev_priv(netdev);
2531
2532 for (i = 0; i < adapter->num_tx_queues; i++)
2533 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2534
2535 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
2536 VMXNET3_DEF_RX_RING_SIZE,
2537 VMXNET3_DEF_RX_RING_SIZE);
2538 if (err)
2539 goto queue_err;
2540
2541 err = vmxnet3_activate_dev(adapter);
2542 if (err)
2543 goto activate_err;
2544
2545 return 0;
2546
2547 activate_err:
2548 vmxnet3_rq_destroy_all(adapter);
2549 vmxnet3_tq_destroy_all(adapter);
2550 queue_err:
2551 return err;
2552 }
2553
2554
2555 static int
2556 vmxnet3_close(struct net_device *netdev)
2557 {
2558 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2559
2560 /*
2561 * Reset_work may be in the middle of resetting the device, wait for its
2562 * completion.
2563 */
2564 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2565 msleep(1);
2566
2567 vmxnet3_quiesce_dev(adapter);
2568
2569 vmxnet3_rq_destroy_all(adapter);
2570 vmxnet3_tq_destroy_all(adapter);
2571
2572 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2573
2574
2575 return 0;
2576 }
2577
2578
2579 void
2580 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2581 {
2582 int i;
2583
2584 /*
2585 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2586 * vmxnet3_close() will deadlock.
2587 */
2588 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2589
2590 /* we need to enable NAPI, otherwise dev_close will deadlock */
2591 for (i = 0; i < adapter->num_rx_queues; i++)
2592 napi_enable(&adapter->rx_queue[i].napi);
2593 dev_close(adapter->netdev);
2594 }
2595
2596
2597 static int
2598 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2599 {
2600 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2601 int err = 0;
2602
2603 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2604 return -EINVAL;
2605
2606 netdev->mtu = new_mtu;
2607
2608 /*
2609 * Reset_work may be in the middle of resetting the device, wait for its
2610 * completion.
2611 */
2612 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2613 msleep(1);
2614
2615 if (netif_running(netdev)) {
2616 vmxnet3_quiesce_dev(adapter);
2617 vmxnet3_reset_dev(adapter);
2618
2619 /* we need to re-create the rx queue based on the new mtu */
2620 vmxnet3_rq_destroy_all(adapter);
2621 vmxnet3_adjust_rx_ring_size(adapter);
2622 err = vmxnet3_rq_create_all(adapter);
2623 if (err) {
2624 printk(KERN_ERR "%s: failed to re-create rx queues,"
2625 " error %d. Closing it.\n", netdev->name, err);
2626 goto out;
2627 }
2628
2629 err = vmxnet3_activate_dev(adapter);
2630 if (err) {
2631 printk(KERN_ERR "%s: failed to re-activate, error %d. "
2632 "Closing it\n", netdev->name, err);
2633 goto out;
2634 }
2635 }
2636
2637 out:
2638 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2639 if (err)
2640 vmxnet3_force_close(adapter);
2641
2642 return err;
2643 }
2644
2645
2646 static void
2647 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2648 {
2649 struct net_device *netdev = adapter->netdev;
2650
2651 netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
2652 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_TX |
2653 NETIF_F_HW_VLAN_RX | NETIF_F_TSO | NETIF_F_TSO6 |
2654 NETIF_F_LRO;
2655 if (dma64)
2656 netdev->hw_features |= NETIF_F_HIGHDMA;
2657 netdev->vlan_features = netdev->hw_features &
2658 ~(NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2659 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_FILTER;
2660
2661 netdev_info(adapter->netdev,
2662 "features: sg csum vlan jf tso tsoIPv6 lro%s\n",
2663 dma64 ? " highDMA" : "");
2664 }
2665
2666
2667 static void
2668 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2669 {
2670 u32 tmp;
2671
2672 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2673 *(u32 *)mac = tmp;
2674
2675 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2676 mac[4] = tmp & 0xff;
2677 mac[5] = (tmp >> 8) & 0xff;
2678 }
2679
2680 #ifdef CONFIG_PCI_MSI
2681
2682 /*
2683 * Enable MSIx vectors.
2684 * Returns :
2685 * 0 on successful enabling of required vectors,
2686 * VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
2687 * could be enabled.
2688 * number of vectors which can be enabled otherwise (this number is smaller
2689 * than VMXNET3_LINUX_MIN_MSIX_VECT)
2690 */
2691
2692 static int
2693 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter,
2694 int vectors)
2695 {
2696 int err = 0, vector_threshold;
2697 vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT;
2698
2699 while (vectors >= vector_threshold) {
2700 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2701 vectors);
2702 if (!err) {
2703 adapter->intr.num_intrs = vectors;
2704 return 0;
2705 } else if (err < 0) {
2706 printk(KERN_ERR "Failed to enable MSI-X for %s, error"
2707 " %d\n", adapter->netdev->name, err);
2708 vectors = 0;
2709 } else if (err < vector_threshold) {
2710 break;
2711 } else {
2712 /* If fails to enable required number of MSI-x vectors
2713 * try enabling minimum number of vectors required.
2714 */
2715 vectors = vector_threshold;
2716 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try"
2717 " %d instead\n", vectors, adapter->netdev->name,
2718 vector_threshold);
2719 }
2720 }
2721
2722 printk(KERN_INFO "Number of MSI-X interrupts which can be allocatedi"
2723 " are lower than min threshold required.\n");
2724 return err;
2725 }
2726
2727
2728 #endif /* CONFIG_PCI_MSI */
2729
2730 static void
2731 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2732 {
2733 u32 cfg;
2734 unsigned long flags;
2735
2736 /* intr settings */
2737 spin_lock_irqsave(&adapter->cmd_lock, flags);
2738 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2739 VMXNET3_CMD_GET_CONF_INTR);
2740 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2741 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2742 adapter->intr.type = cfg & 0x3;
2743 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2744
2745 if (adapter->intr.type == VMXNET3_IT_AUTO) {
2746 adapter->intr.type = VMXNET3_IT_MSIX;
2747 }
2748
2749 #ifdef CONFIG_PCI_MSI
2750 if (adapter->intr.type == VMXNET3_IT_MSIX) {
2751 int vector, err = 0;
2752
2753 adapter->intr.num_intrs = (adapter->share_intr ==
2754 VMXNET3_INTR_TXSHARE) ? 1 :
2755 adapter->num_tx_queues;
2756 adapter->intr.num_intrs += (adapter->share_intr ==
2757 VMXNET3_INTR_BUDDYSHARE) ? 0 :
2758 adapter->num_rx_queues;
2759 adapter->intr.num_intrs += 1; /* for link event */
2760
2761 adapter->intr.num_intrs = (adapter->intr.num_intrs >
2762 VMXNET3_LINUX_MIN_MSIX_VECT
2763 ? adapter->intr.num_intrs :
2764 VMXNET3_LINUX_MIN_MSIX_VECT);
2765
2766 for (vector = 0; vector < adapter->intr.num_intrs; vector++)
2767 adapter->intr.msix_entries[vector].entry = vector;
2768
2769 err = vmxnet3_acquire_msix_vectors(adapter,
2770 adapter->intr.num_intrs);
2771 /* If we cannot allocate one MSIx vector per queue
2772 * then limit the number of rx queues to 1
2773 */
2774 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) {
2775 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
2776 || adapter->num_rx_queues != 1) {
2777 adapter->share_intr = VMXNET3_INTR_TXSHARE;
2778 printk(KERN_ERR "Number of rx queues : 1\n");
2779 adapter->num_rx_queues = 1;
2780 adapter->intr.num_intrs =
2781 VMXNET3_LINUX_MIN_MSIX_VECT;
2782 }
2783 return;
2784 }
2785 if (!err)
2786 return;
2787
2788 /* If we cannot allocate MSIx vectors use only one rx queue */
2789 printk(KERN_INFO "Failed to enable MSI-X for %s, error %d."
2790 "#rx queues : 1, try MSI\n", adapter->netdev->name, err);
2791
2792 adapter->intr.type = VMXNET3_IT_MSI;
2793 }
2794
2795 if (adapter->intr.type == VMXNET3_IT_MSI) {
2796 int err;
2797 err = pci_enable_msi(adapter->pdev);
2798 if (!err) {
2799 adapter->num_rx_queues = 1;
2800 adapter->intr.num_intrs = 1;
2801 return;
2802 }
2803 }
2804 #endif /* CONFIG_PCI_MSI */
2805
2806 adapter->num_rx_queues = 1;
2807 printk(KERN_INFO "Using INTx interrupt, #Rx queues: 1.\n");
2808 adapter->intr.type = VMXNET3_IT_INTX;
2809
2810 /* INT-X related setting */
2811 adapter->intr.num_intrs = 1;
2812 }
2813
2814
2815 static void
2816 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2817 {
2818 if (adapter->intr.type == VMXNET3_IT_MSIX)
2819 pci_disable_msix(adapter->pdev);
2820 else if (adapter->intr.type == VMXNET3_IT_MSI)
2821 pci_disable_msi(adapter->pdev);
2822 else
2823 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2824 }
2825
2826
2827 static void
2828 vmxnet3_tx_timeout(struct net_device *netdev)
2829 {
2830 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2831 adapter->tx_timeout_count++;
2832
2833 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name);
2834 schedule_work(&adapter->work);
2835 netif_wake_queue(adapter->netdev);
2836 }
2837
2838
2839 static void
2840 vmxnet3_reset_work(struct work_struct *data)
2841 {
2842 struct vmxnet3_adapter *adapter;
2843
2844 adapter = container_of(data, struct vmxnet3_adapter, work);
2845
2846 /* if another thread is resetting the device, no need to proceed */
2847 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2848 return;
2849
2850 /* if the device is closed, we must leave it alone */
2851 rtnl_lock();
2852 if (netif_running(adapter->netdev)) {
2853 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name);
2854 vmxnet3_quiesce_dev(adapter);
2855 vmxnet3_reset_dev(adapter);
2856 vmxnet3_activate_dev(adapter);
2857 } else {
2858 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name);
2859 }
2860 rtnl_unlock();
2861
2862 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2863 }
2864
2865
2866 static int __devinit
2867 vmxnet3_probe_device(struct pci_dev *pdev,
2868 const struct pci_device_id *id)
2869 {
2870 static const struct net_device_ops vmxnet3_netdev_ops = {
2871 .ndo_open = vmxnet3_open,
2872 .ndo_stop = vmxnet3_close,
2873 .ndo_start_xmit = vmxnet3_xmit_frame,
2874 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2875 .ndo_change_mtu = vmxnet3_change_mtu,
2876 .ndo_set_features = vmxnet3_set_features,
2877 .ndo_get_stats64 = vmxnet3_get_stats64,
2878 .ndo_tx_timeout = vmxnet3_tx_timeout,
2879 .ndo_set_multicast_list = vmxnet3_set_mc,
2880 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2881 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2882 #ifdef CONFIG_NET_POLL_CONTROLLER
2883 .ndo_poll_controller = vmxnet3_netpoll,
2884 #endif
2885 };
2886 int err;
2887 bool dma64 = false; /* stupid gcc */
2888 u32 ver;
2889 struct net_device *netdev;
2890 struct vmxnet3_adapter *adapter;
2891 u8 mac[ETH_ALEN];
2892 int size;
2893 int num_tx_queues;
2894 int num_rx_queues;
2895
2896 if (!pci_msi_enabled())
2897 enable_mq = 0;
2898
2899 #ifdef VMXNET3_RSS
2900 if (enable_mq)
2901 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
2902 (int)num_online_cpus());
2903 else
2904 #endif
2905 num_rx_queues = 1;
2906 num_rx_queues = rounddown_pow_of_two(num_rx_queues);
2907
2908 if (enable_mq)
2909 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
2910 (int)num_online_cpus());
2911 else
2912 num_tx_queues = 1;
2913
2914 num_tx_queues = rounddown_pow_of_two(num_tx_queues);
2915 netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
2916 max(num_tx_queues, num_rx_queues));
2917 printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n",
2918 num_tx_queues, num_rx_queues);
2919
2920 if (!netdev) {
2921 printk(KERN_ERR "Failed to alloc ethernet device for adapter "
2922 "%s\n", pci_name(pdev));
2923 return -ENOMEM;
2924 }
2925
2926 pci_set_drvdata(pdev, netdev);
2927 adapter = netdev_priv(netdev);
2928 adapter->netdev = netdev;
2929 adapter->pdev = pdev;
2930
2931 spin_lock_init(&adapter->cmd_lock);
2932 adapter->shared = pci_alloc_consistent(adapter->pdev,
2933 sizeof(struct Vmxnet3_DriverShared),
2934 &adapter->shared_pa);
2935 if (!adapter->shared) {
2936 printk(KERN_ERR "Failed to allocate memory for %s\n",
2937 pci_name(pdev));
2938 err = -ENOMEM;
2939 goto err_alloc_shared;
2940 }
2941
2942 adapter->num_rx_queues = num_rx_queues;
2943 adapter->num_tx_queues = num_tx_queues;
2944
2945 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
2946 size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
2947 adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size,
2948 &adapter->queue_desc_pa);
2949
2950 if (!adapter->tqd_start) {
2951 printk(KERN_ERR "Failed to allocate memory for %s\n",
2952 pci_name(pdev));
2953 err = -ENOMEM;
2954 goto err_alloc_queue_desc;
2955 }
2956 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
2957 adapter->num_tx_queues);
2958
2959 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2960 if (adapter->pm_conf == NULL) {
2961 printk(KERN_ERR "Failed to allocate memory for %s\n",
2962 pci_name(pdev));
2963 err = -ENOMEM;
2964 goto err_alloc_pm;
2965 }
2966
2967 #ifdef VMXNET3_RSS
2968
2969 adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL);
2970 if (adapter->rss_conf == NULL) {
2971 printk(KERN_ERR "Failed to allocate memory for %s\n",
2972 pci_name(pdev));
2973 err = -ENOMEM;
2974 goto err_alloc_rss;
2975 }
2976 #endif /* VMXNET3_RSS */
2977
2978 err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2979 if (err < 0)
2980 goto err_alloc_pci;
2981
2982 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2983 if (ver & 1) {
2984 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2985 } else {
2986 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter"
2987 " %s\n", ver, pci_name(pdev));
2988 err = -EBUSY;
2989 goto err_ver;
2990 }
2991
2992 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2993 if (ver & 1) {
2994 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2995 } else {
2996 printk(KERN_ERR "Incompatible upt version (0x%x) for "
2997 "adapter %s\n", ver, pci_name(pdev));
2998 err = -EBUSY;
2999 goto err_ver;
3000 }
3001
3002 SET_NETDEV_DEV(netdev, &pdev->dev);
3003 vmxnet3_declare_features(adapter, dma64);
3004
3005 adapter->dev_number = atomic_read(&devices_found);
3006
3007 adapter->share_intr = irq_share_mode;
3008 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE &&
3009 adapter->num_tx_queues != adapter->num_rx_queues)
3010 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
3011
3012 vmxnet3_alloc_intr_resources(adapter);
3013
3014 #ifdef VMXNET3_RSS
3015 if (adapter->num_rx_queues > 1 &&
3016 adapter->intr.type == VMXNET3_IT_MSIX) {
3017 adapter->rss = true;
3018 printk(KERN_INFO "RSS is enabled.\n");
3019 } else {
3020 adapter->rss = false;
3021 }
3022 #endif
3023
3024 vmxnet3_read_mac_addr(adapter, mac);
3025 memcpy(netdev->dev_addr, mac, netdev->addr_len);
3026
3027 netdev->netdev_ops = &vmxnet3_netdev_ops;
3028 vmxnet3_set_ethtool_ops(netdev);
3029 netdev->watchdog_timeo = 5 * HZ;
3030
3031 INIT_WORK(&adapter->work, vmxnet3_reset_work);
3032
3033 if (adapter->intr.type == VMXNET3_IT_MSIX) {
3034 int i;
3035 for (i = 0; i < adapter->num_rx_queues; i++) {
3036 netif_napi_add(adapter->netdev,
3037 &adapter->rx_queue[i].napi,
3038 vmxnet3_poll_rx_only, 64);
3039 }
3040 } else {
3041 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3042 vmxnet3_poll, 64);
3043 }
3044
3045 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3046 netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3047
3048 err = register_netdev(netdev);
3049
3050 if (err) {
3051 printk(KERN_ERR "Failed to register adapter %s\n",
3052 pci_name(pdev));
3053 goto err_register;
3054 }
3055
3056 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3057 vmxnet3_check_link(adapter, false);
3058 atomic_inc(&devices_found);
3059 return 0;
3060
3061 err_register:
3062 vmxnet3_free_intr_resources(adapter);
3063 err_ver:
3064 vmxnet3_free_pci_resources(adapter);
3065 err_alloc_pci:
3066 #ifdef VMXNET3_RSS
3067 kfree(adapter->rss_conf);
3068 err_alloc_rss:
3069 #endif
3070 kfree(adapter->pm_conf);
3071 err_alloc_pm:
3072 pci_free_consistent(adapter->pdev, size, adapter->tqd_start,
3073 adapter->queue_desc_pa);
3074 err_alloc_queue_desc:
3075 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
3076 adapter->shared, adapter->shared_pa);
3077 err_alloc_shared:
3078 pci_set_drvdata(pdev, NULL);
3079 free_netdev(netdev);
3080 return err;
3081 }
3082
3083
3084 static void __devexit
3085 vmxnet3_remove_device(struct pci_dev *pdev)
3086 {
3087 struct net_device *netdev = pci_get_drvdata(pdev);
3088 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3089 int size = 0;
3090 int num_rx_queues;
3091
3092 #ifdef VMXNET3_RSS
3093 if (enable_mq)
3094 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3095 (int)num_online_cpus());
3096 else
3097 #endif
3098 num_rx_queues = 1;
3099 num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3100
3101 cancel_work_sync(&adapter->work);
3102
3103 unregister_netdev(netdev);
3104
3105 vmxnet3_free_intr_resources(adapter);
3106 vmxnet3_free_pci_resources(adapter);
3107 #ifdef VMXNET3_RSS
3108 kfree(adapter->rss_conf);
3109 #endif
3110 kfree(adapter->pm_conf);
3111
3112 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3113 size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3114 pci_free_consistent(adapter->pdev, size, adapter->tqd_start,
3115 adapter->queue_desc_pa);
3116 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
3117 adapter->shared, adapter->shared_pa);
3118 free_netdev(netdev);
3119 }
3120
3121
3122 #ifdef CONFIG_PM
3123
3124 static int
3125 vmxnet3_suspend(struct device *device)
3126 {
3127 struct pci_dev *pdev = to_pci_dev(device);
3128 struct net_device *netdev = pci_get_drvdata(pdev);
3129 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3130 struct Vmxnet3_PMConf *pmConf;
3131 struct ethhdr *ehdr;
3132 struct arphdr *ahdr;
3133 u8 *arpreq;
3134 struct in_device *in_dev;
3135 struct in_ifaddr *ifa;
3136 unsigned long flags;
3137 int i = 0;
3138
3139 if (!netif_running(netdev))
3140 return 0;
3141
3142 for (i = 0; i < adapter->num_rx_queues; i++)
3143 napi_disable(&adapter->rx_queue[i].napi);
3144
3145 vmxnet3_disable_all_intrs(adapter);
3146 vmxnet3_free_irqs(adapter);
3147 vmxnet3_free_intr_resources(adapter);
3148
3149 netif_device_detach(netdev);
3150 netif_tx_stop_all_queues(netdev);
3151
3152 /* Create wake-up filters. */
3153 pmConf = adapter->pm_conf;
3154 memset(pmConf, 0, sizeof(*pmConf));
3155
3156 if (adapter->wol & WAKE_UCAST) {
3157 pmConf->filters[i].patternSize = ETH_ALEN;
3158 pmConf->filters[i].maskSize = 1;
3159 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3160 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3161
3162 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3163 i++;
3164 }
3165
3166 if (adapter->wol & WAKE_ARP) {
3167 in_dev = in_dev_get(netdev);
3168 if (!in_dev)
3169 goto skip_arp;
3170
3171 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3172 if (!ifa)
3173 goto skip_arp;
3174
3175 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3176 sizeof(struct arphdr) + /* ARP header */
3177 2 * ETH_ALEN + /* 2 Ethernet addresses*/
3178 2 * sizeof(u32); /*2 IPv4 addresses */
3179 pmConf->filters[i].maskSize =
3180 (pmConf->filters[i].patternSize - 1) / 8 + 1;
3181
3182 /* ETH_P_ARP in Ethernet header. */
3183 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3184 ehdr->h_proto = htons(ETH_P_ARP);
3185
3186 /* ARPOP_REQUEST in ARP header. */
3187 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3188 ahdr->ar_op = htons(ARPOP_REQUEST);
3189 arpreq = (u8 *)(ahdr + 1);
3190
3191 /* The Unicast IPv4 address in 'tip' field. */
3192 arpreq += 2 * ETH_ALEN + sizeof(u32);
3193 *(u32 *)arpreq = ifa->ifa_address;
3194
3195 /* The mask for the relevant bits. */
3196 pmConf->filters[i].mask[0] = 0x00;
3197 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3198 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3199 pmConf->filters[i].mask[3] = 0x00;
3200 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3201 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3202 in_dev_put(in_dev);
3203
3204 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3205 i++;
3206 }
3207
3208 skip_arp:
3209 if (adapter->wol & WAKE_MAGIC)
3210 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3211
3212 pmConf->numFilters = i;
3213
3214 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3215 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3216 *pmConf));
3217 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3218 pmConf));
3219
3220 spin_lock_irqsave(&adapter->cmd_lock, flags);
3221 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3222 VMXNET3_CMD_UPDATE_PMCFG);
3223 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3224
3225 pci_save_state(pdev);
3226 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3227 adapter->wol);
3228 pci_disable_device(pdev);
3229 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3230
3231 return 0;
3232 }
3233
3234
3235 static int
3236 vmxnet3_resume(struct device *device)
3237 {
3238 int err, i = 0;
3239 unsigned long flags;
3240 struct pci_dev *pdev = to_pci_dev(device);
3241 struct net_device *netdev = pci_get_drvdata(pdev);
3242 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3243 struct Vmxnet3_PMConf *pmConf;
3244
3245 if (!netif_running(netdev))
3246 return 0;
3247
3248 /* Destroy wake-up filters. */
3249 pmConf = adapter->pm_conf;
3250 memset(pmConf, 0, sizeof(*pmConf));
3251
3252 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3253 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3254 *pmConf));
3255 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3256 pmConf));
3257
3258 netif_device_attach(netdev);
3259 pci_set_power_state(pdev, PCI_D0);
3260 pci_restore_state(pdev);
3261 err = pci_enable_device_mem(pdev);
3262 if (err != 0)
3263 return err;
3264
3265 pci_enable_wake(pdev, PCI_D0, 0);
3266
3267 spin_lock_irqsave(&adapter->cmd_lock, flags);
3268 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3269 VMXNET3_CMD_UPDATE_PMCFG);
3270 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3271 vmxnet3_alloc_intr_resources(adapter);
3272 vmxnet3_request_irqs(adapter);
3273 for (i = 0; i < adapter->num_rx_queues; i++)
3274 napi_enable(&adapter->rx_queue[i].napi);
3275 vmxnet3_enable_all_intrs(adapter);
3276
3277 return 0;
3278 }
3279
3280 static const struct dev_pm_ops vmxnet3_pm_ops = {
3281 .suspend = vmxnet3_suspend,
3282 .resume = vmxnet3_resume,
3283 };
3284 #endif
3285
3286 static struct pci_driver vmxnet3_driver = {
3287 .name = vmxnet3_driver_name,
3288 .id_table = vmxnet3_pciid_table,
3289 .probe = vmxnet3_probe_device,
3290 .remove = __devexit_p(vmxnet3_remove_device),
3291 #ifdef CONFIG_PM
3292 .driver.pm = &vmxnet3_pm_ops,
3293 #endif
3294 };
3295
3296
3297 static int __init
3298 vmxnet3_init_module(void)
3299 {
3300 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC,
3301 VMXNET3_DRIVER_VERSION_REPORT);
3302 return pci_register_driver(&vmxnet3_driver);
3303 }
3304
3305 module_init(vmxnet3_init_module);
3306
3307
3308 static void
3309 vmxnet3_exit_module(void)
3310 {
3311 pci_unregister_driver(&vmxnet3_driver);
3312 }
3313
3314 module_exit(vmxnet3_exit_module);
3315
3316 MODULE_AUTHOR("VMware, Inc.");
3317 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3318 MODULE_LICENSE("GPL v2");
3319 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);
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