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ALSA: hda - Add static_hdmi_pcm option to HDMI codec parser
[linux-2.6/next.git] / drivers / scsi / pmcraid.h
blob1134279604e805780f84607c523bbdd647685f24
1 /*
2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
3 *
4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
5 * PMC-Sierra Inc
6 *
7 * Copyright (C) 2008, 2009 PMC Sierra Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24 #ifndef _PMCRAID_H
25 #define _PMCRAID_H
26
27 #include <linux/version.h>
28 #include <linux/types.h>
29 #include <linux/completion.h>
30 #include <linux/list.h>
31 #include <scsi/scsi.h>
32 #include <scsi/scsi_cmnd.h>
33 #include <linux/cdev.h>
34 #include <net/netlink.h>
35 #include <net/genetlink.h>
36 #include <linux/connector.h>
37 /*
38 * Driver name : string representing the driver name
39 * Device file : /dev file to be used for management interfaces
40 * Driver version: version string in major_version.minor_version.patch format
41 * Driver date : date information in "Mon dd yyyy" format
42 */
43 #define PMCRAID_DRIVER_NAME "PMC MaxRAID"
44 #define PMCRAID_DEVFILE "pmcsas"
45 #define PMCRAID_DRIVER_VERSION "2.0.3"
46 #define PMCRAID_DRIVER_DATE __DATE__
47
48 #define PMCRAID_FW_VERSION_1 0x002
49
50 /* Maximum number of adapters supported by current version of the driver */
51 #define PMCRAID_MAX_ADAPTERS 1024
52
53 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */
54 #define PMC_BIT8(n) (1 << (7-n))
55 #define PMC_BIT16(n) (1 << (15-n))
56 #define PMC_BIT32(n) (1 << (31-n))
57
58 /* PMC PCI vendor ID and device ID values */
59 #define PCI_VENDOR_ID_PMC 0x11F8
60 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220
61
62 /*
63 * MAX_CMD : maximum commands that can be outstanding with IOA
64 * MAX_IO_CMD : command blocks available for IO commands
65 * MAX_HCAM_CMD : command blocks avaibale for HCAMS
66 * MAX_INTERNAL_CMD : command blocks avaible for internal commands like reset
67 */
68 #define PMCRAID_MAX_CMD 1024
69 #define PMCRAID_MAX_IO_CMD 1020
70 #define PMCRAID_MAX_HCAM_CMD 2
71 #define PMCRAID_MAX_INTERNAL_CMD 2
72
73 /* MAX_IOADLS : max number of scatter-gather lists supported by IOA
74 * IOADLS_INTERNAL : number of ioadls included as part of IOARCB.
75 * IOADLS_EXTERNAL : number of ioadls allocated external to IOARCB
76 */
77 #define PMCRAID_IOADLS_INTERNAL 27
78 #define PMCRAID_IOADLS_EXTERNAL 37
79 #define PMCRAID_MAX_IOADLS PMCRAID_IOADLS_INTERNAL
80
81 /* HRRQ_ENTRY_SIZE : size of hrrq buffer
82 * IOARCB_ALIGNMENT : alignment required for IOARCB
83 * IOADL_ALIGNMENT : alignment requirement for IOADLs
84 * MSIX_VECTORS : number of MSIX vectors supported
85 */
86 #define HRRQ_ENTRY_SIZE sizeof(__le32)
87 #define PMCRAID_IOARCB_ALIGNMENT 32
88 #define PMCRAID_IOADL_ALIGNMENT 16
89 #define PMCRAID_IOASA_ALIGNMENT 4
90 #define PMCRAID_NUM_MSIX_VECTORS 16
91
92 /* various other limits */
93 #define PMCRAID_VENDOR_ID_LEN 8
94 #define PMCRAID_PRODUCT_ID_LEN 16
95 #define PMCRAID_SERIAL_NUM_LEN 8
96 #define PMCRAID_LUN_LEN 8
97 #define PMCRAID_MAX_CDB_LEN 16
98 #define PMCRAID_DEVICE_ID_LEN 8
99 #define PMCRAID_SENSE_DATA_LEN 256
100 #define PMCRAID_ADD_CMD_PARAM_LEN 48
101
102 #define PMCRAID_MAX_BUS_TO_SCAN 1
103 #define PMCRAID_MAX_NUM_TARGETS_PER_BUS 256
104 #define PMCRAID_MAX_NUM_LUNS_PER_TARGET 8
105
106 /* IOA bus/target/lun number of IOA resources */
107 #define PMCRAID_IOA_BUS_ID 0xfe
108 #define PMCRAID_IOA_TARGET_ID 0xff
109 #define PMCRAID_IOA_LUN_ID 0xff
110 #define PMCRAID_VSET_BUS_ID 0x1
111 #define PMCRAID_VSET_LUN_ID 0x0
112 #define PMCRAID_PHYS_BUS_ID 0x0
113 #define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8
114 #define PMCRAID_MAX_VSET_TARGETS 0x7F
115 #define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8
116
117 #define PMCRAID_IOA_MAX_SECTORS 32767
118 #define PMCRAID_VSET_MAX_SECTORS 512
119 #define PMCRAID_MAX_CMD_PER_LUN 254
120
121 /* Number of configuration table entries (resources), includes 1 FP,
122 * 1 Enclosure device
123 */
124 #define PMCRAID_MAX_RESOURCES 256
125
126 /* Adapter Commands used by driver */
127 #define PMCRAID_QUERY_RESOURCE_STATE 0xC2
128 #define PMCRAID_RESET_DEVICE 0xC3
129 /* options to select reset target */
130 #define ENABLE_RESET_MODIFIER 0x80
131 #define RESET_DEVICE_LUN 0x40
132 #define RESET_DEVICE_TARGET 0x20
133 #define RESET_DEVICE_BUS 0x10
134
135 #define PMCRAID_IDENTIFY_HRRQ 0xC4
136 #define PMCRAID_QUERY_IOA_CONFIG 0xC5
137 #define PMCRAID_QUERY_CMD_STATUS 0xCB
138 #define PMCRAID_ABORT_CMD 0xC7
139
140 /* CANCEL ALL command, provides option for setting SYNC_COMPLETE
141 * on the target resources for which commands got cancelled
142 */
143 #define PMCRAID_CANCEL_ALL_REQUESTS 0xCE
144 #define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL PMC_BIT8(0)
145
146 /* HCAM command and types of HCAM supported by IOA */
147 #define PMCRAID_HOST_CONTROLLED_ASYNC 0xCF
148 #define PMCRAID_HCAM_CODE_CONFIG_CHANGE 0x01
149 #define PMCRAID_HCAM_CODE_LOG_DATA 0x02
150
151 /* IOA shutdown command and various shutdown types */
152 #define PMCRAID_IOA_SHUTDOWN 0xF7
153 #define PMCRAID_SHUTDOWN_NORMAL 0x00
154 #define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL 0x40
155 #define PMCRAID_SHUTDOWN_NONE 0x100
156 #define PMCRAID_SHUTDOWN_ABBREV 0x80
157
158 /* SET SUPPORTED DEVICES command and the option to select all the
159 * devices to be supported
160 */
161 #define PMCRAID_SET_SUPPORTED_DEVICES 0xFB
162 #define ALL_DEVICES_SUPPORTED PMC_BIT8(0)
163
164 /* This option is used with SCSI WRITE_BUFFER command */
165 #define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE 0x05
166
167 /* IOASC Codes used by driver */
168 #define PMCRAID_IOASC_SENSE_MASK 0xFFFFFF00
169 #define PMCRAID_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
170 #define PMCRAID_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
171 #define PMCRAID_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
172 #define PMCRAID_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
173
174 #define PMCRAID_IOASC_GOOD_COMPLETION 0x00000000
175 #define PMCRAID_IOASC_GC_IOARCB_NOTFOUND 0x005A0000
176 #define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
177 #define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED 0x02048000
178 #define PMCRAID_IOASC_NR_SYNC_REQUIRED 0x023F0000
179 #define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC 0x03110C00
180 #define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE 0x04050000
181 #define PMCRAID_IOASC_HW_DEVICE_TIMEOUT 0x04080100
182 #define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR 0x04448500
183 #define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED 0x04448600
184 #define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE 0x05250000
185 #define PMCRAID_IOASC_AC_TERMINATED_BY_HOST 0x0B5A0000
186 #define PMCRAID_IOASC_UA_BUS_WAS_RESET 0x06290000
187 #define PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC 0x06908B00
188 #define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER 0x06298000
189
190 /* Driver defined IOASCs */
191 #define PMCRAID_IOASC_IOA_WAS_RESET 0x10000001
192 #define PMCRAID_IOASC_PCI_ACCESS_ERROR 0x10000002
193
194 /* Various timeout values (in milliseconds) used. If any of these are chip
195 * specific, move them to pmcraid_chip_details structure.
196 */
197 #define PMCRAID_PCI_DEASSERT_TIMEOUT 2000
198 #define PMCRAID_BIST_TIMEOUT 2000
199 #define PMCRAID_AENWAIT_TIMEOUT 5000
200 #define PMCRAID_TRANSOP_TIMEOUT 60000
201
202 #define PMCRAID_RESET_TIMEOUT (2 * HZ)
203 #define PMCRAID_CHECK_FOR_RESET_TIMEOUT ((HZ / 10))
204 #define PMCRAID_VSET_IO_TIMEOUT (60 * HZ)
205 #define PMCRAID_INTERNAL_TIMEOUT (60 * HZ)
206 #define PMCRAID_SHUTDOWN_TIMEOUT (150 * HZ)
207 #define PMCRAID_RESET_BUS_TIMEOUT (60 * HZ)
208 #define PMCRAID_RESET_HOST_TIMEOUT (150 * HZ)
209 #define PMCRAID_REQUEST_SENSE_TIMEOUT (30 * HZ)
210 #define PMCRAID_SET_SUP_DEV_TIMEOUT (2 * 60 * HZ)
211
212 /* structure to represent a scatter-gather element (IOADL descriptor) */
213 struct pmcraid_ioadl_desc {
214 __le64 address;
215 __le32 data_len;
216 __u8 reserved[3];
217 __u8 flags;
218 } __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT)));
219
220 /* pmcraid_ioadl_desc.flags values */
221 #define IOADL_FLAGS_CHAINED PMC_BIT8(0)
222 #define IOADL_FLAGS_LAST_DESC PMC_BIT8(1)
223 #define IOADL_FLAGS_READ_LAST PMC_BIT8(1)
224 #define IOADL_FLAGS_WRITE_LAST PMC_BIT8(1)
225
226
227 /* additional IOARCB data which can be CDB or additional request parameters
228 * or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then
229 * number of IOADLs are limted to 27. In case they are more than 27, they will
230 * be used in chained form
231 */
232 struct pmcraid_ioarcb_add_data {
233 union {
234 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL];
235 __u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN];
236 } u;
237 };
238
239 /*
240 * IOA Request Control Block
241 */
242 struct pmcraid_ioarcb {
243 __le64 ioarcb_bus_addr;
244 __le32 resource_handle;
245 __le32 response_handle;
246 __le64 ioadl_bus_addr;
247 __le32 ioadl_length;
248 __le32 data_transfer_length;
249 __le64 ioasa_bus_addr;
250 __le16 ioasa_len;
251 __le16 cmd_timeout;
252 __le16 add_cmd_param_offset;
253 __le16 add_cmd_param_length;
254 __le32 reserved1[2];
255 __le32 reserved2;
256 __u8 request_type;
257 __u8 request_flags0;
258 __u8 request_flags1;
259 __u8 hrrq_id;
260 __u8 cdb[PMCRAID_MAX_CDB_LEN];
261 struct pmcraid_ioarcb_add_data add_data;
262 } __attribute__((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
263
264 /* well known resource handle values */
265 #define PMCRAID_IOA_RES_HANDLE 0xffffffff
266 #define PMCRAID_INVALID_RES_HANDLE 0
267
268 /* pmcraid_ioarcb.request_type values */
269 #define REQ_TYPE_SCSI 0x00
270 #define REQ_TYPE_IOACMD 0x01
271 #define REQ_TYPE_HCAM 0x02
272
273 /* pmcraid_ioarcb.flags0 values */
274 #define TRANSFER_DIR_WRITE PMC_BIT8(0)
275 #define INHIBIT_UL_CHECK PMC_BIT8(2)
276 #define SYNC_OVERRIDE PMC_BIT8(3)
277 #define SYNC_COMPLETE PMC_BIT8(4)
278 #define NO_LINK_DESCS PMC_BIT8(5)
279
280 /* pmcraid_ioarcb.flags1 values */
281 #define DELAY_AFTER_RESET PMC_BIT8(0)
282 #define TASK_TAG_SIMPLE 0x10
283 #define TASK_TAG_ORDERED 0x20
284 #define TASK_TAG_QUEUE_HEAD 0x30
285
286 /* toggle bit offset in response handle */
287 #define HRRQ_TOGGLE_BIT 0x01
288 #define HRRQ_RESPONSE_BIT 0x02
289
290 /* IOA Status Area */
291 struct pmcraid_ioasa_vset {
292 __le32 failing_lba_hi;
293 __le32 failing_lba_lo;
294 __le32 reserved;
295 } __attribute__((packed, aligned(4)));
296
297 struct pmcraid_ioasa {
298 __le32 ioasc;
299 __le16 returned_status_length;
300 __le16 available_status_length;
301 __le32 residual_data_length;
302 __le32 ilid;
303 __le32 fd_ioasc;
304 __le32 fd_res_address;
305 __le32 fd_res_handle;
306 __le32 reserved;
307
308 /* resource specific sense information */
309 union {
310 struct pmcraid_ioasa_vset vset;
311 } u;
312
313 /* IOA autosense data */
314 __le16 auto_sense_length;
315 __le16 error_data_length;
316 __u8 sense_data[PMCRAID_SENSE_DATA_LEN];
317 } __attribute__((packed, aligned(4)));
318
319 #define PMCRAID_DRIVER_ILID 0xffffffff
320
321 /* Config Table Entry per Resource */
322 struct pmcraid_config_table_entry {
323 __u8 resource_type;
324 __u8 bus_protocol;
325 __le16 array_id;
326 __u8 common_flags0;
327 __u8 common_flags1;
328 __u8 unique_flags0;
329 __u8 unique_flags1; /*also used as vset target_id */
330 __le32 resource_handle;
331 __le32 resource_address;
332 __u8 device_id[PMCRAID_DEVICE_ID_LEN];
333 __u8 lun[PMCRAID_LUN_LEN];
334 } __attribute__((packed, aligned(4)));
335
336 /* extended configuration table sizes are of 64 bytes in size */
337 #define PMCRAID_CFGTE_EXT_SIZE 32
338 struct pmcraid_config_table_entry_ext {
339 struct pmcraid_config_table_entry cfgte;
340 __u8 cfgte_ext[PMCRAID_CFGTE_EXT_SIZE];
341 };
342
343 /* resource types (config_table_entry.resource_type values) */
344 #define RES_TYPE_AF_DASD 0x00
345 #define RES_TYPE_GSCSI 0x01
346 #define RES_TYPE_VSET 0x02
347 #define RES_TYPE_IOA_FP 0xFF
348
349 #define RES_IS_IOA(res) ((res).resource_type == RES_TYPE_IOA_FP)
350 #define RES_IS_GSCSI(res) ((res).resource_type == RES_TYPE_GSCSI)
351 #define RES_IS_VSET(res) ((res).resource_type == RES_TYPE_VSET)
352 #define RES_IS_AFDASD(res) ((res).resource_type == RES_TYPE_AF_DASD)
353
354 /* bus_protocol values used by driver */
355 #define RES_TYPE_VENCLOSURE 0x8
356
357 /* config_table_entry.common_flags0 */
358 #define MULTIPATH_RESOURCE PMC_BIT32(0)
359
360 /* unique_flags1 */
361 #define IMPORT_MODE_MANUAL PMC_BIT8(0)
362
363 /* well known resource handle values */
364 #define RES_HANDLE_IOA 0xFFFFFFFF
365 #define RES_HANDLE_NONE 0x00000000
366
367 /* well known resource address values */
368 #define RES_ADDRESS_IOAFP 0xFEFFFFFF
369 #define RES_ADDRESS_INVALID 0xFFFFFFFF
370
371 /* BUS/TARGET/LUN values from resource_addrr */
372 #define RES_BUS(res_addr) (le32_to_cpu(res_addr) & 0xFF)
373 #define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF)
374 #define RES_LUN(res_addr) 0x0
375
376 /* configuration table structure */
377 struct pmcraid_config_table {
378 __le16 num_entries;
379 __u8 table_format;
380 __u8 reserved1;
381 __u8 flags;
382 __u8 reserved2[11];
383 union {
384 struct pmcraid_config_table_entry
385 entries[PMCRAID_MAX_RESOURCES];
386 struct pmcraid_config_table_entry_ext
387 entries_ext[PMCRAID_MAX_RESOURCES];
388 };
389 } __attribute__((packed, aligned(4)));
390
391 /* config_table.flags value */
392 #define MICROCODE_UPDATE_REQUIRED PMC_BIT32(0)
393
394 /*
395 * HCAM format
396 */
397 #define PMCRAID_HOSTRCB_LDNSIZE 4056
398
399 /* Error log notification format */
400 struct pmcraid_hostrcb_error {
401 __le32 fd_ioasc;
402 __le32 fd_ra;
403 __le32 fd_rh;
404 __le32 prc;
405 union {
406 __u8 data[PMCRAID_HOSTRCB_LDNSIZE];
407 } u;
408 } __attribute__ ((packed, aligned(4)));
409
410 struct pmcraid_hcam_hdr {
411 __u8 op_code;
412 __u8 notification_type;
413 __u8 notification_lost;
414 __u8 flags;
415 __u8 overlay_id;
416 __u8 reserved1[3];
417 __le32 ilid;
418 __le32 timestamp1;
419 __le32 timestamp2;
420 __le32 data_len;
421 } __attribute__((packed, aligned(4)));
422
423 #define PMCRAID_AEN_GROUP 0x3
424
425 struct pmcraid_hcam_ccn {
426 struct pmcraid_hcam_hdr header;
427 struct pmcraid_config_table_entry cfg_entry;
428 struct pmcraid_config_table_entry cfg_entry_old;
429 } __attribute__((packed, aligned(4)));
430
431 #define PMCRAID_CCN_EXT_SIZE 3944
432 struct pmcraid_hcam_ccn_ext {
433 struct pmcraid_hcam_hdr header;
434 struct pmcraid_config_table_entry_ext cfg_entry;
435 struct pmcraid_config_table_entry_ext cfg_entry_old;
436 __u8 reserved[PMCRAID_CCN_EXT_SIZE];
437 } __attribute__((packed, aligned(4)));
438
439 struct pmcraid_hcam_ldn {
440 struct pmcraid_hcam_hdr header;
441 struct pmcraid_hostrcb_error error_log;
442 } __attribute__((packed, aligned(4)));
443
444 /* pmcraid_hcam.op_code values */
445 #define HOSTRCB_TYPE_CCN 0xE1
446 #define HOSTRCB_TYPE_LDN 0xE2
447
448 /* pmcraid_hcam.notification_type values */
449 #define NOTIFICATION_TYPE_ENTRY_CHANGED 0x0
450 #define NOTIFICATION_TYPE_ENTRY_NEW 0x1
451 #define NOTIFICATION_TYPE_ENTRY_DELETED 0x2
452 #define NOTIFICATION_TYPE_STATE_CHANGE 0x3
453 #define NOTIFICATION_TYPE_ENTRY_STATECHANGED 0x4
454 #define NOTIFICATION_TYPE_ERROR_LOG 0x10
455 #define NOTIFICATION_TYPE_INFORMATION_LOG 0x11
456
457 #define HOSTRCB_NOTIFICATIONS_LOST PMC_BIT8(0)
458
459 /* pmcraid_hcam.flags values */
460 #define HOSTRCB_INTERNAL_OP_ERROR PMC_BIT8(0)
461 #define HOSTRCB_ERROR_RESPONSE_SENT PMC_BIT8(1)
462
463 /* pmcraid_hcam.overlay_id values */
464 #define HOSTRCB_OVERLAY_ID_08 0x08
465 #define HOSTRCB_OVERLAY_ID_09 0x09
466 #define HOSTRCB_OVERLAY_ID_11 0x11
467 #define HOSTRCB_OVERLAY_ID_12 0x12
468 #define HOSTRCB_OVERLAY_ID_13 0x13
469 #define HOSTRCB_OVERLAY_ID_14 0x14
470 #define HOSTRCB_OVERLAY_ID_16 0x16
471 #define HOSTRCB_OVERLAY_ID_17 0x17
472 #define HOSTRCB_OVERLAY_ID_20 0x20
473 #define HOSTRCB_OVERLAY_ID_FF 0xFF
474
475 /* Implementation specific card details */
476 struct pmcraid_chip_details {
477 /* hardware register offsets */
478 unsigned long ioastatus;
479 unsigned long ioarrin;
480 unsigned long mailbox;
481 unsigned long global_intr_mask;
482 unsigned long ioa_host_intr;
483 unsigned long ioa_host_msix_intr;
484 unsigned long ioa_host_intr_clr;
485 unsigned long ioa_host_mask;
486 unsigned long ioa_host_mask_clr;
487 unsigned long host_ioa_intr;
488 unsigned long host_ioa_intr_clr;
489
490 /* timeout used during transitional to operational state */
491 unsigned long transop_timeout;
492 };
493
494 /* IOA to HOST doorbells (interrupts) */
495 #define INTRS_TRANSITION_TO_OPERATIONAL PMC_BIT32(0)
496 #define INTRS_IOARCB_TRANSFER_FAILED PMC_BIT32(3)
497 #define INTRS_IOA_UNIT_CHECK PMC_BIT32(4)
498 #define INTRS_NO_HRRQ_FOR_CMD_RESPONSE PMC_BIT32(5)
499 #define INTRS_CRITICAL_OP_IN_PROGRESS PMC_BIT32(6)
500 #define INTRS_IO_DEBUG_ACK PMC_BIT32(7)
501 #define INTRS_IOARRIN_LOST PMC_BIT32(27)
502 #define INTRS_SYSTEM_BUS_MMIO_ERROR PMC_BIT32(28)
503 #define INTRS_IOA_PROCESSOR_ERROR PMC_BIT32(29)
504 #define INTRS_HRRQ_VALID PMC_BIT32(30)
505 #define INTRS_OPERATIONAL_STATUS PMC_BIT32(0)
506 #define INTRS_ALLOW_MSIX_VECTOR0 PMC_BIT32(31)
507
508 /* Host to IOA Doorbells */
509 #define DOORBELL_RUNTIME_RESET PMC_BIT32(1)
510 #define DOORBELL_IOA_RESET_ALERT PMC_BIT32(7)
511 #define DOORBELL_IOA_DEBUG_ALERT PMC_BIT32(9)
512 #define DOORBELL_ENABLE_DESTRUCTIVE_DIAGS PMC_BIT32(8)
513 #define DOORBELL_IOA_START_BIST PMC_BIT32(23)
514 #define DOORBELL_INTR_MODE_MSIX PMC_BIT32(25)
515 #define DOORBELL_INTR_MSIX_CLR PMC_BIT32(26)
516 #define DOORBELL_RESET_IOA PMC_BIT32(31)
517
518 /* Global interrupt mask register value */
519 #define GLOBAL_INTERRUPT_MASK 0x5ULL
520
521 #define PMCRAID_ERROR_INTERRUPTS (INTRS_IOARCB_TRANSFER_FAILED | \
522 INTRS_IOA_UNIT_CHECK | \
523 INTRS_NO_HRRQ_FOR_CMD_RESPONSE | \
524 INTRS_IOARRIN_LOST | \
525 INTRS_SYSTEM_BUS_MMIO_ERROR | \
526 INTRS_IOA_PROCESSOR_ERROR)
527
528 #define PMCRAID_PCI_INTERRUPTS (PMCRAID_ERROR_INTERRUPTS | \
529 INTRS_HRRQ_VALID | \
530 INTRS_TRANSITION_TO_OPERATIONAL |\
531 INTRS_ALLOW_MSIX_VECTOR0)
532
533 /* control_block, associated with each of the commands contains IOARCB, IOADLs
534 * memory for IOASA. Additional 3 * 16 bytes are allocated in order to support
535 * additional request parameters (of max size 48) any command.
536 */
537 struct pmcraid_control_block {
538 struct pmcraid_ioarcb ioarcb;
539 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_EXTERNAL + 3];
540 struct pmcraid_ioasa ioasa;
541 } __attribute__ ((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
542
543 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls
544 */
545 struct pmcraid_sglist {
546 u32 order;
547 u32 num_sg;
548 u32 num_dma_sg;
549 u32 buffer_len;
550 struct scatterlist scatterlist[1];
551 };
552
553 /* page D0 inquiry data of focal point resource */
554 struct pmcraid_inquiry_data {
555 __u8 ph_dev_type;
556 __u8 page_code;
557 __u8 reserved1;
558 __u8 add_page_len;
559 __u8 length;
560 __u8 reserved2;
561 __le16 fw_version;
562 __u8 reserved3[16];
563 };
564
565 #define PMCRAID_TIMESTAMP_LEN 12
566 #define PMCRAID_REQ_TM_STR_LEN 6
567 #define PMCRAID_SCSI_SET_TIMESTAMP 0xA4
568 #define PMCRAID_SCSI_SERVICE_ACTION 0x0F
569
570 struct pmcraid_timestamp_data {
571 __u8 reserved1[4];
572 __u8 timestamp[PMCRAID_REQ_TM_STR_LEN]; /* current time value */
573 __u8 reserved2[2];
574 };
575
576 /* pmcraid_cmd - LLD representation of SCSI command */
577 struct pmcraid_cmd {
578
579 /* Ptr and bus address of DMA.able control block for this command */
580 struct pmcraid_control_block *ioa_cb;
581 dma_addr_t ioa_cb_bus_addr;
582 dma_addr_t dma_handle;
583
584 /* pointer to mid layer structure of SCSI commands */
585 struct scsi_cmnd *scsi_cmd;
586
587 struct list_head free_list;
588 struct completion wait_for_completion;
589 struct timer_list timer; /* needed for internal commands */
590 u32 timeout; /* current timeout value */
591 u32 index; /* index into the command list */
592 u8 completion_req; /* for handling internal commands */
593 u8 release; /* for handling completions */
594
595 void (*cmd_done) (struct pmcraid_cmd *);
596 struct pmcraid_instance *drv_inst;
597
598 struct pmcraid_sglist *sglist; /* used for passthrough IOCTLs */
599
600 /* scratch used */
601 union {
602 /* during reset sequence */
603 unsigned long time_left;
604 struct pmcraid_resource_entry *res;
605 int hrrq_index;
606
607 /* used during IO command error handling. Sense buffer
608 * for REQUEST SENSE command if firmware is not sending
609 * auto sense data
610 */
611 struct {
612 u8 *sense_buffer;
613 dma_addr_t sense_buffer_dma;
614 };
615 };
616 };
617
618 /*
619 * Interrupt registers of IOA
620 */
621 struct pmcraid_interrupts {
622 void __iomem *ioa_host_interrupt_reg;
623 void __iomem *ioa_host_msix_interrupt_reg;
624 void __iomem *ioa_host_interrupt_clr_reg;
625 void __iomem *ioa_host_interrupt_mask_reg;
626 void __iomem *ioa_host_interrupt_mask_clr_reg;
627 void __iomem *global_interrupt_mask_reg;
628 void __iomem *host_ioa_interrupt_reg;
629 void __iomem *host_ioa_interrupt_clr_reg;
630 };
631
632 /* ISR parameters LLD allocates (one for each MSI-X if enabled) vectors */
633 struct pmcraid_isr_param {
634 struct pmcraid_instance *drv_inst;
635 u16 vector; /* allocated msi-x vector */
636 u8 hrrq_id; /* hrrq entry index */
637 };
638
639
640 /* AEN message header sent as part of event data to applications */
641 struct pmcraid_aen_msg {
642 u32 hostno;
643 u32 length;
644 u8 reserved[8];
645 u8 data[0];
646 };
647
648 /* Controller state event message type */
649 struct pmcraid_state_msg {
650 struct pmcraid_aen_msg msg;
651 u32 ioa_state;
652 };
653
654 #define PMC_DEVICE_EVENT_RESET_START 0x11000000
655 #define PMC_DEVICE_EVENT_RESET_SUCCESS 0x11000001
656 #define PMC_DEVICE_EVENT_RESET_FAILED 0x11000002
657 #define PMC_DEVICE_EVENT_SHUTDOWN_START 0x11000003
658 #define PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS 0x11000004
659 #define PMC_DEVICE_EVENT_SHUTDOWN_FAILED 0x11000005
660
661 struct pmcraid_hostrcb {
662 struct pmcraid_instance *drv_inst;
663 struct pmcraid_aen_msg *msg;
664 struct pmcraid_hcam_hdr *hcam; /* pointer to hcam buffer */
665 struct pmcraid_cmd *cmd; /* pointer to command block used */
666 dma_addr_t baddr; /* system address of hcam buffer */
667 atomic_t ignore; /* process HCAM response ? */
668 };
669
670 #define PMCRAID_AEN_HDR_SIZE sizeof(struct pmcraid_aen_msg)
671
672
673
674 /*
675 * Per adapter structure maintained by LLD
676 */
677 struct pmcraid_instance {
678 /* Array of allowed-to-be-exposed resources, initialized from
679 * Configutation Table, later updated with CCNs
680 */
681 struct pmcraid_resource_entry *res_entries;
682
683 struct list_head free_res_q; /* res_entries lists for easy lookup */
684 struct list_head used_res_q; /* List of to be exposed resources */
685 spinlock_t resource_lock; /* spinlock to protect resource list */
686
687 void __iomem *mapped_dma_addr;
688 void __iomem *ioa_status; /* Iomapped IOA status register */
689 void __iomem *mailbox; /* Iomapped mailbox register */
690 void __iomem *ioarrin; /* IOmapped IOARR IN register */
691
692 struct pmcraid_interrupts int_regs;
693 struct pmcraid_chip_details *chip_cfg;
694
695 /* HostRCBs needed for HCAM */
696 struct pmcraid_hostrcb ldn;
697 struct pmcraid_hostrcb ccn;
698 struct pmcraid_state_msg scn; /* controller state change msg */
699
700
701 /* Bus address of start of HRRQ */
702 dma_addr_t hrrq_start_bus_addr[PMCRAID_NUM_MSIX_VECTORS];
703
704 /* Pointer to 1st entry of HRRQ */
705 __be32 *hrrq_start[PMCRAID_NUM_MSIX_VECTORS];
706
707 /* Pointer to last entry of HRRQ */
708 __be32 *hrrq_end[PMCRAID_NUM_MSIX_VECTORS];
709
710 /* Pointer to current pointer of hrrq */
711 __be32 *hrrq_curr[PMCRAID_NUM_MSIX_VECTORS];
712
713 /* Lock for HRRQ access */
714 spinlock_t hrrq_lock[PMCRAID_NUM_MSIX_VECTORS];
715
716 struct pmcraid_inquiry_data *inq_data;
717 dma_addr_t inq_data_baddr;
718
719 struct pmcraid_timestamp_data *timestamp_data;
720 dma_addr_t timestamp_data_baddr;
721
722 /* size of configuration table entry, varies based on the firmware */
723 u32 config_table_entry_size;
724
725 /* Expected toggle bit at host */
726 u8 host_toggle_bit[PMCRAID_NUM_MSIX_VECTORS];
727
728
729 /* Wait Q for threads to wait for Reset IOA completion */
730 wait_queue_head_t reset_wait_q;
731 struct pmcraid_cmd *reset_cmd;
732
733 /* structures for supporting SIGIO based AEN. */
734 struct fasync_struct *aen_queue;
735 struct mutex aen_queue_lock; /* lock for aen subscribers list */
736 struct cdev cdev;
737
738 struct Scsi_Host *host; /* mid layer interface structure handle */
739 struct pci_dev *pdev; /* PCI device structure handle */
740
741 /* No of Reset IOA retries . IOA marked dead if threshold exceeds */
742 u8 ioa_reset_attempts;
743 #define PMCRAID_RESET_ATTEMPTS 3
744
745 u8 current_log_level; /* default level for logging IOASC errors */
746
747 u8 num_hrrq; /* Number of interrupt vectors allocated */
748 u8 interrupt_mode; /* current interrupt mode legacy or msix */
749 dev_t dev; /* Major-Minor numbers for Char device */
750
751 /* Used as ISR handler argument */
752 struct pmcraid_isr_param hrrq_vector[PMCRAID_NUM_MSIX_VECTORS];
753
754 /* Message id as filled in last fired IOARCB, used to identify HRRQ */
755 atomic_t last_message_id;
756
757 /* configuration table */
758 struct pmcraid_config_table *cfg_table;
759 dma_addr_t cfg_table_bus_addr;
760
761 /* structures related to command blocks */
762 struct kmem_cache *cmd_cachep; /* cache for cmd blocks */
763 struct pci_pool *control_pool; /* pool for control blocks */
764 char cmd_pool_name[64]; /* name of cmd cache */
765 char ctl_pool_name[64]; /* name of control cache */
766
767 struct pmcraid_cmd *cmd_list[PMCRAID_MAX_CMD];
768
769 struct list_head free_cmd_pool;
770 struct list_head pending_cmd_pool;
771 spinlock_t free_pool_lock; /* free pool lock */
772 spinlock_t pending_pool_lock; /* pending pool lock */
773
774 /* Tasklet to handle deferred processing */
775 struct tasklet_struct isr_tasklet[PMCRAID_NUM_MSIX_VECTORS];
776
777 /* Work-queue (Shared) for deferred reset processing */
778 struct work_struct worker_q;
779
780 /* No of IO commands pending with FW */
781 atomic_t outstanding_cmds;
782
783 /* should add/delete resources to mid-layer now ?*/
784 atomic_t expose_resources;
785
786
787
788 u32 ioa_state:4; /* For IOA Reset sequence FSM */
789 #define IOA_STATE_OPERATIONAL 0x0
790 #define IOA_STATE_UNKNOWN 0x1
791 #define IOA_STATE_DEAD 0x2
792 #define IOA_STATE_IN_SOFT_RESET 0x3
793 #define IOA_STATE_IN_HARD_RESET 0x4
794 #define IOA_STATE_IN_RESET_ALERT 0x5
795 #define IOA_STATE_IN_BRINGDOWN 0x6
796 #define IOA_STATE_IN_BRINGUP 0x7
797
798 u32 ioa_reset_in_progress:1; /* true if IOA reset is in progress */
799 u32 ioa_hard_reset:1; /* TRUE if Hard Reset is needed */
800 u32 ioa_unit_check:1; /* Indicates Unit Check condition */
801 u32 ioa_bringdown:1; /* whether IOA needs to be brought down */
802 u32 force_ioa_reset:1; /* force adapter reset ? */
803 u32 reinit_cfg_table:1; /* reinit config table due to lost CCN */
804 u32 ioa_shutdown_type:2;/* shutdown type used during reset */
805 #define SHUTDOWN_NONE 0x0
806 #define SHUTDOWN_NORMAL 0x1
807 #define SHUTDOWN_ABBREV 0x2
808 u32 timestamp_error:1; /* indicate set timestamp for out of sync */
809
810 };
811
812 /* LLD maintained resource entry structure */
813 struct pmcraid_resource_entry {
814 struct list_head queue; /* link to "to be exposed" resources */
815 union {
816 struct pmcraid_config_table_entry cfg_entry;
817 struct pmcraid_config_table_entry_ext cfg_entry_ext;
818 };
819 struct scsi_device *scsi_dev; /* Link scsi_device structure */
820 atomic_t read_failures; /* count of failed READ commands */
821 atomic_t write_failures; /* count of failed WRITE commands */
822
823 /* To indicate add/delete/modify during CCN */
824 u8 change_detected;
825 #define RES_CHANGE_ADD 0x1 /* add this to mid-layer */
826 #define RES_CHANGE_DEL 0x2 /* remove this from mid-layer */
827
828 u8 reset_progress; /* Device is resetting */
829
830 /*
831 * When IOA asks for sync (i.e. IOASC = Not Ready, Sync Required), this
832 * flag will be set, mid layer will be asked to retry. In the next
833 * attempt, this flag will be checked in queuecommand() to set
834 * SYNC_COMPLETE flag in IOARCB (flag_0).
835 */
836 u8 sync_reqd;
837
838 /* target indicates the mapped target_id assigned to this resource if
839 * this is VSET resource. For non-VSET resources this will be un-used
840 * or zero
841 */
842 u8 target;
843 };
844
845 /* Data structures used in IOASC error code logging */
846 struct pmcraid_ioasc_error {
847 u32 ioasc_code; /* IOASC code */
848 u8 log_level; /* default log level assignment. */
849 char *error_string;
850 };
851
852 /* Initial log_level assignments for various IOASCs */
853 #define IOASC_LOG_LEVEL_NONE 0x0 /* no logging */
854 #define IOASC_LOG_LEVEL_MUST 0x1 /* must log: all high-severity errors */
855 #define IOASC_LOG_LEVEL_HARD 0x2 /* optional – low severity errors */
856
857 /* Error information maintained by LLD. LLD initializes the pmcraid_error_table
858 * statically.
859 */
860 static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = {
861 {0x01180600, IOASC_LOG_LEVEL_HARD,
862 "Recovered Error, soft media error, sector reassignment suggested"},
863 {0x015D0000, IOASC_LOG_LEVEL_HARD,
864 "Recovered Error, failure prediction thresold exceeded"},
865 {0x015D9200, IOASC_LOG_LEVEL_HARD,
866 "Recovered Error, soft Cache Card Battery error thresold"},
867 {0x015D9200, IOASC_LOG_LEVEL_HARD,
868 "Recovered Error, soft Cache Card Battery error thresold"},
869 {0x02048000, IOASC_LOG_LEVEL_HARD,
870 "Not Ready, IOA Reset Required"},
871 {0x02408500, IOASC_LOG_LEVEL_HARD,
872 "Not Ready, IOA microcode download required"},
873 {0x03110B00, IOASC_LOG_LEVEL_HARD,
874 "Medium Error, data unreadable, reassignment suggested"},
875 {0x03110C00, IOASC_LOG_LEVEL_MUST,
876 "Medium Error, data unreadable do not reassign"},
877 {0x03310000, IOASC_LOG_LEVEL_HARD,
878 "Medium Error, media corrupted"},
879 {0x04050000, IOASC_LOG_LEVEL_HARD,
880 "Hardware Error, IOA can't communicate with device"},
881 {0x04080000, IOASC_LOG_LEVEL_MUST,
882 "Hardware Error, device bus error"},
883 {0x04088000, IOASC_LOG_LEVEL_MUST,
884 "Hardware Error, device bus is not functioning"},
885 {0x04118000, IOASC_LOG_LEVEL_HARD,
886 "Hardware Error, IOA reserved area data check"},
887 {0x04118100, IOASC_LOG_LEVEL_HARD,
888 "Hardware Error, IOA reserved area invalid data pattern"},
889 {0x04118200, IOASC_LOG_LEVEL_HARD,
890 "Hardware Error, IOA reserved area LRC error"},
891 {0x04320000, IOASC_LOG_LEVEL_HARD,
892 "Hardware Error, reassignment space exhausted"},
893 {0x04330000, IOASC_LOG_LEVEL_HARD,
894 "Hardware Error, data transfer underlength error"},
895 {0x04330000, IOASC_LOG_LEVEL_HARD,
896 "Hardware Error, data transfer overlength error"},
897 {0x04418000, IOASC_LOG_LEVEL_MUST,
898 "Hardware Error, PCI bus error"},
899 {0x04440000, IOASC_LOG_LEVEL_HARD,
900 "Hardware Error, device error"},
901 {0x04448200, IOASC_LOG_LEVEL_MUST,
902 "Hardware Error, IOA error"},
903 {0x04448300, IOASC_LOG_LEVEL_HARD,
904 "Hardware Error, undefined device response"},
905 {0x04448400, IOASC_LOG_LEVEL_HARD,
906 "Hardware Error, IOA microcode error"},
907 {0x04448600, IOASC_LOG_LEVEL_HARD,
908 "Hardware Error, IOA reset required"},
909 {0x04449200, IOASC_LOG_LEVEL_HARD,
910 "Hardware Error, hard Cache Fearuee Card Battery error"},
911 {0x0444A000, IOASC_LOG_LEVEL_HARD,
912 "Hardware Error, failed device altered"},
913 {0x0444A200, IOASC_LOG_LEVEL_HARD,
914 "Hardware Error, data check after reassignment"},
915 {0x0444A300, IOASC_LOG_LEVEL_HARD,
916 "Hardware Error, LRC error after reassignment"},
917 {0x044A0000, IOASC_LOG_LEVEL_HARD,
918 "Hardware Error, device bus error (msg/cmd phase)"},
919 {0x04670400, IOASC_LOG_LEVEL_HARD,
920 "Hardware Error, new device can't be used"},
921 {0x04678000, IOASC_LOG_LEVEL_HARD,
922 "Hardware Error, invalid multiadapter configuration"},
923 {0x04678100, IOASC_LOG_LEVEL_HARD,
924 "Hardware Error, incorrect connection between enclosures"},
925 {0x04678200, IOASC_LOG_LEVEL_HARD,
926 "Hardware Error, connections exceed IOA design limits"},
927 {0x04678300, IOASC_LOG_LEVEL_HARD,
928 "Hardware Error, incorrect multipath connection"},
929 {0x04679000, IOASC_LOG_LEVEL_HARD,
930 "Hardware Error, command to LUN failed"},
931 {0x064C8000, IOASC_LOG_LEVEL_HARD,
932 "Unit Attention, cache exists for missing/failed device"},
933 {0x06670100, IOASC_LOG_LEVEL_HARD,
934 "Unit Attention, incompatible exposed mode device"},
935 {0x06670600, IOASC_LOG_LEVEL_HARD,
936 "Unit Attention, attachment of logical unit failed"},
937 {0x06678000, IOASC_LOG_LEVEL_HARD,
938 "Unit Attention, cables exceed connective design limit"},
939 {0x06678300, IOASC_LOG_LEVEL_HARD,
940 "Unit Attention, incomplete multipath connection between" \
941 "IOA and enclosure"},
942 {0x06678400, IOASC_LOG_LEVEL_HARD,
943 "Unit Attention, incomplete multipath connection between" \
944 "device and enclosure"},
945 {0x06678500, IOASC_LOG_LEVEL_HARD,
946 "Unit Attention, incomplete multipath connection between" \
947 "IOA and remote IOA"},
948 {0x06678600, IOASC_LOG_LEVEL_HARD,
949 "Unit Attention, missing remote IOA"},
950 {0x06679100, IOASC_LOG_LEVEL_HARD,
951 "Unit Attention, enclosure doesn't support required multipath" \
952 "function"},
953 {0x06698200, IOASC_LOG_LEVEL_HARD,
954 "Unit Attention, corrupt array parity detected on device"},
955 {0x066B0200, IOASC_LOG_LEVEL_HARD,
956 "Unit Attention, array exposed"},
957 {0x066B8200, IOASC_LOG_LEVEL_HARD,
958 "Unit Attention, exposed array is still protected"},
959 {0x066B9200, IOASC_LOG_LEVEL_HARD,
960 "Unit Attention, Multipath redundancy level got worse"},
961 {0x07270000, IOASC_LOG_LEVEL_HARD,
962 "Data Protect, device is read/write protected by IOA"},
963 {0x07278000, IOASC_LOG_LEVEL_HARD,
964 "Data Protect, IOA doesn't support device attribute"},
965 {0x07278100, IOASC_LOG_LEVEL_HARD,
966 "Data Protect, NVRAM mirroring prohibited"},
967 {0x07278400, IOASC_LOG_LEVEL_HARD,
968 "Data Protect, array is short 2 or more devices"},
969 {0x07278600, IOASC_LOG_LEVEL_HARD,
970 "Data Protect, exposed array is short a required device"},
971 {0x07278700, IOASC_LOG_LEVEL_HARD,
972 "Data Protect, array members not at required addresses"},
973 {0x07278800, IOASC_LOG_LEVEL_HARD,
974 "Data Protect, exposed mode device resource address conflict"},
975 {0x07278900, IOASC_LOG_LEVEL_HARD,
976 "Data Protect, incorrect resource address of exposed mode device"},
977 {0x07278A00, IOASC_LOG_LEVEL_HARD,
978 "Data Protect, Array is missing a device and parity is out of sync"},
979 {0x07278B00, IOASC_LOG_LEVEL_HARD,
980 "Data Protect, maximum number of arrays already exist"},
981 {0x07278C00, IOASC_LOG_LEVEL_HARD,
982 "Data Protect, cannot locate cache data for device"},
983 {0x07278D00, IOASC_LOG_LEVEL_HARD,
984 "Data Protect, cache data exits for a changed device"},
985 {0x07279100, IOASC_LOG_LEVEL_HARD,
986 "Data Protect, detection of a device requiring format"},
987 {0x07279200, IOASC_LOG_LEVEL_HARD,
988 "Data Protect, IOA exceeds maximum number of devices"},
989 {0x07279600, IOASC_LOG_LEVEL_HARD,
990 "Data Protect, missing array, volume set is not functional"},
991 {0x07279700, IOASC_LOG_LEVEL_HARD,
992 "Data Protect, single device for a volume set"},
993 {0x07279800, IOASC_LOG_LEVEL_HARD,
994 "Data Protect, missing multiple devices for a volume set"},
995 {0x07279900, IOASC_LOG_LEVEL_HARD,
996 "Data Protect, maximum number of volument sets already exists"},
997 {0x07279A00, IOASC_LOG_LEVEL_HARD,
998 "Data Protect, other volume set problem"},
999 };
1000
1001 /* macros to help in debugging */
1002 #define pmcraid_err(...) \
1003 printk(KERN_ERR "MaxRAID: "__VA_ARGS__)
1004
1005 #define pmcraid_info(...) \
1006 if (pmcraid_debug_log) \
1007 printk(KERN_INFO "MaxRAID: "__VA_ARGS__)
1008
1009 /* check if given command is a SCSI READ or SCSI WRITE command */
1010 #define SCSI_READ_CMD 0x1 /* any of SCSI READ commands */
1011 #define SCSI_WRITE_CMD 0x2 /* any of SCSI WRITE commands */
1012 #define SCSI_CMD_TYPE(opcode) \
1013 ({ u8 op = opcode; u8 __type = 0;\
1014 if (op == READ_6 || op == READ_10 || op == READ_12 || op == READ_16)\
1015 __type = SCSI_READ_CMD;\
1016 else if (op == WRITE_6 || op == WRITE_10 || op == WRITE_12 || \
1017 op == WRITE_16)\
1018 __type = SCSI_WRITE_CMD;\
1019 __type;\
1020 })
1021
1022 #define IS_SCSI_READ_WRITE(opcode) \
1023 ({ u8 __type = SCSI_CMD_TYPE(opcode); \
1024 (__type == SCSI_READ_CMD || __type == SCSI_WRITE_CMD) ? 1 : 0;\
1025 })
1026
1027
1028 /*
1029 * pmcraid_ioctl_header - definition of header structure that preceeds all the
1030 * buffers given as ioctl arguments.
1031 *
1032 * .signature : always ASCII string, "PMCRAID"
1033 * .reserved : not used
1034 * .buffer_length : length of the buffer following the header
1035 */
1036 struct pmcraid_ioctl_header {
1037 u8 signature[8];
1038 u32 reserved;
1039 u32 buffer_length;
1040 };
1041
1042 #define PMCRAID_IOCTL_SIGNATURE "PMCRAID"
1043
1044 /*
1045 * pmcraid_passthrough_ioctl_buffer - structure given as argument to
1046 * passthrough(or firmware handled) IOCTL commands. Note that ioarcb requires
1047 * 32-byte alignment so, it is necessary to pack this structure to avoid any
1048 * holes between ioctl_header and passthrough buffer
1049 *
1050 * .ioactl_header : ioctl header
1051 * .ioarcb : filled-up ioarcb buffer, driver always reads this buffer
1052 * .ioasa : buffer for ioasa, driver fills this with IOASA from firmware
1053 * .request_buffer: The I/O buffer (flat), driver reads/writes to this based on
1054 * the transfer directions passed in ioarcb.flags0. Contents
1055 * of this buffer are valid only when ioarcb.data_transfer_len
1056 * is not zero.
1057 */
1058 struct pmcraid_passthrough_ioctl_buffer {
1059 struct pmcraid_ioctl_header ioctl_header;
1060 struct pmcraid_ioarcb ioarcb;
1061 struct pmcraid_ioasa ioasa;
1062 u8 request_buffer[1];
1063 } __attribute__ ((packed));
1064
1065 /*
1066 * keys to differentiate between driver handled IOCTLs and passthrough
1067 * IOCTLs passed to IOA. driver determines the ioctl type using macro
1068 * _IOC_TYPE
1069 */
1070 #define PMCRAID_DRIVER_IOCTL 'D'
1071 #define PMCRAID_PASSTHROUGH_IOCTL 'F'
1072
1073 #define DRV_IOCTL(n, size) \
1074 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_DRIVER_IOCTL, (n), (size))
1075
1076 #define FMW_IOCTL(n, size) \
1077 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_PASSTHROUGH_IOCTL, (n), (size))
1078
1079 /*
1080 * _ARGSIZE: macro that gives size of the argument type passed to an IOCTL cmd.
1081 * This is to facilitate applications avoiding un-necessary memory allocations.
1082 * For example, most of driver handled ioctls do not require ioarcb, ioasa.
1083 */
1084 #define _ARGSIZE(arg) (sizeof(struct pmcraid_ioctl_header) + sizeof(arg))
1085
1086 /* Driver handled IOCTL command definitions */
1087
1088 #define PMCRAID_IOCTL_RESET_ADAPTER \
1089 DRV_IOCTL(5, sizeof(struct pmcraid_ioctl_header))
1090
1091 /* passthrough/firmware handled commands */
1092 #define PMCRAID_IOCTL_PASSTHROUGH_COMMAND \
1093 FMW_IOCTL(1, sizeof(struct pmcraid_passthrough_ioctl_buffer))
1094
1095 #define PMCRAID_IOCTL_DOWNLOAD_MICROCODE \
1096 FMW_IOCTL(2, sizeof(struct pmcraid_passthrough_ioctl_buffer))
1097
1098
1099 #endif /* _PMCRAID_H */
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