1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2010 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_MIXX_DEFS_H__
29 #define __CVMX_MIXX_DEFS_H__
31 #define CVMX_MIXX_BIST(offset) (CVMX_ADD_IO_SEG(0x0001070000100078ull) + ((offset) & 1) * 2048)
32 #define CVMX_MIXX_CTL(offset) (CVMX_ADD_IO_SEG(0x0001070000100020ull) + ((offset) & 1) * 2048)
33 #define CVMX_MIXX_INTENA(offset) (CVMX_ADD_IO_SEG(0x0001070000100050ull) + ((offset) & 1) * 2048)
34 #define CVMX_MIXX_IRCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100030ull) + ((offset) & 1) * 2048)
35 #define CVMX_MIXX_IRHWM(offset) (CVMX_ADD_IO_SEG(0x0001070000100028ull) + ((offset) & 1) * 2048)
36 #define CVMX_MIXX_IRING1(offset) (CVMX_ADD_IO_SEG(0x0001070000100010ull) + ((offset) & 1) * 2048)
37 #define CVMX_MIXX_IRING2(offset) (CVMX_ADD_IO_SEG(0x0001070000100018ull) + ((offset) & 1) * 2048)
38 #define CVMX_MIXX_ISR(offset) (CVMX_ADD_IO_SEG(0x0001070000100048ull) + ((offset) & 1) * 2048)
39 #define CVMX_MIXX_ORCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100040ull) + ((offset) & 1) * 2048)
40 #define CVMX_MIXX_ORHWM(offset) (CVMX_ADD_IO_SEG(0x0001070000100038ull) + ((offset) & 1) * 2048)
41 #define CVMX_MIXX_ORING1(offset) (CVMX_ADD_IO_SEG(0x0001070000100000ull) + ((offset) & 1) * 2048)
42 #define CVMX_MIXX_ORING2(offset) (CVMX_ADD_IO_SEG(0x0001070000100008ull) + ((offset) & 1) * 2048)
43 #define CVMX_MIXX_REMCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100058ull) + ((offset) & 1) * 2048)
44 #define CVMX_MIXX_TSCTL(offset) (CVMX_ADD_IO_SEG(0x0001070000100068ull) + ((offset) & 1) * 2048)
45 #define CVMX_MIXX_TSTAMP(offset) (CVMX_ADD_IO_SEG(0x0001070000100060ull) + ((offset) & 1) * 2048)
47 union cvmx_mixx_bist
{
49 struct cvmx_mixx_bist_s
{
50 uint64_t reserved_6_63
:58;
58 struct cvmx_mixx_bist_cn52xx
{
59 uint64_t reserved_4_63
:60;
65 struct cvmx_mixx_bist_cn52xx cn52xxp1
;
66 struct cvmx_mixx_bist_cn52xx cn56xx
;
67 struct cvmx_mixx_bist_cn52xx cn56xxp1
;
68 struct cvmx_mixx_bist_s cn63xx
;
69 struct cvmx_mixx_bist_s cn63xxp1
;
74 struct cvmx_mixx_ctl_s
{
75 uint64_t reserved_12_63
:52;
85 struct cvmx_mixx_ctl_cn52xx
{
86 uint64_t reserved_8_63
:56;
95 struct cvmx_mixx_ctl_cn52xx cn52xxp1
;
96 struct cvmx_mixx_ctl_cn52xx cn56xx
;
97 struct cvmx_mixx_ctl_cn52xx cn56xxp1
;
98 struct cvmx_mixx_ctl_s cn63xx
;
99 struct cvmx_mixx_ctl_s cn63xxp1
;
102 union cvmx_mixx_intena
{
104 struct cvmx_mixx_intena_s
{
105 uint64_t reserved_8_63
:56;
109 uint64_t data_drpena
:1;
115 struct cvmx_mixx_intena_cn52xx
{
116 uint64_t reserved_7_63
:57;
119 uint64_t data_drpena
:1;
125 struct cvmx_mixx_intena_cn52xx cn52xxp1
;
126 struct cvmx_mixx_intena_cn52xx cn56xx
;
127 struct cvmx_mixx_intena_cn52xx cn56xxp1
;
128 struct cvmx_mixx_intena_s cn63xx
;
129 struct cvmx_mixx_intena_s cn63xxp1
;
132 union cvmx_mixx_ircnt
{
134 struct cvmx_mixx_ircnt_s
{
135 uint64_t reserved_20_63
:44;
138 struct cvmx_mixx_ircnt_s cn52xx
;
139 struct cvmx_mixx_ircnt_s cn52xxp1
;
140 struct cvmx_mixx_ircnt_s cn56xx
;
141 struct cvmx_mixx_ircnt_s cn56xxp1
;
142 struct cvmx_mixx_ircnt_s cn63xx
;
143 struct cvmx_mixx_ircnt_s cn63xxp1
;
146 union cvmx_mixx_irhwm
{
148 struct cvmx_mixx_irhwm_s
{
149 uint64_t reserved_40_63
:24;
153 struct cvmx_mixx_irhwm_s cn52xx
;
154 struct cvmx_mixx_irhwm_s cn52xxp1
;
155 struct cvmx_mixx_irhwm_s cn56xx
;
156 struct cvmx_mixx_irhwm_s cn56xxp1
;
157 struct cvmx_mixx_irhwm_s cn63xx
;
158 struct cvmx_mixx_irhwm_s cn63xxp1
;
161 union cvmx_mixx_iring1
{
163 struct cvmx_mixx_iring1_s
{
164 uint64_t reserved_60_63
:4;
167 uint64_t reserved_0_2
:3;
169 struct cvmx_mixx_iring1_cn52xx
{
170 uint64_t reserved_60_63
:4;
172 uint64_t reserved_36_39
:4;
174 uint64_t reserved_0_2
:3;
176 struct cvmx_mixx_iring1_cn52xx cn52xxp1
;
177 struct cvmx_mixx_iring1_cn52xx cn56xx
;
178 struct cvmx_mixx_iring1_cn52xx cn56xxp1
;
179 struct cvmx_mixx_iring1_s cn63xx
;
180 struct cvmx_mixx_iring1_s cn63xxp1
;
183 union cvmx_mixx_iring2
{
185 struct cvmx_mixx_iring2_s
{
186 uint64_t reserved_52_63
:12;
188 uint64_t reserved_20_31
:12;
191 struct cvmx_mixx_iring2_s cn52xx
;
192 struct cvmx_mixx_iring2_s cn52xxp1
;
193 struct cvmx_mixx_iring2_s cn56xx
;
194 struct cvmx_mixx_iring2_s cn56xxp1
;
195 struct cvmx_mixx_iring2_s cn63xx
;
196 struct cvmx_mixx_iring2_s cn63xxp1
;
199 union cvmx_mixx_isr
{
201 struct cvmx_mixx_isr_s
{
202 uint64_t reserved_8_63
:56;
212 struct cvmx_mixx_isr_cn52xx
{
213 uint64_t reserved_7_63
:57;
222 struct cvmx_mixx_isr_cn52xx cn52xxp1
;
223 struct cvmx_mixx_isr_cn52xx cn56xx
;
224 struct cvmx_mixx_isr_cn52xx cn56xxp1
;
225 struct cvmx_mixx_isr_s cn63xx
;
226 struct cvmx_mixx_isr_s cn63xxp1
;
229 union cvmx_mixx_orcnt
{
231 struct cvmx_mixx_orcnt_s
{
232 uint64_t reserved_20_63
:44;
235 struct cvmx_mixx_orcnt_s cn52xx
;
236 struct cvmx_mixx_orcnt_s cn52xxp1
;
237 struct cvmx_mixx_orcnt_s cn56xx
;
238 struct cvmx_mixx_orcnt_s cn56xxp1
;
239 struct cvmx_mixx_orcnt_s cn63xx
;
240 struct cvmx_mixx_orcnt_s cn63xxp1
;
243 union cvmx_mixx_orhwm
{
245 struct cvmx_mixx_orhwm_s
{
246 uint64_t reserved_20_63
:44;
249 struct cvmx_mixx_orhwm_s cn52xx
;
250 struct cvmx_mixx_orhwm_s cn52xxp1
;
251 struct cvmx_mixx_orhwm_s cn56xx
;
252 struct cvmx_mixx_orhwm_s cn56xxp1
;
253 struct cvmx_mixx_orhwm_s cn63xx
;
254 struct cvmx_mixx_orhwm_s cn63xxp1
;
257 union cvmx_mixx_oring1
{
259 struct cvmx_mixx_oring1_s
{
260 uint64_t reserved_60_63
:4;
263 uint64_t reserved_0_2
:3;
265 struct cvmx_mixx_oring1_cn52xx
{
266 uint64_t reserved_60_63
:4;
268 uint64_t reserved_36_39
:4;
270 uint64_t reserved_0_2
:3;
272 struct cvmx_mixx_oring1_cn52xx cn52xxp1
;
273 struct cvmx_mixx_oring1_cn52xx cn56xx
;
274 struct cvmx_mixx_oring1_cn52xx cn56xxp1
;
275 struct cvmx_mixx_oring1_s cn63xx
;
276 struct cvmx_mixx_oring1_s cn63xxp1
;
279 union cvmx_mixx_oring2
{
281 struct cvmx_mixx_oring2_s
{
282 uint64_t reserved_52_63
:12;
284 uint64_t reserved_20_31
:12;
287 struct cvmx_mixx_oring2_s cn52xx
;
288 struct cvmx_mixx_oring2_s cn52xxp1
;
289 struct cvmx_mixx_oring2_s cn56xx
;
290 struct cvmx_mixx_oring2_s cn56xxp1
;
291 struct cvmx_mixx_oring2_s cn63xx
;
292 struct cvmx_mixx_oring2_s cn63xxp1
;
295 union cvmx_mixx_remcnt
{
297 struct cvmx_mixx_remcnt_s
{
298 uint64_t reserved_52_63
:12;
300 uint64_t reserved_20_31
:12;
303 struct cvmx_mixx_remcnt_s cn52xx
;
304 struct cvmx_mixx_remcnt_s cn52xxp1
;
305 struct cvmx_mixx_remcnt_s cn56xx
;
306 struct cvmx_mixx_remcnt_s cn56xxp1
;
307 struct cvmx_mixx_remcnt_s cn63xx
;
308 struct cvmx_mixx_remcnt_s cn63xxp1
;
311 union cvmx_mixx_tsctl
{
313 struct cvmx_mixx_tsctl_s
{
314 uint64_t reserved_21_63
:43;
316 uint64_t reserved_13_15
:3;
318 uint64_t reserved_5_7
:3;
321 struct cvmx_mixx_tsctl_s cn63xx
;
322 struct cvmx_mixx_tsctl_s cn63xxp1
;
325 union cvmx_mixx_tstamp
{
327 struct cvmx_mixx_tstamp_s
{
330 struct cvmx_mixx_tstamp_s cn63xx
;
331 struct cvmx_mixx_tstamp_s cn63xxp1
;