The x86 timer interrupt handler is the only handler not traced in the
[linux-2.6/next.git] / arch / mips / include / asm / pmc-sierra / msp71xx / msp_int.h
blob1d9f0547482072ff9726e2e1f4cd9e515da8d8ba
1 /*
2 * Defines for the MSP interrupt handlers.
4 * Copyright (C) 2005, PMC-Sierra, Inc. All rights reserved.
5 * Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
7 * ########################################################################
9 * This program is free software; you can distribute it and/or modify it
10 * under the terms of the GNU General Public License (Version 2) as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
22 * ########################################################################
25 #ifndef _MSP_INT_H
26 #define _MSP_INT_H
29 * The PMC-Sierra MSP product line has at least two different interrupt
30 * controllers, the SLP register based scheme and the CIC interrupt
31 * controller block mechanism. This file distinguishes between them
32 * so that devices see a uniform interface.
35 #if defined(CONFIG_IRQ_MSP_SLP)
36 #include "msp_slp_int.h"
37 #elif defined(CONFIG_IRQ_MSP_CIC)
38 #include "msp_cic_int.h"
39 #else
40 #error "What sort of interrupt controller does *your* MSP have?"
41 #endif
43 #endif /* !_MSP_INT_H */