drivers/media/dvb/frontends/nxt6000_priv.h

   1 /*
   2  * Public Include File for DRV6000 users
   3  * (ie. NxtWave Communications - NXT6000 demodulator driver)
   4  *
   5  * Copyright (C) 2001 NxtWave Communications, Inc.
   6  *
   7  */
   8
   9 /*  Nxt6000 Register Addresses and Bit Masks */
  10
  11 /* Maximum Register Number */
  12 #define MAXNXT6000REG          (0x9A)
  13
  14 /* 0x1B A_VIT_BER_0  aka 0x3A */
  15 #define A_VIT_BER_0            (0x1B)
  16
  17 /* 0x1D A_VIT_BER_TIMER_0 aka 0x38 */
  18 #define A_VIT_BER_TIMER_0      (0x1D)
  19
  20 /* 0x21 RS_COR_STAT */
  21 #define RS_COR_STAT            (0x21)
  22 #define RSCORESTATUS           (0x03)
  23
  24 /* 0x22 RS_COR_INTEN */
  25 #define RS_COR_INTEN           (0x22)
  26
  27 /* 0x23 RS_COR_INSTAT */
  28 #define RS_COR_INSTAT          (0x23)
  29 #define INSTAT_ERROR           (0x04)
  30 #define LOCK_LOSS_BITS         (0x03)
  31
  32 /* 0x24 RS_COR_SYNC_PARAM */
  33 #define RS_COR_SYNC_PARAM      (0x24)
  34 #define SYNC_PARAM             (0x03)
  35
  36 /* 0x25 BER_CTRL */
  37 #define BER_CTRL               (0x25)
  38 #define BER_ENABLE             (0x02)
  39 #define BER_RESET              (0x01)
  40
  41 /* 0x26 BER_PAY */
  42 #define BER_PAY                (0x26)
  43
  44 /* 0x27 BER_PKT_L */
  45 #define BER_PKT_L              (0x27)
  46 #define BER_PKTOVERFLOW        (0x80)
  47
  48 /* 0x30 VIT_COR_CTL */
  49 #define VIT_COR_CTL            (0x30)
  50 #define BER_CONTROL            (0x02)
  51 #define VIT_COR_MASK           (0x82)
  52 #define VIT_COR_RESYNC         (0x80)
  53
  54
  55 /* 0x32 VIT_SYNC_STATUS */
  56 #define VIT_SYNC_STATUS        (0x32)
  57 #define VITINSYNC              (0x80)
  58
  59 /* 0x33 VIT_COR_INTEN */
  60 #define VIT_COR_INTEN          (0x33)
  61 #define GLOBAL_ENABLE          (0x80)
  62
  63 /* 0x34 VIT_COR_INTSTAT */
  64 #define VIT_COR_INTSTAT        (0x34)
  65 #define BER_DONE               (0x08)
  66 #define BER_OVERFLOW           (0x10)
  67
  68                              /* 0x38 OFDM_BERTimer *//* Use the alias registers */
  69 #define A_VIT_BER_TIMER_0      (0x1D)
  70
  71                              /* 0x3A VIT_BER_TIMER_0 *//* Use the alias registers */
  72 #define A_VIT_BER_0            (0x1B)
  73
  74 /* 0x40 OFDM_COR_CTL */
  75 #define OFDM_COR_CTL           (0x40)
  76 #define COREACT                (0x20)
  77 #define HOLDSM                 (0x10)
  78 #define WAIT_AGC               (0x02)
  79 #define WAIT_SYR               (0x03)
  80
  81 /* 0x41 OFDM_COR_STAT */
  82 #define OFDM_COR_STAT          (0x41)
  83 #define COR_STATUS             (0x0F)
  84 #define MONITOR_TPS            (0x06)
  85 #define TPSLOCKED              (0x40)
  86 #define AGCLOCKED              (0x10)
  87
  88 /* 0x42 OFDM_COR_INTEN */
  89 #define OFDM_COR_INTEN         (0x42)
  90 #define TPSRCVBAD              (0x04)
  91 #define TPSRCVCHANGED         (0x02)
  92 #define TPSRCVUPDATE           (0x01)
  93
  94 /* 0x43 OFDM_COR_INSTAT */
  95 #define OFDM_COR_INSTAT        (0x43)
  96
  97 /* 0x44 OFDM_COR_MODEGUARD */
  98 #define OFDM_COR_MODEGUARD     (0x44)
  99 #define FORCEMODE              (0x08)
 100 #define FORCEMODE8K                        (0x04)
 101
 102 /* 0x45 OFDM_AGC_CTL */
 103 #define OFDM_AGC_CTL           (0x45)
 104 #define INITIAL_AGC_BW             (0x08)
 105 #define AGCNEG                 (0x02)
 106 #define AGCLAST                            (0x10)
 107
 108 /* 0x48 OFDM_AGC_TARGET */
 109 #define OFDM_AGC_TARGET            (0x48)
 110 #define OFDM_AGC_TARGET_DEFAULT (0x28)
 111 #define OFDM_AGC_TARGET_IMPULSE (0x38)
 112
 113 /* 0x49 OFDM_AGC_GAIN_1 */
 114 #define OFDM_AGC_GAIN_1        (0x49)
 115
 116 /* 0x4B OFDM_ITB_CTL */
 117 #define OFDM_ITB_CTL           (0x4B)
 118 #define ITBINV                 (0x01)
 119
 120 /* 0x4C OFDM_ITB_FREQ_1 */
 121 #define OFDM_ITB_FREQ_1        (0x4C)
 122
 123 /* 0x4D OFDM_ITB_FREQ_2 */
 124 #define OFDM_ITB_FREQ_2        (0x4D)
 125
 126 /* 0x4E  OFDM_CAS_CTL */
 127 #define OFDM_CAS_CTL           (0x4E)
 128 #define ACSDIS                 (0x40)
 129 #define CCSEN                  (0x80)
 130
 131 /* 0x4F CAS_FREQ */
 132 #define CAS_FREQ               (0x4F)
 133
 134 /* 0x51 OFDM_SYR_CTL */
 135 #define OFDM_SYR_CTL           (0x51)
 136 #define SIXTH_ENABLE           (0x80)
 137 #define SYR_TRACKING_DISABLE   (0x01)
 138
 139 /* 0x52 OFDM_SYR_STAT */
 140 #define OFDM_SYR_STAT              (0x52)
 141 #define GI14_2K_SYR_LOCK           (0x13)
 142 #define GI14_8K_SYR_LOCK           (0x17)
 143 #define GI14_SYR_LOCK              (0x10)
 144
 145 /* 0x55 OFDM_SYR_OFFSET_1 */
 146 #define OFDM_SYR_OFFSET_1      (0x55)
 147
 148 /* 0x56 OFDM_SYR_OFFSET_2 */
 149 #define OFDM_SYR_OFFSET_2      (0x56)
 150
 151 /* 0x58 OFDM_SCR_CTL */
 152 #define OFDM_SCR_CTL           (0x58)
 153 #define SYR_ADJ_DECAY_MASK     (0x70)
 154 #define SYR_ADJ_DECAY          (0x30)
 155
 156 /* 0x59 OFDM_PPM_CTL_1 */
 157 #define OFDM_PPM_CTL_1         (0x59)
 158 #define PPMMAX_MASK            (0x30)
 159 #define PPM256                             (0x30)
 160
 161 /* 0x5B OFDM_TRL_NOMINALRATE_1 */
 162 #define OFDM_TRL_NOMINALRATE_1 (0x5B)
 163
 164 /* 0x5C OFDM_TRL_NOMINALRATE_2 */
 165 #define OFDM_TRL_NOMINALRATE_2 (0x5C)
 166
 167 /* 0x5D OFDM_TRL_TIME_1 */
 168 #define OFDM_TRL_TIME_1        (0x5D)
 169
 170 /* 0x60 OFDM_CRL_FREQ_1 */
 171 #define OFDM_CRL_FREQ_1        (0x60)
 172
 173 /* 0x63 OFDM_CHC_CTL_1 */
 174 #define OFDM_CHC_CTL_1         (0x63)
 175 #define MANMEAN1               (0xF0);
 176 #define CHCFIR                 (0x01)
 177
 178 /* 0x64 OFDM_CHC_SNR */
 179 #define OFDM_CHC_SNR           (0x64)
 180
 181 /* 0x65 OFDM_BDI_CTL */
 182 #define OFDM_BDI_CTL           (0x65)
 183 #define LP_SELECT              (0x02)
 184
 185 /* 0x67 OFDM_TPS_RCVD_1 */
 186 #define OFDM_TPS_RCVD_1        (0x67)
 187 #define TPSFRAME               (0x03)
 188
 189 /* 0x68 OFDM_TPS_RCVD_2 */
 190 #define OFDM_TPS_RCVD_2        (0x68)
 191
 192 /* 0x69 OFDM_TPS_RCVD_3 */
 193 #define OFDM_TPS_RCVD_3        (0x69)
 194
 195 /* 0x6A OFDM_TPS_RCVD_4 */
 196 #define OFDM_TPS_RCVD_4        (0x6A)
 197
 198 /* 0x6B OFDM_TPS_RESERVED_1 */
 199 #define OFDM_TPS_RESERVED_1    (0x6B)
 200
 201 /* 0x6C OFDM_TPS_RESERVED_2 */
 202 #define OFDM_TPS_RESERVED_2    (0x6C)
 203
 204 /* 0x73 OFDM_MSC_REV */
 205 #define OFDM_MSC_REV           (0x73)
 206
 207 /* 0x76 OFDM_SNR_CARRIER_2 */
 208 #define OFDM_SNR_CARRIER_2     (0x76)
 209 #define MEAN_MASK              (0x80)
 210 #define MEANBIT                (0x80)
 211
 212 /* 0x80 ANALOG_CONTROL_0 */
 213 #define ANALOG_CONTROL_0       (0x80)
 214 #define POWER_DOWN_ADC         (0x40)
 215
 216 /* 0x81 ENABLE_TUNER_IIC */
 217 #define ENABLE_TUNER_IIC       (0x81)
 218 #define ENABLE_TUNER_BIT       (0x01)
 219
 220 /* 0x82 EN_DMD_RACQ */
 221 #define EN_DMD_RACQ            (0x82)
 222 #define EN_DMD_RACQ_REG_VAL    (0x81)
 223 #define EN_DMD_RACQ_REG_VAL_14 (0x01)
 224
 225 /* 0x84 SNR_COMMAND */
 226 #define SNR_COMMAND            (0x84)
 227 #define SNRStat                (0x80)
 228
 229 /* 0x85 SNRCARRIERNUMBER_LSB */
 230 #define SNRCARRIERNUMBER_LSB   (0x85)
 231
 232 /* 0x87 SNRMINTHRESHOLD_LSB */
 233 #define SNRMINTHRESHOLD_LSB    (0x87)
 234
 235 /* 0x89 SNR_PER_CARRIER_LSB */
 236 #define SNR_PER_CARRIER_LSB    (0x89)
 237
 238 /* 0x8B SNRBELOWTHRESHOLD_LSB */
 239 #define SNRBELOWTHRESHOLD_LSB  (0x8B)
 240
 241 /* 0x91 RF_AGC_VAL_1 */
 242 #define RF_AGC_VAL_1           (0x91)
 243
 244 /* 0x92 RF_AGC_STATUS */
 245 #define RF_AGC_STATUS          (0x92)
 246
 247 /* 0x98 DIAG_CONFIG */
 248 #define DIAG_CONFIG            (0x98)
 249 #define DIAG_MASK              (0x70)
 250 #define TB_SET                 (0x10)
 251 #define TRAN_SELECT            (0x07)
 252 #define SERIAL_SELECT          (0x01)
 253
 254 /* 0x99 SUB_DIAG_MODE_SEL */
 255 #define SUB_DIAG_MODE_SEL      (0x99)
 256 #define CLKINVERSION           (0x01)
 257
 258 /* 0x9A TS_FORMAT */
 259 #define TS_FORMAT              (0x9A)
 260 #define ERROR_SENSE            (0x08)
 261 #define VALID_SENSE            (0x04)
 262 #define SYNC_SENSE             (0x02)
 263 #define GATED_CLOCK            (0x01)
 264
 265 #define NXT6000ASICDEVICE      (0x0b)