1 /* drivers/serial/serial_lh7a40x.c
3 * Copyright (C) 2004 Coastal Environmental Systems
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * version 2 as published by the Free Software Foundation.
11 /* Driver for Sharp LH7A40X embedded serial ports
13 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
14 * Based on drivers/serial/amba.c, by Deep Blue Solutions Ltd.
18 * This driver supports the embedded UARTs of the Sharp LH7A40X series
19 * CPUs. While similar to the 16550 and other UART chips, there is
20 * nothing close to register compatibility. Moreover, some of the
21 * modem control lines are not available, either in the chip or they
22 * are lacking in the board-level implementation.
25 * For simplicity, we disable the IR functions of any UART whenever
30 #include <linux/config.h>
32 #if defined(CONFIG_SERIAL_LH7A40X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
36 #include <linux/module.h>
37 #include <linux/ioport.h>
38 #include <linux/init.h>
39 #include <linux/console.h>
40 #include <linux/sysrq.h>
41 #include <linux/tty.h>
42 #include <linux/tty_flip.h>
43 #include <linux/serial_core.h>
44 #include <linux/serial.h>
53 #define ISR_LOOP_LIMIT 256
55 #define UR(p,o) _UR ((p)->membase, o)
56 #define _UR(b,o) (*((volatile unsigned int*)(((unsigned char*) b) + (o))))
57 #define BIT_CLR(p,o,m) UR(p,o) = UR(p,o) & (~(unsigned int)m)
58 #define BIT_SET(p,o,m) UR(p,o) = UR(p,o) | ( (unsigned int)m)
60 #define UART_REG_SIZE 32
62 #define UART_R_DATA (0x00)
63 #define UART_R_FCON (0x04)
64 #define UART_R_BRCON (0x08)
65 #define UART_R_CON (0x0c)
66 #define UART_R_STATUS (0x10)
67 #define UART_R_RAWISR (0x14)
68 #define UART_R_INTEN (0x18)
69 #define UART_R_ISR (0x1c)
71 #define UARTEN (0x01) /* UART enable */
72 #define SIRDIS (0x02) /* Serial IR disable (UART1 only) */
74 #define RxEmpty (0x10)
75 #define TxEmpty (0x80)
77 #define nRxRdy RxEmpty
81 #define RxBreak (0x0800)
82 #define RxOverrunError (0x0400)
83 #define RxParityError (0x0200)
84 #define RxFramingError (0x0100)
85 #define RxError (RxBreak | RxOverrunError | RxParityError | RxFramingError)
93 #define ModemInt (0x04)
94 #define RxTimeoutInt (0x08)
100 #define WLEN_6 (0x20)
101 #define WLEN_5 (0x00)
102 #define WLEN (0x60) /* Mask for all word-length bits */
104 #define PEN (0x02) /* Parity Enable */
105 #define EPS (0x04) /* Even Parity Set */
106 #define FEN (0x10) /* FIFO Enable */
107 #define BRK (0x01) /* Send Break */
110 struct uart_port_lh7a40x
{
111 struct uart_port port
;
112 unsigned int statusPrev
; /* Most recently read modem status */
115 static void lh7a40xuart_stop_tx (struct uart_port
* port
, unsigned int tty_stop
)
117 BIT_CLR (port
, UART_R_INTEN
, TxInt
);
120 static void lh7a40xuart_start_tx (struct uart_port
* port
,
121 unsigned int tty_start
)
123 BIT_SET (port
, UART_R_INTEN
, TxInt
);
125 /* *** FIXME: do I need to check for startup of the
126 transmitter? The old driver did, but AMBA
130 static void lh7a40xuart_stop_rx (struct uart_port
* port
)
132 BIT_SET (port
, UART_R_INTEN
, RxTimeoutInt
| RxInt
);
135 static void lh7a40xuart_enable_ms (struct uart_port
* port
)
137 BIT_SET (port
, UART_R_INTEN
, ModemInt
);
142 lh7a40xuart_rx_chars (struct uart_port
* port
, struct pt_regs
* regs
)
144 lh7a40xuart_rx_chars (struct uart_port
* port
)
147 struct tty_struct
* tty
= port
->info
->tty
;
148 int cbRxMax
= 256; /* (Gross) limit on receive */
149 unsigned int data
, flag
;/* Received data and status */
151 while (!(UR (port
, UART_R_STATUS
) & nRxRdy
) && --cbRxMax
) {
152 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
) {
153 if (tty
->low_latency
)
154 tty_flip_buffer_push(tty
);
156 * If this failed then we will throw away the
157 * bytes but must do so to clear interrupts
161 data
= UR (port
, UART_R_DATA
);
165 if (data
& RxError
) { /* Quick check, short-circuit */
166 if (data
& RxBreak
) {
167 data
&= ~(RxFramingError
| RxParityError
);
169 if (uart_handle_break (port
))
172 else if (data
& RxParityError
)
173 ++port
->icount
.parity
;
174 else if (data
& RxFramingError
)
175 ++port
->icount
.frame
;
176 if (data
& RxOverrunError
)
177 ++port
->icount
.overrun
;
179 /* Mask by termios, leave Rx'd byte */
180 data
&= port
->read_status_mask
| 0xff;
184 else if (data
& RxParityError
)
186 else if (data
& RxFramingError
)
190 if (uart_handle_sysrq_char (port
, (unsigned char) data
, regs
))
193 if ((data
& port
->ignore_status_mask
) == 0) {
194 tty_insert_flip_char(tty
, data
, flag
);
196 if ((data
& RxOverrunError
)
197 && tty
->flip
.count
< TTY_FLIPBUF_SIZE
) {
199 * Overrun is special, since it's reported
200 * immediately, and doesn't affect the current
203 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
206 tty_flip_buffer_push (tty
);
210 static void lh7a40xuart_tx_chars (struct uart_port
* port
)
212 struct circ_buf
* xmit
= &port
->info
->xmit
;
213 int cbTxMax
= port
->fifosize
;
216 UR (port
, UART_R_DATA
) = port
->x_char
;
221 if (uart_circ_empty (xmit
) || uart_tx_stopped (port
)) {
222 lh7a40xuart_stop_tx (port
, 0);
226 /* Unlike the AMBA UART, the lh7a40x UART does not guarantee
227 that at least half of the FIFO is empty. Instead, we check
228 status for every character. Using the AMBA method causes
229 the transmitter to drop characters. */
232 UR (port
, UART_R_DATA
) = xmit
->buf
[xmit
->tail
];
233 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
235 if (uart_circ_empty(xmit
))
237 } while (!(UR (port
, UART_R_STATUS
) & nTxRdy
)
240 if (uart_circ_chars_pending (xmit
) < WAKEUP_CHARS
)
241 uart_write_wakeup (port
);
243 if (uart_circ_empty (xmit
))
244 lh7a40xuart_stop_tx (port
, 0);
247 static void lh7a40xuart_modem_status (struct uart_port
* port
)
249 unsigned int status
= UR (port
, UART_R_STATUS
);
251 = status
^ ((struct uart_port_lh7a40x
*) port
)->statusPrev
;
253 BIT_SET (port
, UART_R_RAWISR
, MSEOI
); /* Clear modem status intr */
255 if (!delta
) /* Only happens if we missed 2 transitions */
258 ((struct uart_port_lh7a40x
*) port
)->statusPrev
= status
;
261 uart_handle_dcd_change (port
, status
& DCD
);
267 uart_handle_cts_change (port
, status
& CTS
);
269 wake_up_interruptible (&port
->info
->delta_msr_wait
);
272 static irqreturn_t
lh7a40xuart_int (int irq
, void* dev_id
,
273 struct pt_regs
* regs
)
275 struct uart_port
* port
= dev_id
;
276 unsigned int cLoopLimit
= ISR_LOOP_LIMIT
;
277 unsigned int isr
= UR (port
, UART_R_ISR
);
281 if (isr
& (RxInt
| RxTimeoutInt
))
283 lh7a40xuart_rx_chars(port
, regs
);
285 lh7a40xuart_rx_chars(port
);
288 lh7a40xuart_modem_status (port
);
290 lh7a40xuart_tx_chars (port
);
292 if (--cLoopLimit
== 0)
295 isr
= UR (port
, UART_R_ISR
);
296 } while (isr
& (RxInt
| TxInt
| RxTimeoutInt
));
301 static unsigned int lh7a40xuart_tx_empty (struct uart_port
* port
)
303 return (UR (port
, UART_R_STATUS
) & TxEmpty
) ? TIOCSER_TEMT
: 0;
306 static unsigned int lh7a40xuart_get_mctrl (struct uart_port
* port
)
308 unsigned int result
= 0;
309 unsigned int status
= UR (port
, UART_R_STATUS
);
321 static void lh7a40xuart_set_mctrl (struct uart_port
* port
, unsigned int mctrl
)
323 /* None of the ports supports DTR. UART1 supports RTS through GPIO. */
324 /* Note, kernel appears to be setting DTR and RTS on console. */
326 /* *** FIXME: this deserves more work. There's some work in
327 tracing all of the IO pins. */
329 if( port
->mapbase
== UART1_PHYS
) {
330 gpioRegs_t
*gpio
= (gpioRegs_t
*)IO_ADDRESS(GPIO_PHYS
);
332 if (mctrl
& TIOCM_RTS
)
333 gpio
->pbdr
&= ~GPIOB_UART1_RTS
;
335 gpio
->pbdr
|= GPIOB_UART1_RTS
;
340 static void lh7a40xuart_break_ctl (struct uart_port
* port
, int break_state
)
344 spin_lock_irqsave(&port
->lock
, flags
);
345 if (break_state
== -1)
346 BIT_SET (port
, UART_R_FCON
, BRK
); /* Assert break */
348 BIT_CLR (port
, UART_R_FCON
, BRK
); /* Deassert break */
349 spin_unlock_irqrestore(&port
->lock
, flags
);
352 static int lh7a40xuart_startup (struct uart_port
* port
)
356 retval
= request_irq (port
->irq
, lh7a40xuart_int
, 0,
357 "serial_lh7a40x", port
);
361 /* Initial modem control-line settings */
362 ((struct uart_port_lh7a40x
*) port
)->statusPrev
363 = UR (port
, UART_R_STATUS
);
365 /* There is presently no configuration option to enable IR.
366 Thus, we always disable it. */
368 BIT_SET (port
, UART_R_CON
, UARTEN
| SIRDIS
);
369 BIT_SET (port
, UART_R_INTEN
, RxTimeoutInt
| RxInt
);
374 static void lh7a40xuart_shutdown (struct uart_port
* port
)
376 free_irq (port
->irq
, port
);
377 BIT_CLR (port
, UART_R_FCON
, BRK
| FEN
);
378 BIT_CLR (port
, UART_R_CON
, UARTEN
);
381 static void lh7a40xuart_set_termios (struct uart_port
* port
,
382 struct termios
* termios
,
392 baud
= uart_get_baud_rate (port
, termios
, old
, 8, port
->uartclk
/16);
393 quot
= uart_get_divisor (port
, baud
); /* -1 performed elsewhere */
395 switch (termios
->c_cflag
& CSIZE
) {
410 if (termios
->c_cflag
& CSTOPB
)
412 if (termios
->c_cflag
& PARENB
) {
414 if (!(termios
->c_cflag
& PARODD
))
417 if (port
->fifosize
> 1)
420 spin_lock_irqsave (&port
->lock
, flags
);
422 uart_update_timeout (port
, termios
->c_cflag
, baud
);
424 port
->read_status_mask
= RxOverrunError
;
425 if (termios
->c_iflag
& INPCK
)
426 port
->read_status_mask
|= RxFramingError
| RxParityError
;
427 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
428 port
->read_status_mask
|= RxBreak
;
430 /* Figure mask for status we ignore */
431 port
->ignore_status_mask
= 0;
432 if (termios
->c_iflag
& IGNPAR
)
433 port
->ignore_status_mask
|= RxFramingError
| RxParityError
;
434 if (termios
->c_iflag
& IGNBRK
) {
435 port
->ignore_status_mask
|= RxBreak
;
436 /* Ignore overrun when ignorning parity */
437 /* *** FIXME: is this in the right place? */
438 if (termios
->c_iflag
& IGNPAR
)
439 port
->ignore_status_mask
|= RxOverrunError
;
442 /* Ignore all receive errors when receive disabled */
443 if ((termios
->c_cflag
& CREAD
) == 0)
444 port
->ignore_status_mask
|= RxError
;
446 con
= UR (port
, UART_R_CON
);
447 inten
= (UR (port
, UART_R_INTEN
) & ~ModemInt
);
449 if (UART_ENABLE_MS (port
, termios
->c_cflag
))
452 BIT_CLR (port
, UART_R_CON
, UARTEN
); /* Disable UART */
453 UR (port
, UART_R_INTEN
) = 0; /* Disable interrupts */
454 UR (port
, UART_R_BRCON
) = quot
- 1; /* Set baud rate divisor */
455 UR (port
, UART_R_FCON
) = fcon
; /* Set FIFO and frame ctrl */
456 UR (port
, UART_R_INTEN
) = inten
; /* Enable interrupts */
457 UR (port
, UART_R_CON
) = con
; /* Restore UART mode */
459 spin_unlock_irqrestore(&port
->lock
, flags
);
462 static const char* lh7a40xuart_type (struct uart_port
* port
)
464 return port
->type
== PORT_LH7A40X
? "LH7A40X" : NULL
;
467 static void lh7a40xuart_release_port (struct uart_port
* port
)
469 release_mem_region (port
->mapbase
, UART_REG_SIZE
);
472 static int lh7a40xuart_request_port (struct uart_port
* port
)
474 return request_mem_region (port
->mapbase
, UART_REG_SIZE
,
475 "serial_lh7a40x") != NULL
479 static void lh7a40xuart_config_port (struct uart_port
* port
, int flags
)
481 if (flags
& UART_CONFIG_TYPE
) {
482 port
->type
= PORT_LH7A40X
;
483 lh7a40xuart_request_port (port
);
487 static int lh7a40xuart_verify_port (struct uart_port
* port
,
488 struct serial_struct
* ser
)
492 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_LH7A40X
)
494 if (ser
->irq
< 0 || ser
->irq
>= NR_IRQS
)
496 if (ser
->baud_base
< 9600) /* *** FIXME: is this true? */
501 static struct uart_ops lh7a40x_uart_ops
= {
502 .tx_empty
= lh7a40xuart_tx_empty
,
503 .set_mctrl
= lh7a40xuart_set_mctrl
,
504 .get_mctrl
= lh7a40xuart_get_mctrl
,
505 .stop_tx
= lh7a40xuart_stop_tx
,
506 .start_tx
= lh7a40xuart_start_tx
,
507 .stop_rx
= lh7a40xuart_stop_rx
,
508 .enable_ms
= lh7a40xuart_enable_ms
,
509 .break_ctl
= lh7a40xuart_break_ctl
,
510 .startup
= lh7a40xuart_startup
,
511 .shutdown
= lh7a40xuart_shutdown
,
512 .set_termios
= lh7a40xuart_set_termios
,
513 .type
= lh7a40xuart_type
,
514 .release_port
= lh7a40xuart_release_port
,
515 .request_port
= lh7a40xuart_request_port
,
516 .config_port
= lh7a40xuart_config_port
,
517 .verify_port
= lh7a40xuart_verify_port
,
520 static struct uart_port_lh7a40x lh7a40x_ports
[DEV_NR
] = {
523 .membase
= (void*) io_p2v (UART1_PHYS
),
524 .mapbase
= UART1_PHYS
,
525 .iotype
= SERIAL_IO_MEM
,
526 .irq
= IRQ_UART1INTR
,
527 .uartclk
= 14745600/2,
529 .ops
= &lh7a40x_uart_ops
,
530 .flags
= ASYNC_BOOT_AUTOCONF
,
536 .membase
= (void*) io_p2v (UART2_PHYS
),
537 .mapbase
= UART2_PHYS
,
538 .iotype
= SERIAL_IO_MEM
,
539 .irq
= IRQ_UART2INTR
,
540 .uartclk
= 14745600/2,
542 .ops
= &lh7a40x_uart_ops
,
543 .flags
= ASYNC_BOOT_AUTOCONF
,
549 .membase
= (void*) io_p2v (UART3_PHYS
),
550 .mapbase
= UART3_PHYS
,
551 .iotype
= SERIAL_IO_MEM
,
552 .irq
= IRQ_UART3INTR
,
553 .uartclk
= 14745600/2,
555 .ops
= &lh7a40x_uart_ops
,
556 .flags
= ASYNC_BOOT_AUTOCONF
,
562 #ifndef CONFIG_SERIAL_LH7A40X_CONSOLE
563 # define LH7A40X_CONSOLE NULL
565 # define LH7A40X_CONSOLE &lh7a40x_console
568 static void lh7a40xuart_console_write (struct console
* co
,
572 struct uart_port
* port
= &lh7a40x_ports
[co
->index
].port
;
573 unsigned int con
= UR (port
, UART_R_CON
);
574 unsigned int inten
= UR (port
, UART_R_INTEN
);
577 UR (port
, UART_R_INTEN
) = 0; /* Disable all interrupts */
578 BIT_SET (port
, UART_R_CON
, UARTEN
| SIRDIS
); /* Enable UART */
580 for (; count
-- > 0; ++s
) {
581 while (UR (port
, UART_R_STATUS
) & nTxRdy
)
583 UR (port
, UART_R_DATA
) = *s
;
585 while ((UR (port
, UART_R_STATUS
) & TxBusy
))
587 UR (port
, UART_R_DATA
) = '\r';
591 /* Wait until all characters are sent */
592 while (UR (port
, UART_R_STATUS
) & TxBusy
)
595 /* Restore control and interrupt mask */
596 UR (port
, UART_R_CON
) = con
;
597 UR (port
, UART_R_INTEN
) = inten
;
600 static void __init
lh7a40xuart_console_get_options (struct uart_port
* port
,
605 if (UR (port
, UART_R_CON
) & UARTEN
) {
606 unsigned int fcon
= UR (port
, UART_R_FCON
);
607 unsigned int quot
= UR (port
, UART_R_BRCON
) + 1;
609 switch (fcon
& (PEN
| EPS
)) {
610 default: *parity
= 'n'; break;
611 case PEN
: *parity
= 'o'; break;
612 case PEN
| EPS
: *parity
= 'e'; break;
615 switch (fcon
& WLEN
) {
617 case WLEN_8
: *bits
= 8; break;
618 case WLEN_7
: *bits
= 7; break;
619 case WLEN_6
: *bits
= 6; break;
620 case WLEN_5
: *bits
= 5; break;
623 *baud
= port
->uartclk
/(16*quot
);
627 static int __init
lh7a40xuart_console_setup (struct console
* co
, char* options
)
629 struct uart_port
* port
;
635 if (co
->index
>= DEV_NR
) /* Bounds check on device number */
637 port
= &lh7a40x_ports
[co
->index
].port
;
640 uart_parse_options (options
, &baud
, &parity
, &bits
, &flow
);
642 lh7a40xuart_console_get_options (port
, &baud
, &parity
, &bits
);
644 return uart_set_options (port
, co
, baud
, parity
, bits
, flow
);
647 extern struct uart_driver lh7a40x_reg
;
648 static struct console lh7a40x_console
= {
650 .write
= lh7a40xuart_console_write
,
651 .device
= uart_console_device
,
652 .setup
= lh7a40xuart_console_setup
,
653 .flags
= CON_PRINTBUFFER
,
655 .data
= &lh7a40x_reg
,
658 static int __init
lh7a40xuart_console_init(void)
660 register_console (&lh7a40x_console
);
664 console_initcall (lh7a40xuart_console_init
);
668 static struct uart_driver lh7a40x_reg
= {
669 .owner
= THIS_MODULE
,
670 .driver_name
= "ttyAM",
675 .cons
= LH7A40X_CONSOLE
,
678 static int __init
lh7a40xuart_init(void)
682 printk (KERN_INFO
"serial: LH7A40X serial driver\n");
684 ret
= uart_register_driver (&lh7a40x_reg
);
689 for (i
= 0; i
< DEV_NR
; i
++)
690 uart_add_one_port (&lh7a40x_reg
,
691 &lh7a40x_ports
[i
].port
);
696 static void __exit
lh7a40xuart_exit(void)
700 for (i
= 0; i
< DEV_NR
; i
++)
701 uart_remove_one_port (&lh7a40x_reg
, &lh7a40x_ports
[i
].port
);
703 uart_unregister_driver (&lh7a40x_reg
);
706 module_init (lh7a40xuart_init
);
707 module_exit (lh7a40xuart_exit
);
709 MODULE_AUTHOR ("Marc Singer");
710 MODULE_DESCRIPTION ("Sharp LH7A40X serial port driver");
711 MODULE_LICENSE ("GPL");