include/asm-m68knommu/system.h

   1 #ifndef _M68KNOMMU_SYSTEM_H
   2 #define _M68KNOMMU_SYSTEM_H
   3
   4 #include <linux/config.h> /* get configuration macros */
   5 #include <linux/linkage.h>
   6 #include <asm/segment.h>
   7 #include <asm/entry.h>
   8
   9 /*
  10  * switch_to(n) should switch tasks to task ptr, first checking that
  11  * ptr isn't the current task, in which case it does nothing.  This
  12  * also clears the TS-flag if the task we switched to has used the
  13  * math co-processor latest.
  14  */
  15 /*
  16  * switch_to() saves the extra registers, that are not saved
  17  * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
  18  * a0-a1. Some of these are used by schedule() and its predecessors
  19  * and so we might get see unexpected behaviors when a task returns
  20  * with unexpected register values.
  21  *
  22  * syscall stores these registers itself and none of them are used
  23  * by syscall after the function in the syscall has been called.
  24  *
  25  * Beware that resume now expects *next to be in d1 and the offset of
  26  * tss to be in a1. This saves a few instructions as we no longer have
  27  * to push them onto the stack and read them back right after.
  28  *
  29  * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
  30  *
  31  * Changed 96/09/19 by Andreas Schwab
  32  * pass prev in a0, next in a1, offset of tss in d1, and whether
  33  * the mm structures are shared in d2 (to avoid atc flushing).
  34  */
  35 asmlinkage void resume(void);
  36 #define switch_to(prev,next,last)                               \
  37 {                                                               \
  38   void *_last;                                                  \
  39   __asm__ __volatile__(                                         \
  40         "movel  %1, %%a0\n\t"                                   \
  41         "movel  %2, %%a1\n\t"                                   \
  42         "jbsr resume\n\t"                                       \
  43         "movel  %%d1, %0\n\t"                                   \
  44        : "=d" (_last)                                           \
  45        : "d" (prev), "d" (next)                                 \
  46        : "cc", "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1"); \
  47   (last) = _last;                                               \
  48 }
  49
  50 #ifdef CONFIG_COLDFIRE
  51 #define local_irq_enable() __asm__ __volatile__ (               \
  52         "move %/sr,%%d0\n\t"                                    \
  53         "andi.l #0xf8ff,%%d0\n\t"                               \
  54         "move %%d0,%/sr\n"                                      \
  55         : /* no outputs */                                      \
  56         :                                                       \
  57         : "cc", "%d0", "memory")
  58 #define local_irq_disable() __asm__ __volatile__ (              \
  59         "move %/sr,%%d0\n\t"                                    \
  60         "ori.l #0x0700,%%d0\n\t"                                \
  61         "move %%d0,%/sr\n"                                      \
  62         : /* no outputs */                                      \
  63         :                                                       \
  64         : "cc", "%d0", "memory")
  65 /* For spinlocks etc */
  66 #define local_irq_save(x) __asm__ __volatile__ (                \
  67         "movew %%sr,%0\n\t"                                     \
  68         "movew #0x0700,%%d0\n\t"                                \
  69         "or.l  %0,%%d0\n\t"                                     \
  70         "movew %%d0,%/sr"                                       \
  71         : "=d" (x)                                              \
  72         :                                                       \
  73         : "cc", "%d0", "memory")
  74 #else
  75
  76 /* portable version */ /* FIXME - see entry.h*/
  77 #define ALLOWINT 0xf8ff
  78
  79 #define local_irq_enable() asm volatile ("andiw %0,%%sr": : "i" (ALLOWINT) : "memory")
  80 #define local_irq_disable() asm volatile ("oriw  #0x0700,%%sr": : : "memory")
  81 #endif
  82
  83 #define local_save_flags(x) asm volatile ("movew %%sr,%0":"=d" (x) : : "memory")
  84 #define local_irq_restore(x) asm volatile ("movew %0,%%sr": :"d" (x) : "memory")
  85
  86 /* For spinlocks etc */
  87 #ifndef local_irq_save
  88 #define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } while (0)
  89 #endif
  90
  91 #define irqs_disabled()                 \
  92 ({                                      \
  93         unsigned long flags;            \
  94         local_save_flags(flags);        \
  95         ((flags & 0x0700) == 0x0700);   \
  96 })
  97
  98 #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
  99
 100 /*
 101  * Force strict CPU ordering.
 102  * Not really required on m68k...
 103  */
 104 #define nop()  asm volatile ("nop"::)
 105 #define mb()   asm volatile (""   : : :"memory")
 106 #define rmb()  asm volatile (""   : : :"memory")
 107 #define wmb()  asm volatile (""   : : :"memory")
 108 #define set_rmb(var, value)    do { xchg(&var, value); } while (0)
 109 #define set_mb(var, value)     set_rmb(var, value)
 110 #define set_wmb(var, value)    do { var = value; wmb(); } while (0)
 111
 112 #ifdef CONFIG_SMP
 113 #define smp_mb()        mb()
 114 #define smp_rmb()       rmb()
 115 #define smp_wmb()       wmb()
 116 #define smp_read_barrier_depends()      read_barrier_depends()
 117 #else
 118 #define smp_mb()        barrier()
 119 #define smp_rmb()       barrier()
 120 #define smp_wmb()       barrier()
 121 #define smp_read_barrier_depends()      do { } while(0)
 122 #endif
 123
 124 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
 125 #define tas(ptr) (xchg((ptr),1))
 126
 127 struct __xchg_dummy { unsigned long a[100]; };
 128 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
 129
 130 #ifndef CONFIG_RMW_INSNS
 131 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
 132 {
 133   unsigned long tmp, flags;
 134
 135   local_irq_save(flags);
 136
 137   switch (size) {
 138   case 1:
 139     __asm__ __volatile__
 140     ("moveb %2,%0\n\t"
 141      "moveb %1,%2"
 142     : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
 143     break;
 144   case 2:
 145     __asm__ __volatile__
 146     ("movew %2,%0\n\t"
 147      "movew %1,%2"
 148     : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
 149     break;
 150   case 4:
 151     __asm__ __volatile__
 152     ("movel %2,%0\n\t"
 153      "movel %1,%2"
 154     : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
 155     break;
 156   }
 157   local_irq_restore(flags);
 158   return tmp;
 159 }
 160 #else
 161 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
 162 {
 163         switch (size) {
 164             case 1:
 165                 __asm__ __volatile__
 166                         ("moveb %2,%0\n\t"
 167                          "1:\n\t"
 168                          "casb %0,%1,%2\n\t"
 169                          "jne 1b"
 170                          : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
 171                 break;
 172             case 2:
 173                 __asm__ __volatile__
 174                         ("movew %2,%0\n\t"
 175                          "1:\n\t"
 176                          "casw %0,%1,%2\n\t"
 177                          "jne 1b"
 178                          : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
 179                 break;
 180             case 4:
 181                 __asm__ __volatile__
 182                         ("movel %2,%0\n\t"
 183                          "1:\n\t"
 184                          "casl %0,%1,%2\n\t"
 185                          "jne 1b"
 186                          : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
 187                 break;
 188         }
 189         return x;
 190 }
 191 #endif
 192
 193 /*
 194  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
 195  * store NEW in MEM.  Return the initial value in MEM.  Success is
 196  * indicated by comparing RETURN with OLD.
 197  */
 198 #define __HAVE_ARCH_CMPXCHG     1
 199
 200 static __inline__ unsigned long
 201 cmpxchg(volatile int *p, int old, int new)
 202 {
 203         unsigned long flags;
 204         int prev;
 205
 206         local_irq_save(flags);
 207         if ((prev = *p) == old)
 208                 *p = new;
 209         local_irq_restore(flags);
 210         return(prev);
 211 }
 212
 213
 214 #ifdef CONFIG_M68332
 215 #define HARD_RESET_NOW() ({             \
 216         local_irq_disable();            \
 217         asm("                           \
 218         movew   #0x0000, 0xfffa6a;      \
 219         reset;                          \
 220         /*movew #0x1557, 0xfffa44;*/    \
 221         /*movew #0x0155, 0xfffa46;*/    \
 222         moveal #0, %a0;                 \
 223         movec %a0, %vbr;                \
 224         moveal 0, %sp;                  \
 225         moveal 4, %a0;                  \
 226         jmp (%a0);                      \
 227         ");                             \
 228 })
 229 #endif
 230
 231 #if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \
 232         defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 )
 233 #define HARD_RESET_NOW() ({             \
 234         local_irq_disable();            \
 235         asm("                           \
 236         moveal #0x10c00000, %a0;        \
 237         moveb #0, 0xFFFFF300;           \
 238         moveal 0(%a0), %sp;             \
 239         moveal 4(%a0), %a0;             \
 240         jmp (%a0);                      \
 241         ");                             \
 242 })
 243 #endif
 244
 245 #ifdef CONFIG_COLDFIRE
 246 #if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
 247 /*
 248  * Need to account for broken early mask of 5272 silicon. So don't
 249  * jump through the original start address. Jump strait into the
 250  * known start of the FLASH code.
 251  */
 252 #define HARD_RESET_NOW() ({             \
 253         asm("                           \
 254         movew #0x2700, %sr;             \
 255         jmp 0xf0000400;                 \
 256         ");                             \
 257 })
 258 #elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
 259       defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
 260       defined(CONFIG_CLEOPATRA)
 261 #define HARD_RESET_NOW() ({             \
 262         asm("                           \
 263         movew #0x2700, %sr;             \
 264         moveal #0x10000044, %a0;        \
 265         movel #0xffffffff, (%a0);       \
 266         moveal #0x10000001, %a0;        \
 267         moveb #0x00, (%a0);             \
 268         moveal #0xf0000004, %a0;        \
 269         moveal (%a0), %a0;              \
 270         jmp (%a0);                      \
 271         ");                             \
 272 })
 273 #elif defined(CONFIG_M5272)
 274 /*
 275  * Retrieve the boot address in flash using CSBR0 and CSOR0
 276  * find the reset vector at flash_address + 4 (e.g. 0x400)
 277  * remap it in the flash's current location (e.g. 0xf0000400)
 278  * and jump there.
 279  */
 280 #define HARD_RESET_NOW() ({             \
 281         asm("                           \
 282         movew #0x2700, %%sr;            \
 283         move.l  %0+0x40,%%d0;           \
 284         and.l   %0+0x44,%%d0;           \
 285         andi.l  #0xfffff000,%%d0;       \
 286         mov.l   %%d0,%%a0;              \
 287         or.l    4(%%a0),%%d0;           \
 288         mov.l   %%d0,%%a0;              \
 289         jmp (%%a0);"                    \
 290         : /* No output */               \
 291         : "o" (*(char *)MCF_MBAR) );    \
 292 })
 293 #elif defined(CONFIG_M528x)
 294 /*
 295  * The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR),
 296  * that when set, resets the MCF528x.
 297  */
 298 #define HARD_RESET_NOW() \
 299 ({                                              \
 300         unsigned char volatile *reset;          \
 301         asm("move.w     #0x2700, %sr");         \
 302         reset = ((volatile unsigned short *)(MCF_IPSBAR + 0x110000));   \
 303         while(1)                                \
 304         *reset |= (0x01 << 7);\
 305 })
 306 #elif defined(CONFIG_M523x)
 307 #define HARD_RESET_NOW() ({             \
 308         asm("                           \
 309         movew #0x2700, %sr;             \
 310         movel #0x01000000, %sp;         \
 311         moveal #0x40110000, %a0;        \
 312         moveb #0x80, (%a0);             \
 313         ");                             \
 314 })
 315 #elif defined(CONFIG_M520x)
 316         /*
 317          * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
 318          * RCR), that when set, resets the MCF5208.
 319          */
 320 #define HARD_RESET_NOW()                \
 321 ({                                      \
 322         unsigned char volatile *reset;  \
 323         asm("move.w     #0x2700, %sr"); \
 324         reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000));    \
 325         while(1)                        \
 326                 *reset |= 0x80;         \
 327 })
 328 #else
 329 #define HARD_RESET_NOW() ({             \
 330         asm("                           \
 331         movew #0x2700, %sr;             \
 332         moveal #0x4, %a0;               \
 333         moveal (%a0), %a0;              \
 334         jmp (%a0);                      \
 335         ");                             \
 336 })
 337 #endif
 338 #endif
 339 #define arch_align_stack(x) (x)
 340
 341 #endif /* _M68KNOMMU_SYSTEM_H */