2 * Mips Jazz DMA controller support
3 * Copyright (C) 1995, 1996 by Andreas Busse
5 * NOTE: Some of the argument checking could be removed when
6 * things have settled down. Also, instead of returning 0xffffffff
7 * on failure of vdma_alloc() one could leave page #0 unused
8 * and return the more usual NULL pointer as logical address.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/errno.h>
15 #include <linux/bootmem.h>
16 #include <linux/spinlock.h>
17 #include <asm/mipsregs.h>
20 #include <asm/uaccess.h>
22 #include <asm/jazzdma.h>
23 #include <asm/pgtable.h>
26 * Set this to one to enable additional vdma debug code.
28 #define CONF_DEBUG_VDMA 0
30 static VDMA_PGTBL_ENTRY
*pgtbl
;
32 static DEFINE_SPINLOCK(vdma_lock
);
37 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
39 static int debuglvl
= 3;
42 * Initialize the pagetable with a one-to-one mapping of
43 * the first 16 Mbytes of main memory and declare all
44 * entries to be unused. Using this method will at least
45 * allow some early device driver operations to work.
47 static inline void vdma_pgtbl_init(void)
49 unsigned long paddr
= 0;
52 for (i
= 0; i
< VDMA_PGTBL_ENTRIES
; i
++) {
53 pgtbl
[i
].frame
= paddr
;
54 pgtbl
[i
].owner
= VDMA_PAGE_EMPTY
;
55 paddr
+= VDMA_PAGESIZE
;
60 * Initialize the Jazz R4030 dma controller
62 static int __init
vdma_init(void)
65 * Allocate 32k of memory for DMA page tables. This needs to be page
66 * aligned and should be uncached to avoid cache flushing after every
69 pgtbl
= (VDMA_PGTBL_ENTRY
*)__get_free_pages(GFP_KERNEL
| GFP_DMA
,
70 get_order(VDMA_PGTBL_SIZE
));
73 dma_cache_wback_inv((unsigned long)pgtbl
, VDMA_PGTBL_SIZE
);
74 pgtbl
= (VDMA_PGTBL_ENTRY
*)KSEG1ADDR(pgtbl
);
77 * Clear the R4030 translation table
81 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE
, CPHYSADDR(pgtbl
));
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM
, VDMA_PGTBL_SIZE
);
83 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV
, 0);
85 printk(KERN_INFO
"VDMA: R4030 DMA pagetables initialized.\n");
90 * Allocate DMA pagetables using a simple first-fit algorithm
92 unsigned long vdma_alloc(unsigned long paddr
, unsigned long size
)
94 int first
, last
, pages
, frame
, i
;
95 unsigned long laddr
, flags
;
99 if (paddr
> 0x1fffffff) {
101 printk("vdma_alloc: Invalid physical address: %08lx\n",
103 return VDMA_ERROR
; /* invalid physical address */
105 if (size
> 0x400000 || size
== 0) {
107 printk("vdma_alloc: Invalid size: %08lx\n", size
);
108 return VDMA_ERROR
; /* invalid physical address */
111 spin_lock_irqsave(&vdma_lock
, flags
);
115 pages
= VDMA_PAGE(paddr
+ size
) - VDMA_PAGE(paddr
) + 1;
118 while (pgtbl
[first
].owner
!= VDMA_PAGE_EMPTY
&&
119 first
< VDMA_PGTBL_ENTRIES
) first
++;
120 if (first
+ pages
> VDMA_PGTBL_ENTRIES
) { /* nothing free */
121 spin_unlock_irqrestore(&vdma_lock
, flags
);
126 while (pgtbl
[last
].owner
== VDMA_PAGE_EMPTY
127 && last
- first
< pages
)
130 if (last
- first
== pages
)
136 * Mark pages as allocated
138 laddr
= (first
<< 12) + (paddr
& (VDMA_PAGESIZE
- 1));
139 frame
= paddr
& ~(VDMA_PAGESIZE
- 1);
141 for (i
= first
; i
< last
; i
++) {
142 pgtbl
[i
].frame
= frame
;
143 pgtbl
[i
].owner
= laddr
;
144 frame
+= VDMA_PAGESIZE
;
148 * Update translation table and return logical start address
150 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV
, 0);
153 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
156 if (vdma_debug
> 2) {
158 for (i
= first
; i
< last
; i
++)
159 printk("%08x ", i
<< 12);
161 for (i
= first
; i
< last
; i
++)
162 printk("%08x ", pgtbl
[i
].frame
);
164 for (i
= first
; i
< last
; i
++)
165 printk("%08x ", pgtbl
[i
].owner
);
169 spin_unlock_irqrestore(&vdma_lock
, flags
);
174 EXPORT_SYMBOL(vdma_alloc
);
177 * Free previously allocated dma translation pages
178 * Note that this does NOT change the translation table,
179 * it just marks the free'd pages as unused!
181 int vdma_free(unsigned long laddr
)
187 if (pgtbl
[i
].owner
!= laddr
) {
189 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
194 while (pgtbl
[i
].owner
== laddr
&& i
< VDMA_PGTBL_ENTRIES
) {
195 pgtbl
[i
].owner
= VDMA_PAGE_EMPTY
;
200 printk("vdma_free: freed %ld pages starting from %08lx\n",
201 i
- (laddr
>> 12), laddr
);
206 EXPORT_SYMBOL(vdma_free
);
209 * Map certain page(s) to another physical address.
210 * Caller must have allocated the page(s) before.
212 int vdma_remap(unsigned long laddr
, unsigned long paddr
, unsigned long size
)
214 int first
, pages
, npages
;
216 if (laddr
> 0xffffff) {
219 ("vdma_map: Invalid logical address: %08lx\n",
221 return -EINVAL
; /* invalid logical address */
223 if (paddr
> 0x1fffffff) {
226 ("vdma_map: Invalid physical address: %08lx\n",
228 return -EINVAL
; /* invalid physical address */
232 (((paddr
& (VDMA_PAGESIZE
- 1)) + size
) >> 12) + 1;
235 printk("vdma_remap: first=%x, pages=%x\n", first
, pages
);
236 if (first
+ pages
> VDMA_PGTBL_ENTRIES
) {
238 printk("vdma_alloc: Invalid size: %08lx\n", size
);
242 paddr
&= ~(VDMA_PAGESIZE
- 1);
243 while (pages
> 0 && first
< VDMA_PGTBL_ENTRIES
) {
244 if (pgtbl
[first
].owner
!= laddr
) {
246 printk("Trying to remap other's pages.\n");
247 return -EPERM
; /* not owner */
249 pgtbl
[first
].frame
= paddr
;
250 paddr
+= VDMA_PAGESIZE
;
256 * Update translation table
258 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV
, 0);
260 if (vdma_debug
> 2) {
262 pages
= (((paddr
& (VDMA_PAGESIZE
- 1)) + size
) >> 12) + 1;
265 for (i
= first
; i
< first
+ pages
; i
++)
266 printk("%08x ", i
<< 12);
268 for (i
= first
; i
< first
+ pages
; i
++)
269 printk("%08x ", pgtbl
[i
].frame
);
271 for (i
= first
; i
< first
+ pages
; i
++)
272 printk("%08x ", pgtbl
[i
].owner
);
280 * Translate a physical address to a logical address.
281 * This will return the logical address of the first
284 unsigned long vdma_phys2log(unsigned long paddr
)
289 frame
= paddr
& ~(VDMA_PAGESIZE
- 1);
291 for (i
= 0; i
< VDMA_PGTBL_ENTRIES
; i
++) {
292 if (pgtbl
[i
].frame
== frame
)
296 if (i
== VDMA_PGTBL_ENTRIES
)
299 return (i
<< 12) + (paddr
& (VDMA_PAGESIZE
- 1));
302 EXPORT_SYMBOL(vdma_phys2log
);
305 * Translate a logical DMA address to a physical address
307 unsigned long vdma_log2phys(unsigned long laddr
)
309 return pgtbl
[laddr
>> 12].frame
+ (laddr
& (VDMA_PAGESIZE
- 1));
312 EXPORT_SYMBOL(vdma_log2phys
);
315 * Print DMA statistics
317 void vdma_stats(void)
321 printk("vdma_stats: CONFIG: %08x\n",
322 r4030_read_reg32(JAZZ_R4030_CONFIG
));
323 printk("R4030 translation table base: %08x\n",
324 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE
));
325 printk("R4030 translation table limit: %08x\n",
326 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM
));
327 printk("vdma_stats: INV_ADDR: %08x\n",
328 r4030_read_reg32(JAZZ_R4030_INV_ADDR
));
329 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
330 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR
));
331 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
332 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR
));
333 printk("vdma_stats: IRQ_SOURCE: %08x\n",
334 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE
));
335 printk("vdma_stats: I386_ERROR: %08x\n",
336 r4030_read_reg32(JAZZ_R4030_I386_ERROR
));
337 printk("vdma_chnl_modes: ");
338 for (i
= 0; i
< 8; i
++)
340 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE
+
343 printk("vdma_chnl_enables: ");
344 for (i
= 0; i
< 8; i
++)
346 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+
352 * DMA transfer functions
356 * Enable a DMA channel. Also clear any error conditions.
358 void vdma_enable(int channel
)
363 printk("vdma_enable: channel %d\n", channel
);
366 * Check error conditions first
368 status
= r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+ (channel
<< 5));
370 printk("VDMA: Channel %d: Address error!\n", channel
);
372 printk("VDMA: Channel %d: Memory error!\n", channel
);
375 * Clear all interrupt flags
377 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE
+ (channel
<< 5),
378 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+
379 (channel
<< 5)) | R4030_TC_INTR
380 | R4030_MEM_INTR
| R4030_ADDR_INTR
);
383 * Enable the desired channel
385 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE
+ (channel
<< 5),
386 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+
391 EXPORT_SYMBOL(vdma_enable
);
394 * Disable a DMA channel
396 void vdma_disable(int channel
)
400 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+
403 printk("vdma_disable: channel %d\n", channel
);
404 printk("VDMA: channel %d status: %04x (%s) mode: "
405 "%02x addr: %06x count: %06x\n",
407 ((status
& 0x600) ? "ERROR" : "OK"),
408 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE
+
410 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR
+
412 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT
+
416 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE
+ (channel
<< 5),
417 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+
422 * After disabling a DMA channel a remote bus register should be
423 * read to ensure that the current DMA acknowledge cycle is completed.
425 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE
);
428 EXPORT_SYMBOL(vdma_disable
);
431 * Set DMA mode. This function accepts the mode values used
432 * to set a PC-style DMA controller. For the SCSI and FDC
433 * channels, we also set the default modes each time we're
435 * NOTE: The FAST and BURST dma modes are supported by the
436 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
439 void vdma_set_mode(int channel
, int mode
)
442 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel
,
446 case JAZZ_SCSI_DMA
: /* scsi */
447 r4030_write_reg32(JAZZ_R4030_CHNL_MODE
+ (channel
<< 5),
448 /* R4030_MODE_FAST | */
449 /* R4030_MODE_BURST | */
451 R4030_MODE_WIDTH_16
|
452 R4030_MODE_ATIME_80
);
455 case JAZZ_FLOPPY_DMA
: /* floppy */
456 r4030_write_reg32(JAZZ_R4030_CHNL_MODE
+ (channel
<< 5),
457 /* R4030_MODE_FAST | */
458 /* R4030_MODE_BURST | */
461 R4030_MODE_ATIME_120
);
464 case JAZZ_AUDIOL_DMA
:
465 case JAZZ_AUDIOR_DMA
:
466 printk("VDMA: Audio DMA not supported yet.\n");
471 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
477 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE
+ (channel
<< 5),
478 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+
484 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE
+ (channel
<< 5),
485 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+
492 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
497 EXPORT_SYMBOL(vdma_set_mode
);
500 * Set Transfer Address
502 void vdma_set_addr(int channel
, long addr
)
505 printk("vdma_set_addr: channel %d, addr %lx\n", channel
,
508 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR
+ (channel
<< 5), addr
);
511 EXPORT_SYMBOL(vdma_set_addr
);
516 void vdma_set_count(int channel
, int count
)
519 printk("vdma_set_count: channel %d, count %08x\n", channel
,
522 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT
+ (channel
<< 5), count
);
525 EXPORT_SYMBOL(vdma_set_count
);
530 int vdma_get_residue(int channel
)
534 residual
= r4030_read_reg32(JAZZ_R4030_CHNL_COUNT
+ (channel
<< 5));
537 printk("vdma_get_residual: channel %d: residual=%d\n",
544 * Get DMA channel enable register
546 int vdma_get_enable(int channel
)
550 enable
= r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE
+ (channel
<< 5));
553 printk("vdma_get_enable: channel %d: enable=%d\n", channel
,
559 arch_initcall(vdma_init
);