Linux 2.6.13-rc4
[linux-2.6/next.git] / arch / arm / mm / fault-armv.c
blobbe4ab3d73c91965448f064448136f7c078d9fb30
1 /*
2 * linux/arch/arm/mm/fault-armv.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Modifications for ARM processor (c) 1995-2002 Russell King
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
14 #include <linux/mm.h>
15 #include <linux/bitops.h>
16 #include <linux/vmalloc.h>
17 #include <linux/init.h>
18 #include <linux/pagemap.h>
20 #include <asm/cacheflush.h>
21 #include <asm/pgtable.h>
22 #include <asm/tlbflush.h>
24 static unsigned long shared_pte_mask = L_PTE_CACHEABLE;
27 * We take the easy way out of this problem - we make the
28 * PTE uncacheable. However, we leave the write buffer on.
30 static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
32 pgd_t *pgd;
33 pmd_t *pmd;
34 pte_t *pte, entry;
35 int ret = 0;
37 pgd = pgd_offset(vma->vm_mm, address);
38 if (pgd_none(*pgd))
39 goto no_pgd;
40 if (pgd_bad(*pgd))
41 goto bad_pgd;
43 pmd = pmd_offset(pgd, address);
44 if (pmd_none(*pmd))
45 goto no_pmd;
46 if (pmd_bad(*pmd))
47 goto bad_pmd;
49 pte = pte_offset_map(pmd, address);
50 entry = *pte;
53 * If this page isn't present, or is already setup to
54 * fault (ie, is old), we can safely ignore any issues.
56 if (pte_present(entry) && pte_val(entry) & shared_pte_mask) {
57 flush_cache_page(vma, address, pte_pfn(entry));
58 pte_val(entry) &= ~shared_pte_mask;
59 set_pte(pte, entry);
60 flush_tlb_page(vma, address);
61 ret = 1;
63 pte_unmap(pte);
64 return ret;
66 bad_pgd:
67 pgd_ERROR(*pgd);
68 pgd_clear(pgd);
69 no_pgd:
70 return 0;
72 bad_pmd:
73 pmd_ERROR(*pmd);
74 pmd_clear(pmd);
75 no_pmd:
76 return 0;
79 static void
80 make_coherent(struct address_space *mapping, struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
82 struct mm_struct *mm = vma->vm_mm;
83 struct vm_area_struct *mpnt;
84 struct prio_tree_iter iter;
85 unsigned long offset;
86 pgoff_t pgoff;
87 int aliases = 0;
89 pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
92 * If we have any shared mappings that are in the same mm
93 * space, then we need to handle them specially to maintain
94 * cache coherency.
96 flush_dcache_mmap_lock(mapping);
97 vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
99 * If this VMA is not in our MM, we can ignore it.
100 * Note that we intentionally mask out the VMA
101 * that we are fixing up.
103 if (mpnt->vm_mm != mm || mpnt == vma)
104 continue;
105 if (!(mpnt->vm_flags & VM_MAYSHARE))
106 continue;
107 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
108 aliases += adjust_pte(mpnt, mpnt->vm_start + offset);
110 flush_dcache_mmap_unlock(mapping);
111 if (aliases)
112 adjust_pte(vma, addr);
113 else
114 flush_cache_page(vma, addr, pfn);
117 void __flush_dcache_page(struct address_space *mapping, struct page *page);
120 * Take care of architecture specific things when placing a new PTE into
121 * a page table, or changing an existing PTE. Basically, there are two
122 * things that we need to take care of:
124 * 1. If PG_dcache_dirty is set for the page, we need to ensure
125 * that any cache entries for the kernels virtual memory
126 * range are written back to the page.
127 * 2. If we have multiple shared mappings of the same space in
128 * an object, we need to deal with the cache aliasing issues.
130 * Note that the page_table_lock will be held.
132 void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
134 unsigned long pfn = pte_pfn(pte);
135 struct address_space *mapping;
136 struct page *page;
138 if (!pfn_valid(pfn))
139 return;
141 page = pfn_to_page(pfn);
142 mapping = page_mapping(page);
143 if (mapping) {
144 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
146 if (dirty)
147 __flush_dcache_page(mapping, page);
149 if (cache_is_vivt())
150 make_coherent(mapping, vma, addr, pfn);
155 * Check whether the write buffer has physical address aliasing
156 * issues. If it has, we need to avoid them for the case where
157 * we have several shared mappings of the same object in user
158 * space.
160 static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
162 register unsigned long zero = 0, one = 1, val;
164 local_irq_disable();
165 mb();
166 *p1 = one;
167 mb();
168 *p2 = zero;
169 mb();
170 val = *p1;
171 mb();
172 local_irq_enable();
173 return val != zero;
176 void __init check_writebuffer_bugs(void)
178 struct page *page;
179 const char *reason;
180 unsigned long v = 1;
182 printk(KERN_INFO "CPU: Testing write buffer coherency: ");
184 page = alloc_page(GFP_KERNEL);
185 if (page) {
186 unsigned long *p1, *p2;
187 pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG|
188 L_PTE_DIRTY|L_PTE_WRITE|
189 L_PTE_BUFFERABLE);
191 p1 = vmap(&page, 1, VM_IOREMAP, prot);
192 p2 = vmap(&page, 1, VM_IOREMAP, prot);
194 if (p1 && p2) {
195 v = check_writebuffer(p1, p2);
196 reason = "enabling work-around";
197 } else {
198 reason = "unable to map memory\n";
201 vunmap(p1);
202 vunmap(p2);
203 put_page(page);
204 } else {
205 reason = "unable to grab page\n";
208 if (v) {
209 printk("failed, %s\n", reason);
210 shared_pte_mask |= L_PTE_BUFFERABLE;
211 } else {
212 printk("ok\n");