drivers/net/enic/enic.h

   1 /*
   2  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  *
   5  * This program is free software; you may redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16  * SOFTWARE.
  17  *
  18  */
  19
  20 #ifndef _ENIC_H_
  21 #define _ENIC_H_
  22
  23 #include "vnic_enet.h"
  24 #include "vnic_dev.h"
  25 #include "vnic_wq.h"
  26 #include "vnic_rq.h"
  27 #include "vnic_cq.h"
  28 #include "vnic_intr.h"
  29 #include "vnic_stats.h"
  30 #include "vnic_nic.h"
  31 #include "vnic_rss.h"
  32
  33 #define DRV_NAME                "enic"
  34 #define DRV_DESCRIPTION         "Cisco VIC Ethernet NIC Driver"
  35 #define DRV_VERSION             "1.4.1.10"
  36 #define DRV_COPYRIGHT           "Copyright 2008-2010 Cisco Systems, Inc"
  37
  38 #define ENIC_BARS_MAX           6
  39
  40 #define ENIC_WQ_MAX             8
  41 #define ENIC_RQ_MAX             8
  42 #define ENIC_CQ_MAX             (ENIC_WQ_MAX + ENIC_RQ_MAX)
  43 #define ENIC_INTR_MAX           (ENIC_CQ_MAX + 2)
  44
  45 struct enic_msix_entry {
  46         int requested;
  47         char devname[IFNAMSIZ];
  48         irqreturn_t (*isr)(int, void *);
  49         void *devid;
  50 };
  51
  52 #define ENIC_SET_APPLIED                (1 << 0)
  53 #define ENIC_SET_REQUEST                (1 << 1)
  54 #define ENIC_SET_NAME                   (1 << 2)
  55 #define ENIC_SET_INSTANCE               (1 << 3)
  56 #define ENIC_SET_HOST                   (1 << 4)
  57
  58 struct enic_port_profile {
  59         u32 set;
  60         u8 request;
  61         char name[PORT_PROFILE_MAX];
  62         u8 instance_uuid[PORT_UUID_MAX];
  63         u8 host_uuid[PORT_UUID_MAX];
  64         u8 vf_mac[ETH_ALEN];
  65         u8 mac_addr[ETH_ALEN];
  66 };
  67
  68 /* Per-instance private data structure */
  69 struct enic {
  70         struct net_device *netdev;
  71         struct pci_dev *pdev;
  72         struct vnic_enet_config config;
  73         struct vnic_dev_bar bar[ENIC_BARS_MAX];
  74         struct vnic_dev *vdev;
  75         struct timer_list notify_timer;
  76         struct work_struct reset;
  77         struct msix_entry msix_entry[ENIC_INTR_MAX];
  78         struct enic_msix_entry msix[ENIC_INTR_MAX];
  79         u32 msg_enable;
  80         spinlock_t devcmd_lock;
  81         u8 mac_addr[ETH_ALEN];
  82         u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  83         u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
  84         unsigned int flags;
  85         unsigned int mc_count;
  86         unsigned int uc_count;
  87         int csum_rx_enabled;
  88         u32 port_mtu;
  89         u32 rx_coalesce_usecs;
  90         u32 tx_coalesce_usecs;
  91         struct enic_port_profile pp;
  92
  93         /* work queue cache line section */
  94         ____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
  95         spinlock_t wq_lock[ENIC_WQ_MAX];
  96         unsigned int wq_count;
  97         struct vlan_group *vlan_group;
  98         u16 loop_enable;
  99         u16 loop_tag;
 100
 101         /* receive queue cache line section */
 102         ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
 103         unsigned int rq_count;
 104         int (*rq_alloc_buf)(struct vnic_rq *rq);
 105         u64 rq_truncated_pkts;
 106         u64 rq_bad_fcs;
 107         struct napi_struct napi[ENIC_RQ_MAX];
 108
 109         /* interrupt resource cache line section */
 110         ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
 111         unsigned int intr_count;
 112         u32 __iomem *legacy_pba;                /* memory-mapped */
 113
 114         /* completion queue cache line section */
 115         ____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];
 116         unsigned int cq_count;
 117 };
 118
 119 static inline struct device *enic_get_dev(struct enic *enic)
 120 {
 121         return &(enic->pdev->dev);
 122 }
 123
 124 #endif /* _ENIC_H_ */