Add linux-next specific files for 20110831
[linux-2.6/next.git] / arch / arm / mach-nuc93x / include / mach / map.h
blobfd0b5e89f0e7cf189dea12e67b4e30722d7e1c25
1 /*
2 * arch/arm/mach-nuc93x/include/mach/map.h
4 * Copyright (c) 2008 Nuvoton technology corporation.
6 * Wan ZongShun <mcuos.com@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation;version 2 of the License.
14 #ifndef __ASM_ARCH_MAP_H
15 #define __ASM_ARCH_MAP_H
17 #define MAP_OFFSET (0xfff00000)
18 #define CLK_OFFSET (0x10)
20 #ifndef __ASSEMBLY__
21 #define NUC93X_ADDR(x) ((void __iomem *)(0xF0000000 + ((x)&(~MAP_OFFSET))))
22 #else
23 #define NUC93X_ADDR(x) (0xF0000000 + ((x)&(~MAP_OFFSET)))
24 #endif
27 * nuc932 hardware register definition
30 #define NUC93X_PA_IRQ (0xFFF83000)
31 #define NUC93X_PA_GCR (0xFFF00000)
32 #define NUC93X_PA_EBI (0xFFF01000)
33 #define NUC93X_PA_UART (0xFFF80000)
34 #define NUC93X_PA_TIMER (0xFFF81000)
35 #define NUC93X_PA_GPIO (0xFFF84000)
36 #define NUC93X_PA_GDMA (0xFFF03000)
37 #define NUC93X_PA_USBHOST (0xFFF0d000)
38 #define NUC93X_PA_I2C (0xFFF89000)
39 #define NUC93X_PA_LCD (0xFFF06000)
40 #define NUC93X_PA_GE (0xFFF05000)
41 #define NUC93X_PA_ADC (0xFFF85000)
42 #define NUC93X_PA_RTC (0xFFF87000)
43 #define NUC93X_PA_PWM (0xFFF82000)
44 #define NUC93X_PA_ACTL (0xFFF0a000)
45 #define NUC93X_PA_USBDEV (0xFFF0C000)
46 #define NUC93X_PA_JEPEG (0xFFF0e000)
47 #define NUC93X_PA_CACHE_T (0xFFF60000)
48 #define NUC93X_PA_VRAM (0xFFF0b000)
49 #define NUC93X_PA_DMAC (0xFFF09000)
50 #define NUC93X_PA_I2SM (0xFFF08000)
51 #define NUC93X_PA_CACHE (0xFFF02000)
52 #define NUC93X_PA_GPU (0xFFF04000)
53 #define NUC93X_PA_VIDEOIN (0xFFF07000)
54 #define NUC93X_PA_SPI0 (0xFFF86000)
55 #define NUC93X_PA_SPI1 (0xFFF88000)
58 * nuc932 virtual address mapping.
59 * interrupt controller is the first thing we put in, to make
60 * the assembly code for the irq detection easier
63 #define NUC93X_VA_IRQ NUC93X_ADDR(0x00000000)
64 #define NUC93X_SZ_IRQ SZ_4K
66 #define NUC93X_VA_GCR NUC93X_ADDR(NUC93X_PA_IRQ)
67 #define NUC93X_VA_CLKPWR (NUC93X_VA_GCR+CLK_OFFSET)
68 #define NUC93X_SZ_GCR SZ_4K
70 /* EBI management */
72 #define NUC93X_VA_EBI NUC93X_ADDR(NUC93X_PA_EBI)
73 #define NUC93X_SZ_EBI SZ_4K
75 /* UARTs */
77 #define NUC93X_VA_UART NUC93X_ADDR(NUC93X_PA_UART)
78 #define NUC93X_SZ_UART SZ_4K
80 /* Timers */
82 #define NUC93X_VA_TIMER NUC93X_ADDR(NUC93X_PA_TIMER)
83 #define NUC93X_SZ_TIMER SZ_4K
85 /* GPIO ports */
87 #define NUC93X_VA_GPIO NUC93X_ADDR(NUC93X_PA_GPIO)
88 #define NUC93X_SZ_GPIO SZ_4K
90 /* GDMA control */
92 #define NUC93X_VA_GDMA NUC93X_ADDR(NUC93X_PA_GDMA)
93 #define NUC93X_SZ_GDMA SZ_4K
95 /* I2C hardware controller */
97 #define NUC93X_VA_I2C NUC93X_ADDR(NUC93X_PA_I2C)
98 #define NUC93X_SZ_I2C SZ_4K
100 /* LCD controller*/
102 #define NUC93X_VA_LCD NUC93X_ADDR(NUC93X_PA_LCD)
103 #define NUC93X_SZ_LCD SZ_4K
105 /* 2D controller*/
107 #define NUC93X_VA_GE NUC93X_ADDR(NUC93X_PA_GE)
108 #define NUC93X_SZ_GE SZ_4K
110 /* ADC */
112 #define NUC93X_VA_ADC NUC93X_ADDR(NUC93X_PA_ADC)
113 #define NUC93X_SZ_ADC SZ_4K
115 /* RTC */
117 #define NUC93X_VA_RTC NUC93X_ADDR(NUC93X_PA_RTC)
118 #define NUC93X_SZ_RTC SZ_4K
120 /* Pulse Width Modulation(PWM) Registers */
122 #define NUC93X_VA_PWM NUC93X_ADDR(NUC93X_PA_PWM)
123 #define NUC93X_SZ_PWM SZ_4K
125 /* Audio Controller controller */
127 #define NUC93X_VA_ACTL NUC93X_ADDR(NUC93X_PA_ACTL)
128 #define NUC93X_SZ_ACTL SZ_4K
130 /* USB Device port */
132 #define NUC93X_VA_USBDEV NUC93X_ADDR(NUC93X_PA_USBDEV)
133 #define NUC93X_SZ_USBDEV SZ_4K
135 /* USB host controller*/
136 #define NUC93X_VA_USBHOST NUC93X_ADDR(NUC93X_PA_USBHOST)
137 #define NUC93X_SZ_USBHOST SZ_4K
139 #endif /* __ASM_ARCH_MAP_H */