2 * drivers/pci/setup-res.c
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
9 * Support routines for initializing a PCI subsystem.
12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
15 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/pci.h>
22 #include <linux/errno.h>
23 #include <linux/ioport.h>
24 #include <linux/cache.h>
25 #include <linux/slab.h>
29 void pci_update_resource(struct pci_dev
*dev
, int resno
)
31 struct pci_bus_region region
;
34 enum pci_bar_type type
;
35 struct resource
*res
= dev
->resource
+ resno
;
38 * Ignore resources for unimplemented BARs and unused resource slots
45 * Ignore non-moveable resources. This might be legacy resources for
46 * which no functional BAR register exists or another important
47 * system resource we shouldn't move around.
49 if (res
->flags
& IORESOURCE_PCI_FIXED
)
52 pcibios_resource_to_bus(dev
, ®ion
, res
);
54 dev_dbg(&dev
->dev
, "BAR %d: got res %pR bus [%#llx-%#llx] "
55 "flags %#lx\n", resno
, res
,
56 (unsigned long long)region
.start
,
57 (unsigned long long)region
.end
,
58 (unsigned long)res
->flags
);
60 new = region
.start
| (res
->flags
& PCI_REGION_FLAG_MASK
);
61 if (res
->flags
& IORESOURCE_IO
)
62 mask
= (u32
)PCI_BASE_ADDRESS_IO_MASK
;
64 mask
= (u32
)PCI_BASE_ADDRESS_MEM_MASK
;
66 reg
= pci_resource_bar(dev
, resno
, &type
);
69 if (type
!= pci_bar_unknown
) {
70 if (!(res
->flags
& IORESOURCE_ROM_ENABLE
))
72 new |= PCI_ROM_ADDRESS_ENABLE
;
75 pci_write_config_dword(dev
, reg
, new);
76 pci_read_config_dword(dev
, reg
, &check
);
78 if ((new ^ check
) & mask
) {
79 dev_err(&dev
->dev
, "BAR %d: error updating (%#08x != %#08x)\n",
83 if ((new & (PCI_BASE_ADDRESS_SPACE
|PCI_BASE_ADDRESS_MEM_TYPE_MASK
)) ==
84 (PCI_BASE_ADDRESS_SPACE_MEMORY
|PCI_BASE_ADDRESS_MEM_TYPE_64
)) {
85 new = region
.start
>> 16 >> 16;
86 pci_write_config_dword(dev
, reg
+ 4, new);
87 pci_read_config_dword(dev
, reg
+ 4, &check
);
89 dev_err(&dev
->dev
, "BAR %d: error updating "
90 "(high %#08x != %#08x)\n", resno
, new, check
);
93 res
->flags
&= ~IORESOURCE_UNSET
;
94 dev_dbg(&dev
->dev
, "BAR %d: moved to bus [%#llx-%#llx] flags %#lx\n",
95 resno
, (unsigned long long)region
.start
,
96 (unsigned long long)region
.end
, res
->flags
);
99 int pci_claim_resource(struct pci_dev
*dev
, int resource
)
101 struct resource
*res
= &dev
->resource
[resource
];
102 struct resource
*root
;
105 root
= pci_find_parent_resource(dev
, res
);
109 err
= request_resource(root
, res
);
112 const char *dtype
= resource
< PCI_BRIDGE_RESOURCES
? "device" : "bridge";
113 dev_err(&dev
->dev
, "BAR %d: %s of %s %pR\n",
115 root
? "address space collision on" :
116 "no parent found for",
122 EXPORT_SYMBOL(pci_claim_resource
);
124 #ifdef CONFIG_PCI_QUIRKS
125 void pci_disable_bridge_window(struct pci_dev
*dev
)
127 dev_dbg(&dev
->dev
, "Disabling bridge window.\n");
129 /* MMIO Base/Limit */
130 pci_write_config_dword(dev
, PCI_MEMORY_BASE
, 0x0000fff0);
132 /* Prefetchable MMIO Base/Limit */
133 pci_write_config_dword(dev
, PCI_PREF_LIMIT_UPPER32
, 0);
134 pci_write_config_dword(dev
, PCI_PREF_MEMORY_BASE
, 0x0000fff0);
135 pci_write_config_dword(dev
, PCI_PREF_BASE_UPPER32
, 0xffffffff);
137 #endif /* CONFIG_PCI_QUIRKS */
139 static int __pci_assign_resource(struct pci_bus
*bus
, struct pci_dev
*dev
,
142 struct resource
*res
= dev
->resource
+ resno
;
143 resource_size_t size
, min
, align
;
146 size
= resource_size(res
);
147 min
= (res
->flags
& IORESOURCE_IO
) ? PCIBIOS_MIN_IO
: PCIBIOS_MIN_MEM
;
148 align
= pci_resource_alignment(dev
, res
);
150 /* First, try exact prefetching match.. */
151 ret
= pci_bus_alloc_resource(bus
, res
, size
, align
, min
,
153 pcibios_align_resource
, dev
);
155 if (ret
< 0 && (res
->flags
& IORESOURCE_PREFETCH
)) {
159 * But a prefetching area can handle a non-prefetching
160 * window (it will just not perform as well).
162 ret
= pci_bus_alloc_resource(bus
, res
, size
, align
, min
, 0,
163 pcibios_align_resource
, dev
);
167 res
->flags
&= ~IORESOURCE_STARTALIGN
;
168 if (resno
< PCI_BRIDGE_RESOURCES
)
169 pci_update_resource(dev
, resno
);
175 int pci_assign_resource(struct pci_dev
*dev
, int resno
)
177 struct resource
*res
= dev
->resource
+ resno
;
178 resource_size_t align
;
182 align
= pci_resource_alignment(dev
, res
);
184 dev_info(&dev
->dev
, "BAR %d: can't allocate resource (bogus "
185 "alignment) %pR flags %#lx\n",
186 resno
, res
, res
->flags
);
191 while ((ret
= __pci_assign_resource(bus
, dev
, resno
))) {
192 if (bus
->parent
&& bus
->self
->transparent
)
202 dev_info(&dev
->dev
, "BAR %d: can't allocate %s resource %pR\n",
203 resno
, res
->flags
& IORESOURCE_IO
? "I/O" : "mem", res
);
209 int pci_assign_resource_fixed(struct pci_dev
*dev
, int resno
)
211 struct pci_bus
*bus
= dev
->bus
;
212 struct resource
*res
= dev
->resource
+ resno
;
213 unsigned int type_mask
;
216 type_mask
= IORESOURCE_IO
| IORESOURCE_MEM
| IORESOURCE_PREFETCH
;
218 for (i
= 0; i
< PCI_BUS_NUM_RESOURCES
; i
++) {
219 struct resource
*r
= bus
->resource
[i
];
223 /* type_mask must match */
224 if ((res
->flags
^ r
->flags
) & type_mask
)
227 ret
= request_resource(r
, res
);
234 dev_err(&dev
->dev
, "BAR %d: can't allocate %s resource %pR\n",
235 resno
, res
->flags
& IORESOURCE_IO
? "I/O" : "mem", res
);
236 } else if (resno
< PCI_BRIDGE_RESOURCES
) {
237 pci_update_resource(dev
, resno
);
242 EXPORT_SYMBOL_GPL(pci_assign_resource_fixed
);
245 /* Sort resources by alignment */
246 void pdev_sort_resources(struct pci_dev
*dev
, struct resource_list
*head
)
250 for (i
= 0; i
< PCI_NUM_RESOURCES
; i
++) {
252 struct resource_list
*list
, *tmp
;
253 resource_size_t r_align
;
255 r
= &dev
->resource
[i
];
257 if (r
->flags
& IORESOURCE_PCI_FIXED
)
260 if (!(r
->flags
) || r
->parent
)
263 r_align
= pci_resource_alignment(dev
, r
);
265 dev_warn(&dev
->dev
, "BAR %d: bogus alignment "
270 for (list
= head
; ; list
= list
->next
) {
271 resource_size_t align
= 0;
272 struct resource_list
*ln
= list
->next
;
275 align
= pci_resource_alignment(ln
->dev
, ln
->res
);
277 if (r_align
> align
) {
278 tmp
= kmalloc(sizeof(*tmp
), GFP_KERNEL
);
280 panic("pdev_sort_resources(): "
281 "kmalloc() failed!\n");
292 int pci_enable_resources(struct pci_dev
*dev
, int mask
)
298 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
301 for (i
= 0; i
< PCI_NUM_RESOURCES
; i
++) {
302 if (!(mask
& (1 << i
)))
305 r
= &dev
->resource
[i
];
307 if (!(r
->flags
& (IORESOURCE_IO
| IORESOURCE_MEM
)))
309 if ((i
== PCI_ROM_RESOURCE
) &&
310 (!(r
->flags
& IORESOURCE_ROM_ENABLE
)))
314 dev_err(&dev
->dev
, "device not available because of "
315 "BAR %d %pR collisions\n", i
, r
);
319 if (r
->flags
& IORESOURCE_IO
)
320 cmd
|= PCI_COMMAND_IO
;
321 if (r
->flags
& IORESOURCE_MEM
)
322 cmd
|= PCI_COMMAND_MEMORY
;
325 if (cmd
!= old_cmd
) {
326 dev_info(&dev
->dev
, "enabling device (%04x -> %04x)\n",
328 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);