Merge remote-tracking branch 'pm/linux-next'
[linux-2.6/next.git] / drivers / video / atmel_lcdfb.c
blob82ad48002347807b70762fef658a0c266d182d70
1 /*
2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
22 #include <mach/board.h>
23 #include <mach/cpu.h>
24 #include <asm/gpio.h>
26 #include <video/atmel_lcdc.h>
28 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
29 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
31 /* configurable parameters */
32 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
33 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
34 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
36 #if defined(CONFIG_ARCH_AT91)
37 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
38 | FBINFO_PARTIAL_PAN_OK \
39 | FBINFO_HWACCEL_YPAN)
41 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
42 struct fb_var_screeninfo *var,
43 struct fb_info *info)
47 #elif defined(CONFIG_AVR32)
48 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
49 | FBINFO_PARTIAL_PAN_OK \
50 | FBINFO_HWACCEL_XPAN \
51 | FBINFO_HWACCEL_YPAN)
53 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
54 struct fb_var_screeninfo *var,
55 struct fb_info *info)
57 u32 dma2dcfg;
58 u32 pixeloff;
60 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
62 dma2dcfg = (info-var.xres_virtual - info->var.xres)
63 * info->var.bits_per_pixel / 8;
64 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
65 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
67 /* Update configuration */
68 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
69 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
70 | ATMEL_LCDC_DMAUPDT);
72 #endif
74 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
75 | ATMEL_LCDC_POL_POSITIVE
76 | ATMEL_LCDC_ENA_PWMENABLE;
78 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
80 /* some bl->props field just changed */
81 static int atmel_bl_update_status(struct backlight_device *bl)
83 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
84 int power = sinfo->bl_power;
85 int brightness = bl->props.brightness;
87 /* REVISIT there may be a meaningful difference between
88 * fb_blank and power ... there seem to be some cases
89 * this doesn't handle correctly.
91 if (bl->props.fb_blank != sinfo->bl_power)
92 power = bl->props.fb_blank;
93 else if (bl->props.power != sinfo->bl_power)
94 power = bl->props.power;
96 if (brightness < 0 && power == FB_BLANK_UNBLANK)
97 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
98 else if (power != FB_BLANK_UNBLANK)
99 brightness = 0;
101 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
102 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
103 brightness ? contrast_ctr : 0);
105 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
107 return 0;
110 static int atmel_bl_get_brightness(struct backlight_device *bl)
112 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
114 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
117 static const struct backlight_ops atmel_lcdc_bl_ops = {
118 .update_status = atmel_bl_update_status,
119 .get_brightness = atmel_bl_get_brightness,
122 static void init_backlight(struct atmel_lcdfb_info *sinfo)
124 struct backlight_properties props;
125 struct backlight_device *bl;
127 sinfo->bl_power = FB_BLANK_UNBLANK;
129 if (sinfo->backlight)
130 return;
132 memset(&props, 0, sizeof(struct backlight_properties));
133 props.type = BACKLIGHT_RAW;
134 props.max_brightness = 0xff;
135 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
136 &atmel_lcdc_bl_ops, &props);
137 if (IS_ERR(bl)) {
138 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
139 PTR_ERR(bl));
140 return;
142 sinfo->backlight = bl;
144 bl->props.power = FB_BLANK_UNBLANK;
145 bl->props.fb_blank = FB_BLANK_UNBLANK;
146 bl->props.brightness = atmel_bl_get_brightness(bl);
149 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
151 if (sinfo->backlight)
152 backlight_device_unregister(sinfo->backlight);
155 #else
157 static void init_backlight(struct atmel_lcdfb_info *sinfo)
159 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
162 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
166 #endif
168 static void init_contrast(struct atmel_lcdfb_info *sinfo)
170 /* contrast pwm can be 'inverted' */
171 if (sinfo->lcdcon_pol_negative)
172 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
174 /* have some default contrast/backlight settings */
175 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
176 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
178 if (sinfo->lcdcon_is_backlight)
179 init_backlight(sinfo);
183 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
184 .type = FB_TYPE_PACKED_PIXELS,
185 .visual = FB_VISUAL_TRUECOLOR,
186 .xpanstep = 0,
187 .ypanstep = 1,
188 .ywrapstep = 0,
189 .accel = FB_ACCEL_NONE,
192 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
194 unsigned long value;
196 if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
197 || cpu_is_at32ap7000()))
198 return xres;
200 value = xres;
201 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
202 /* STN display */
203 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
204 value *= 3;
206 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
207 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
208 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
209 value = DIV_ROUND_UP(value, 4);
210 else
211 value = DIV_ROUND_UP(value, 8);
214 return value;
217 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
219 /* Turn off the LCD controller and the DMA controller */
220 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
221 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
223 /* Wait for the LCDC core to become idle */
224 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
225 msleep(10);
227 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
230 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
232 atmel_lcdfb_stop_nowait(sinfo);
234 /* Wait for DMA engine to become idle... */
235 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
236 msleep(10);
239 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
241 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
242 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
243 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
244 | ATMEL_LCDC_PWR);
247 static void atmel_lcdfb_update_dma(struct fb_info *info,
248 struct fb_var_screeninfo *var)
250 struct atmel_lcdfb_info *sinfo = info->par;
251 struct fb_fix_screeninfo *fix = &info->fix;
252 unsigned long dma_addr;
254 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
255 + var->xoffset * info->var.bits_per_pixel / 8);
257 dma_addr &= ~3UL;
259 /* Set framebuffer DMA base address and pixel offset */
260 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
262 atmel_lcdfb_update_dma2d(sinfo, var, info);
265 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
267 struct fb_info *info = sinfo->info;
269 dma_free_writecombine(info->device, info->fix.smem_len,
270 info->screen_base, info->fix.smem_start);
274 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
275 * @sinfo: the frame buffer to allocate memory for
277 * This function is called only from the atmel_lcdfb_probe()
278 * so no locking by fb_info->mm_lock around smem_len setting is needed.
280 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
282 struct fb_info *info = sinfo->info;
283 struct fb_var_screeninfo *var = &info->var;
284 unsigned int smem_len;
286 smem_len = (var->xres_virtual * var->yres_virtual
287 * ((var->bits_per_pixel + 7) / 8));
288 info->fix.smem_len = max(smem_len, sinfo->smem_len);
290 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
291 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
293 if (!info->screen_base) {
294 return -ENOMEM;
297 memset(info->screen_base, 0, info->fix.smem_len);
299 return 0;
302 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
303 struct fb_info *info)
305 struct fb_videomode varfbmode;
306 const struct fb_videomode *fbmode = NULL;
308 fb_var_to_videomode(&varfbmode, var);
309 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
310 if (fbmode)
311 fb_videomode_to_var(var, fbmode);
312 return fbmode;
317 * atmel_lcdfb_check_var - Validates a var passed in.
318 * @var: frame buffer variable screen structure
319 * @info: frame buffer structure that represents a single frame buffer
321 * Checks to see if the hardware supports the state requested by
322 * var passed in. This function does not alter the hardware
323 * state!!! This means the data stored in struct fb_info and
324 * struct atmel_lcdfb_info do not change. This includes the var
325 * inside of struct fb_info. Do NOT change these. This function
326 * can be called on its own if we intent to only test a mode and
327 * not actually set it. The stuff in modedb.c is a example of
328 * this. If the var passed in is slightly off by what the
329 * hardware can support then we alter the var PASSED in to what
330 * we can do. If the hardware doesn't support mode change a
331 * -EINVAL will be returned by the upper layers. You don't need
332 * to implement this function then. If you hardware doesn't
333 * support changing the resolution then this function is not
334 * needed. In this case the driver would just provide a var that
335 * represents the static state the screen is in.
337 * Returns negative errno on error, or zero on success.
339 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
340 struct fb_info *info)
342 struct device *dev = info->device;
343 struct atmel_lcdfb_info *sinfo = info->par;
344 unsigned long clk_value_khz;
346 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
348 dev_dbg(dev, "%s:\n", __func__);
350 if (!(var->pixclock && var->bits_per_pixel)) {
351 /* choose a suitable mode if possible */
352 if (!atmel_lcdfb_choose_mode(var, info)) {
353 dev_err(dev, "needed value not specified\n");
354 return -EINVAL;
358 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
359 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
360 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
361 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
363 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
364 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
365 return -EINVAL;
368 /* Do not allow to have real resoulution larger than virtual */
369 if (var->xres > var->xres_virtual)
370 var->xres_virtual = var->xres;
372 if (var->yres > var->yres_virtual)
373 var->yres_virtual = var->yres;
375 /* Force same alignment for each line */
376 var->xres = (var->xres + 3) & ~3UL;
377 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
379 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
380 var->transp.msb_right = 0;
381 var->transp.offset = var->transp.length = 0;
382 var->xoffset = var->yoffset = 0;
384 if (info->fix.smem_len) {
385 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
386 * ((var->bits_per_pixel + 7) / 8));
387 if (smem_len > info->fix.smem_len)
388 return -EINVAL;
391 /* Saturate vertical and horizontal timings at maximum values */
392 var->vsync_len = min_t(u32, var->vsync_len,
393 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
394 var->upper_margin = min_t(u32, var->upper_margin,
395 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
396 var->lower_margin = min_t(u32, var->lower_margin,
397 ATMEL_LCDC_VFP);
398 var->right_margin = min_t(u32, var->right_margin,
399 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
400 var->hsync_len = min_t(u32, var->hsync_len,
401 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
402 var->left_margin = min_t(u32, var->left_margin,
403 ATMEL_LCDC_HBP + 1);
405 /* Some parameters can't be zero */
406 var->vsync_len = max_t(u32, var->vsync_len, 1);
407 var->right_margin = max_t(u32, var->right_margin, 1);
408 var->hsync_len = max_t(u32, var->hsync_len, 1);
409 var->left_margin = max_t(u32, var->left_margin, 1);
411 switch (var->bits_per_pixel) {
412 case 1:
413 case 2:
414 case 4:
415 case 8:
416 var->red.offset = var->green.offset = var->blue.offset = 0;
417 var->red.length = var->green.length = var->blue.length
418 = var->bits_per_pixel;
419 break;
420 case 15:
421 case 16:
422 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
423 /* RGB:565 mode */
424 var->red.offset = 11;
425 var->blue.offset = 0;
426 var->green.length = 6;
427 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
428 var->red.offset = 10;
429 var->blue.offset = 0;
430 var->green.length = 5;
431 } else {
432 /* BGR:555 mode */
433 var->red.offset = 0;
434 var->blue.offset = 10;
435 var->green.length = 5;
437 var->green.offset = 5;
438 var->red.length = var->blue.length = 5;
439 break;
440 case 32:
441 var->transp.offset = 24;
442 var->transp.length = 8;
443 /* fall through */
444 case 24:
445 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
446 /* RGB:888 mode */
447 var->red.offset = 16;
448 var->blue.offset = 0;
449 } else {
450 /* BGR:888 mode */
451 var->red.offset = 0;
452 var->blue.offset = 16;
454 var->green.offset = 8;
455 var->red.length = var->green.length = var->blue.length = 8;
456 break;
457 default:
458 dev_err(dev, "color depth %d not supported\n",
459 var->bits_per_pixel);
460 return -EINVAL;
463 return 0;
467 * LCD reset sequence
469 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
471 might_sleep();
473 atmel_lcdfb_stop(sinfo);
474 atmel_lcdfb_start(sinfo);
478 * atmel_lcdfb_set_par - Alters the hardware state.
479 * @info: frame buffer structure that represents a single frame buffer
481 * Using the fb_var_screeninfo in fb_info we set the resolution
482 * of the this particular framebuffer. This function alters the
483 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
484 * not alter var in fb_info since we are using that data. This
485 * means we depend on the data in var inside fb_info to be
486 * supported by the hardware. atmel_lcdfb_check_var is always called
487 * before atmel_lcdfb_set_par to ensure this. Again if you can't
488 * change the resolution you don't need this function.
491 static int atmel_lcdfb_set_par(struct fb_info *info)
493 struct atmel_lcdfb_info *sinfo = info->par;
494 unsigned long hozval_linesz;
495 unsigned long value;
496 unsigned long clk_value_khz;
497 unsigned long bits_per_line;
498 unsigned long pix_factor = 2;
500 might_sleep();
502 dev_dbg(info->device, "%s:\n", __func__);
503 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
504 info->var.xres, info->var.yres,
505 info->var.xres_virtual, info->var.yres_virtual);
507 atmel_lcdfb_stop_nowait(sinfo);
509 if (info->var.bits_per_pixel == 1)
510 info->fix.visual = FB_VISUAL_MONO01;
511 else if (info->var.bits_per_pixel <= 8)
512 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
513 else
514 info->fix.visual = FB_VISUAL_TRUECOLOR;
516 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
517 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
519 /* Re-initialize the DMA engine... */
520 dev_dbg(info->device, " * update DMA engine\n");
521 atmel_lcdfb_update_dma(info, &info->var);
523 /* ...set frame size and burst length = 8 words (?) */
524 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
525 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
526 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
528 /* Now, the LCDC core... */
530 /* Set pixel clock */
531 if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
532 pix_factor = 1;
534 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
536 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
538 if (value < pix_factor) {
539 dev_notice(info->device, "Bypassing pixel clock divider\n");
540 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
541 } else {
542 value = (value / pix_factor) - 1;
543 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
544 value);
545 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
546 value << ATMEL_LCDC_CLKVAL_OFFSET);
547 info->var.pixclock =
548 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
549 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
550 PICOS2KHZ(info->var.pixclock));
554 /* Initialize control register 2 */
555 value = sinfo->default_lcdcon2;
557 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
558 value |= ATMEL_LCDC_INVLINE_INVERTED;
559 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
560 value |= ATMEL_LCDC_INVFRAME_INVERTED;
562 switch (info->var.bits_per_pixel) {
563 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
564 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
565 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
566 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
567 case 15: /* fall through */
568 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
569 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
570 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
571 default: BUG(); break;
573 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
574 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
576 /* Vertical timing */
577 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
578 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
579 value |= info->var.lower_margin;
580 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
581 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
583 /* Horizontal timing */
584 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
585 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
586 value |= (info->var.left_margin - 1);
587 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
588 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
590 /* Horizontal value (aka line size) */
591 hozval_linesz = compute_hozval(info->var.xres,
592 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
594 /* Display size */
595 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
596 value |= info->var.yres - 1;
597 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
598 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
600 /* FIFO Threshold: Use formula from data sheet */
601 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
602 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
604 /* Toggle LCD_MODE every frame */
605 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
607 /* Disable all interrupts */
608 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
609 /* Enable FIFO & DMA errors */
610 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
612 /* ...wait for DMA engine to become idle... */
613 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
614 msleep(10);
616 atmel_lcdfb_start(sinfo);
618 dev_dbg(info->device, " * DONE\n");
620 return 0;
623 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
625 chan &= 0xffff;
626 chan >>= 16 - bf->length;
627 return chan << bf->offset;
631 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
632 * @regno: Which register in the CLUT we are programming
633 * @red: The red value which can be up to 16 bits wide
634 * @green: The green value which can be up to 16 bits wide
635 * @blue: The blue value which can be up to 16 bits wide.
636 * @transp: If supported the alpha value which can be up to 16 bits wide.
637 * @info: frame buffer info structure
639 * Set a single color register. The values supplied have a 16 bit
640 * magnitude which needs to be scaled in this function for the hardware.
641 * Things to take into consideration are how many color registers, if
642 * any, are supported with the current color visual. With truecolor mode
643 * no color palettes are supported. Here a pseudo palette is created
644 * which we store the value in pseudo_palette in struct fb_info. For
645 * pseudocolor mode we have a limited color palette. To deal with this
646 * we can program what color is displayed for a particular pixel value.
647 * DirectColor is similar in that we can program each color field. If
648 * we have a static colormap we don't need to implement this function.
650 * Returns negative errno on error, or zero on success. In an
651 * ideal world, this would have been the case, but as it turns
652 * out, the other drivers return 1 on failure, so that's what
653 * we're going to do.
655 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
656 unsigned int green, unsigned int blue,
657 unsigned int transp, struct fb_info *info)
659 struct atmel_lcdfb_info *sinfo = info->par;
660 unsigned int val;
661 u32 *pal;
662 int ret = 1;
664 if (info->var.grayscale)
665 red = green = blue = (19595 * red + 38470 * green
666 + 7471 * blue) >> 16;
668 switch (info->fix.visual) {
669 case FB_VISUAL_TRUECOLOR:
670 if (regno < 16) {
671 pal = info->pseudo_palette;
673 val = chan_to_field(red, &info->var.red);
674 val |= chan_to_field(green, &info->var.green);
675 val |= chan_to_field(blue, &info->var.blue);
677 pal[regno] = val;
678 ret = 0;
680 break;
682 case FB_VISUAL_PSEUDOCOLOR:
683 if (regno < 256) {
684 val = ((red >> 11) & 0x001f);
685 val |= ((green >> 6) & 0x03e0);
686 val |= ((blue >> 1) & 0x7c00);
689 * TODO: intensity bit. Maybe something like
690 * ~(red[10] ^ green[10] ^ blue[10]) & 1
693 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
694 ret = 0;
696 break;
698 case FB_VISUAL_MONO01:
699 if (regno < 2) {
700 val = (regno == 0) ? 0x00 : 0x1F;
701 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
702 ret = 0;
704 break;
708 return ret;
711 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
712 struct fb_info *info)
714 dev_dbg(info->device, "%s\n", __func__);
716 atmel_lcdfb_update_dma(info, var);
718 return 0;
721 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
723 struct atmel_lcdfb_info *sinfo = info->par;
725 switch (blank_mode) {
726 case FB_BLANK_UNBLANK:
727 case FB_BLANK_NORMAL:
728 atmel_lcdfb_start(sinfo);
729 break;
730 case FB_BLANK_VSYNC_SUSPEND:
731 case FB_BLANK_HSYNC_SUSPEND:
732 break;
733 case FB_BLANK_POWERDOWN:
734 atmel_lcdfb_stop(sinfo);
735 break;
736 default:
737 return -EINVAL;
740 /* let fbcon do a soft blank for us */
741 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
744 static struct fb_ops atmel_lcdfb_ops = {
745 .owner = THIS_MODULE,
746 .fb_check_var = atmel_lcdfb_check_var,
747 .fb_set_par = atmel_lcdfb_set_par,
748 .fb_setcolreg = atmel_lcdfb_setcolreg,
749 .fb_blank = atmel_lcdfb_blank,
750 .fb_pan_display = atmel_lcdfb_pan_display,
751 .fb_fillrect = cfb_fillrect,
752 .fb_copyarea = cfb_copyarea,
753 .fb_imageblit = cfb_imageblit,
756 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
758 struct fb_info *info = dev_id;
759 struct atmel_lcdfb_info *sinfo = info->par;
760 u32 status;
762 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
763 if (status & ATMEL_LCDC_UFLWI) {
764 dev_warn(info->device, "FIFO underflow %#x\n", status);
765 /* reset DMA and FIFO to avoid screen shifting */
766 schedule_work(&sinfo->task);
768 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
769 return IRQ_HANDLED;
773 * LCD controller task (to reset the LCD)
775 static void atmel_lcdfb_task(struct work_struct *work)
777 struct atmel_lcdfb_info *sinfo =
778 container_of(work, struct atmel_lcdfb_info, task);
780 atmel_lcdfb_reset(sinfo);
783 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
785 struct fb_info *info = sinfo->info;
786 int ret = 0;
788 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
790 dev_info(info->device,
791 "%luKiB frame buffer at %08lx (mapped at %p)\n",
792 (unsigned long)info->fix.smem_len / 1024,
793 (unsigned long)info->fix.smem_start,
794 info->screen_base);
796 /* Allocate colormap */
797 ret = fb_alloc_cmap(&info->cmap, 256, 0);
798 if (ret < 0)
799 dev_err(info->device, "Alloc color map failed\n");
801 return ret;
804 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
806 if (sinfo->bus_clk)
807 clk_enable(sinfo->bus_clk);
808 clk_enable(sinfo->lcdc_clk);
811 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
813 if (sinfo->bus_clk)
814 clk_disable(sinfo->bus_clk);
815 clk_disable(sinfo->lcdc_clk);
819 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
821 struct device *dev = &pdev->dev;
822 struct fb_info *info;
823 struct atmel_lcdfb_info *sinfo;
824 struct atmel_lcdfb_info *pdata_sinfo;
825 struct fb_videomode fbmode;
826 struct resource *regs = NULL;
827 struct resource *map = NULL;
828 int ret;
830 dev_dbg(dev, "%s BEGIN\n", __func__);
832 ret = -ENOMEM;
833 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
834 if (!info) {
835 dev_err(dev, "cannot allocate memory\n");
836 goto out;
839 sinfo = info->par;
841 if (dev->platform_data) {
842 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
843 sinfo->default_bpp = pdata_sinfo->default_bpp;
844 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
845 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
846 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
847 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
848 sinfo->guard_time = pdata_sinfo->guard_time;
849 sinfo->smem_len = pdata_sinfo->smem_len;
850 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
851 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
852 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
853 } else {
854 dev_err(dev, "cannot get default configuration\n");
855 goto free_info;
857 sinfo->info = info;
858 sinfo->pdev = pdev;
860 strcpy(info->fix.id, sinfo->pdev->name);
861 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
862 info->pseudo_palette = sinfo->pseudo_palette;
863 info->fbops = &atmel_lcdfb_ops;
865 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
866 info->fix = atmel_lcdfb_fix;
868 /* Enable LCDC Clocks */
869 if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
870 || cpu_is_at32ap7000()) {
871 sinfo->bus_clk = clk_get(dev, "hck1");
872 if (IS_ERR(sinfo->bus_clk)) {
873 ret = PTR_ERR(sinfo->bus_clk);
874 goto free_info;
877 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
878 if (IS_ERR(sinfo->lcdc_clk)) {
879 ret = PTR_ERR(sinfo->lcdc_clk);
880 goto put_bus_clk;
882 atmel_lcdfb_start_clock(sinfo);
884 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
885 info->monspecs.modedb_len, info->monspecs.modedb,
886 sinfo->default_bpp);
887 if (!ret) {
888 dev_err(dev, "no suitable video mode found\n");
889 goto stop_clk;
893 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
894 if (!regs) {
895 dev_err(dev, "resources unusable\n");
896 ret = -ENXIO;
897 goto stop_clk;
900 sinfo->irq_base = platform_get_irq(pdev, 0);
901 if (sinfo->irq_base < 0) {
902 dev_err(dev, "unable to get irq\n");
903 ret = sinfo->irq_base;
904 goto stop_clk;
907 /* Initialize video memory */
908 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
909 if (map) {
910 /* use a pre-allocated memory buffer */
911 info->fix.smem_start = map->start;
912 info->fix.smem_len = resource_size(map);
913 if (!request_mem_region(info->fix.smem_start,
914 info->fix.smem_len, pdev->name)) {
915 ret = -EBUSY;
916 goto stop_clk;
919 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
920 if (!info->screen_base)
921 goto release_intmem;
924 * Don't clear the framebuffer -- someone may have set
925 * up a splash image.
927 } else {
928 /* alocate memory buffer */
929 ret = atmel_lcdfb_alloc_video_memory(sinfo);
930 if (ret < 0) {
931 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
932 goto stop_clk;
936 /* LCDC registers */
937 info->fix.mmio_start = regs->start;
938 info->fix.mmio_len = resource_size(regs);
940 if (!request_mem_region(info->fix.mmio_start,
941 info->fix.mmio_len, pdev->name)) {
942 ret = -EBUSY;
943 goto free_fb;
946 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
947 if (!sinfo->mmio) {
948 dev_err(dev, "cannot map LCDC registers\n");
949 goto release_mem;
952 /* Initialize PWM for contrast or backlight ("off") */
953 init_contrast(sinfo);
955 /* interrupt */
956 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
957 if (ret) {
958 dev_err(dev, "request_irq failed: %d\n", ret);
959 goto unmap_mmio;
962 /* Some operations on the LCDC might sleep and
963 * require a preemptible task context */
964 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
966 ret = atmel_lcdfb_init_fbinfo(sinfo);
967 if (ret < 0) {
968 dev_err(dev, "init fbinfo failed: %d\n", ret);
969 goto unregister_irqs;
973 * This makes sure that our colour bitfield
974 * descriptors are correctly initialised.
976 atmel_lcdfb_check_var(&info->var, info);
978 ret = fb_set_var(info, &info->var);
979 if (ret) {
980 dev_warn(dev, "unable to set display parameters\n");
981 goto free_cmap;
984 dev_set_drvdata(dev, info);
987 * Tell the world that we're ready to go
989 ret = register_framebuffer(info);
990 if (ret < 0) {
991 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
992 goto reset_drvdata;
995 /* add selected videomode to modelist */
996 fb_var_to_videomode(&fbmode, &info->var);
997 fb_add_videomode(&fbmode, &info->modelist);
999 /* Power up the LCDC screen */
1000 if (sinfo->atmel_lcdfb_power_control)
1001 sinfo->atmel_lcdfb_power_control(1);
1003 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1004 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1006 return 0;
1008 reset_drvdata:
1009 dev_set_drvdata(dev, NULL);
1010 free_cmap:
1011 fb_dealloc_cmap(&info->cmap);
1012 unregister_irqs:
1013 cancel_work_sync(&sinfo->task);
1014 free_irq(sinfo->irq_base, info);
1015 unmap_mmio:
1016 exit_backlight(sinfo);
1017 iounmap(sinfo->mmio);
1018 release_mem:
1019 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1020 free_fb:
1021 if (map)
1022 iounmap(info->screen_base);
1023 else
1024 atmel_lcdfb_free_video_memory(sinfo);
1026 release_intmem:
1027 if (map)
1028 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1029 stop_clk:
1030 atmel_lcdfb_stop_clock(sinfo);
1031 clk_put(sinfo->lcdc_clk);
1032 put_bus_clk:
1033 if (sinfo->bus_clk)
1034 clk_put(sinfo->bus_clk);
1035 free_info:
1036 framebuffer_release(info);
1037 out:
1038 dev_dbg(dev, "%s FAILED\n", __func__);
1039 return ret;
1042 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1044 struct device *dev = &pdev->dev;
1045 struct fb_info *info = dev_get_drvdata(dev);
1046 struct atmel_lcdfb_info *sinfo;
1048 if (!info || !info->par)
1049 return 0;
1050 sinfo = info->par;
1052 cancel_work_sync(&sinfo->task);
1053 exit_backlight(sinfo);
1054 if (sinfo->atmel_lcdfb_power_control)
1055 sinfo->atmel_lcdfb_power_control(0);
1056 unregister_framebuffer(info);
1057 atmel_lcdfb_stop_clock(sinfo);
1058 clk_put(sinfo->lcdc_clk);
1059 if (sinfo->bus_clk)
1060 clk_put(sinfo->bus_clk);
1061 fb_dealloc_cmap(&info->cmap);
1062 free_irq(sinfo->irq_base, info);
1063 iounmap(sinfo->mmio);
1064 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1065 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1066 iounmap(info->screen_base);
1067 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1068 } else {
1069 atmel_lcdfb_free_video_memory(sinfo);
1072 dev_set_drvdata(dev, NULL);
1073 framebuffer_release(info);
1075 return 0;
1078 #ifdef CONFIG_PM
1080 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1082 struct fb_info *info = platform_get_drvdata(pdev);
1083 struct atmel_lcdfb_info *sinfo = info->par;
1086 * We don't want to handle interrupts while the clock is
1087 * stopped. It may take forever.
1089 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1091 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1092 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1093 if (sinfo->atmel_lcdfb_power_control)
1094 sinfo->atmel_lcdfb_power_control(0);
1096 atmel_lcdfb_stop(sinfo);
1097 atmel_lcdfb_stop_clock(sinfo);
1099 return 0;
1102 static int atmel_lcdfb_resume(struct platform_device *pdev)
1104 struct fb_info *info = platform_get_drvdata(pdev);
1105 struct atmel_lcdfb_info *sinfo = info->par;
1107 atmel_lcdfb_start_clock(sinfo);
1108 atmel_lcdfb_start(sinfo);
1109 if (sinfo->atmel_lcdfb_power_control)
1110 sinfo->atmel_lcdfb_power_control(1);
1111 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1113 /* Enable FIFO & DMA errors */
1114 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1115 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1117 return 0;
1120 #else
1121 #define atmel_lcdfb_suspend NULL
1122 #define atmel_lcdfb_resume NULL
1123 #endif
1125 static struct platform_driver atmel_lcdfb_driver = {
1126 .remove = __exit_p(atmel_lcdfb_remove),
1127 .suspend = atmel_lcdfb_suspend,
1128 .resume = atmel_lcdfb_resume,
1130 .driver = {
1131 .name = "atmel_lcdfb",
1132 .owner = THIS_MODULE,
1136 static int __init atmel_lcdfb_init(void)
1138 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1141 static void __exit atmel_lcdfb_exit(void)
1143 platform_driver_unregister(&atmel_lcdfb_driver);
1146 module_init(atmel_lcdfb_init);
1147 module_exit(atmel_lcdfb_exit);
1149 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1150 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1151 MODULE_LICENSE("GPL");