Enable P-state software coordination via _PDC
[linux-2.6/next.git] / include / asm-i386 / timex.h
blob292b5a68f6271b08b410d19197e3434f654e517f
1 /*
2 * linux/include/asm-i386/timex.h
4 * i386 architecture timex specifications
5 */
6 #ifndef _ASMi386_TIMEX_H
7 #define _ASMi386_TIMEX_H
9 #include <linux/config.h>
10 #include <asm/processor.h>
12 #ifdef CONFIG_X86_ELAN
13 # define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */
14 #else
15 # define CLOCK_TICK_RATE 1193182 /* Underlying HZ */
16 #endif
20 * Standard way to access the cycle counter on i586+ CPUs.
21 * Currently only used on SMP.
23 * If you really have a SMP machine with i486 chips or older,
24 * compile for that, and this will just always return zero.
25 * That's ok, it just means that the nicer scheduling heuristics
26 * won't work for you.
28 * We only use the low 32 bits, and we'd simply better make sure
29 * that we reschedule before that wraps. Scheduling at least every
30 * four billion cycles just basically sounds like a good idea,
31 * regardless of how fast the machine is.
33 typedef unsigned long long cycles_t;
35 static inline cycles_t get_cycles (void)
37 unsigned long long ret=0;
39 #ifndef CONFIG_X86_TSC
40 if (!cpu_has_tsc)
41 return 0;
42 #endif
44 #if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
45 rdtscll(ret);
46 #endif
47 return ret;
50 extern unsigned int cpu_khz;
52 extern int read_current_timer(unsigned long *timer_value);
53 #define ARCH_HAS_READ_CURRENT_TIMER 1
55 #endif